pci_kn8ae.c revision 1.1
1 /* $NetBSD: pci_kn8ae.c,v 1.1 1997/03/12 19:20:06 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1997 5 * Matthew Jacob 6 * NASA AMES Research Center. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice immediately at the beginning of the file, without modification, 14 * this list of conditions, and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 #include <sys/types.h> 35 #include <sys/param.h> 36 #include <sys/time.h> 37 #include <sys/systm.h> 38 #include <sys/errno.h> 39 #include <sys/malloc.h> 40 #include <sys/device.h> 41 #include <sys/syslog.h> 42 43 #include <vm/vm.h> 44 45 #include <machine/autoconf.h> 46 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcivar.h> 49 50 #include <alpha/pci/dwlpxreg.h> 51 #include <alpha/pci/dwlpxvar.h> 52 #include <alpha/pci/pci_kn8ae.h> 53 54 #ifndef EVCNT_COUNTERS 55 #include <machine/intrcnt.h> 56 #endif 57 58 int dec_kn8ae_intr_map __P((void *, pcitag_t, int, int, 59 pci_intr_handle_t *)); 60 const char *dec_kn8ae_intr_string __P((void *, pci_intr_handle_t)); 61 void *dec_kn8ae_intr_establish __P((void *, pci_intr_handle_t, 62 int, int (*func)(void *), void *)); 63 void dec_kn8ae_intr_disestablish __P((void *, void *)); 64 65 #define NIONODE 5 66 #define NHOSE 4 67 struct vectab { 68 int (*func) __P((void *)); 69 void *arg; 70 } vectab[NIONODE][NHOSE][DWLPX_MAXDEV]; 71 static u_int32_t imaskcache[NIONODE][NHOSE][NHPC]; 72 73 #ifdef EVCNT_COUNTERS 74 struct evcnt kn8ae_intr_evcnt; 75 #endif 76 77 int kn8ae_spurious __P((void *)); 78 void kn8ae_iointr __P((void *framep, unsigned long vec)); 79 void kn8ae_enadis_intr __P((pci_intr_handle_t, int)); 80 void kn8ae_enable_intr __P((pci_intr_handle_t irq)); 81 void kn8ae_disable_intr __P((pci_intr_handle_t irq)); 82 83 void 84 pci_kn8ae_pickintr(ccp, first) 85 struct dwlpx_config *ccp; 86 int first; 87 { 88 int io, hose, dev; 89 pci_chipset_tag_t pc = &ccp->cc_pc; 90 91 pc->pc_intr_v = ccp; 92 pc->pc_intr_map = dec_kn8ae_intr_map; 93 pc->pc_intr_string = dec_kn8ae_intr_string; 94 pc->pc_intr_establish = dec_kn8ae_intr_establish; 95 pc->pc_intr_disestablish = dec_kn8ae_intr_disestablish; 96 97 if (!first) { 98 return; 99 } 100 101 for (io = 0; io < NIONODE; io++) { 102 for (hose = 0; hose < NHOSE; hose++) { 103 for (dev = 0; dev < DWLPX_MAXDEV; dev++) { 104 vectab[io][hose][dev].func = kn8ae_spurious; 105 vectab[io][hose][dev].arg = (void *) 106 (u_int64_t) DWLPX_MVEC(io, hose, dev); 107 } 108 } 109 } 110 for (io = 0; io < NIONODE; io++) { 111 for (hose = 0; hose < NHOSE; hose++) { 112 for (dev = 0; dev < NHPC; dev++) { 113 imaskcache[io][hose][dev] = DWLPX_IMASK_DFLT; 114 } 115 } 116 } 117 set_iointr(kn8ae_iointr); 118 } 119 120 int 121 dec_kn8ae_intr_map(ccv, bustag, buspin, line, ihp) 122 void *ccv; 123 pcitag_t bustag; 124 int buspin, line; 125 pci_intr_handle_t *ihp; 126 { 127 int device, ionode, hose; 128 struct dwlpx_config *ccp = ccv; 129 pci_chipset_tag_t pc = &ccp->cc_pc; 130 131 if (buspin == 0) { 132 /* No IRQ used. */ 133 return 1; 134 } 135 if (buspin > 4) { 136 printf("pci_map_int: bad interrupt pin %d\n", buspin); 137 return 1; 138 } 139 pci_decompose_tag(pc, bustag, NULL, &device, NULL); 140 ionode = ccp->cc_sc->dwlpx_node - 4; 141 hose = ccp->cc_sc->dwlpx_hosenum; 142 143 /* 144 * handle layout: 145 * bits 0..15 DWLPX_MVEC(ionode, hose, device) 146 * bits 16-24 buspin (1..N) 147 * bits 24-31 IPL 148 */ 149 *ihp = DWLPX_MVEC(ionode, hose, device) | (buspin << 16) | (14 << 24); 150 return (0); 151 } 152 153 const char * 154 dec_kn8ae_intr_string(ccv, ih) 155 void *ccv; 156 pci_intr_handle_t ih; 157 { 158 static char irqstr[64]; 159 sprintf(irqstr, "kn8ae irq %d vector 0x%x PCI Interrupt Pin %c", 160 (ih >> 24), ih & 0xffff, (((ih >> 16) & 0x7) - 1) + 'A'); 161 return (irqstr); 162 } 163 164 void * 165 dec_kn8ae_intr_establish(ccv, ih, level, func, arg) 166 void *ccv; 167 pci_intr_handle_t ih; 168 int level; 169 int (*func) __P((void *)); 170 void *arg; 171 { 172 struct dwlpx_config *ccp = ccv; 173 void *cookie = NULL; 174 int ionode, hose, device, s; 175 struct vectab *vp; 176 177 ionode = ccp->cc_sc->dwlpx_node - 4; 178 hose = ccp->cc_sc->dwlpx_hosenum; 179 device = DWLPX_MVEC_PCISLOT(ih); 180 181 if (ionode < 0 || ionode >= NIONODE) { 182 panic("dec_kn8ae_intr_establish: bad ionode %d\n", ionode); 183 } 184 if (hose < 0 || hose >= NHOSE) { 185 panic("dec_kn8ae_intr_establish: bad hose %d\n", hose); 186 } 187 if (device < 0 || device >= DWLPX_MAXDEV) { 188 panic("dec_kn8ae_intr_establish: bad device %d\n", device); 189 } 190 191 vp = &vectab[ionode][hose][device]; 192 if (vp->func != kn8ae_spurious) { 193 printf("dec_kn8ae_intr_establish: vector 0x%x already used\n", 194 ih & 0xffff); 195 return (cookie); 196 } 197 198 s = splhigh(); 199 vp->func = func; 200 vp->arg = arg; 201 (void) splx(s); 202 kn8ae_enable_intr(ih); 203 cookie = (void *) (u_int64_t) DWLPX_MVEC(ionode, hose, device); 204 return (cookie); 205 } 206 207 void 208 dec_kn8ae_intr_disestablish(ccv, cookie) 209 void *ccv, *cookie; 210 { 211 int ionode, hose, device, s; 212 struct vectab *vp; 213 214 ionode = DWLPX_MVEC_IONODE(cookie); 215 hose = DWLPX_MVEC_HOSE(cookie); 216 device = DWLPX_MVEC_PCISLOT(cookie); 217 if (ionode < 0 || ionode >= NIONODE || hose < 0 || hose >= NHOSE || 218 device < 0 || device >= DWLPX_MAXDEV) { 219 return; 220 } 221 vp = &vectab[ionode][hose][device]; 222 s = splhigh(); 223 vp->func = kn8ae_spurious; 224 vp->arg = cookie; 225 (void) splx(s); 226 } 227 228 void 229 kn8ae_iointr(framep, vec) 230 void *framep; 231 unsigned long vec; 232 { 233 struct vectab *vp; 234 int ionode, hose, device; 235 if ((vec & DWLPX_VEC_MARK) == 0) { 236 panic("kn8ae_iointr: vec 0x%x\n", vec); 237 } 238 #ifdef EVCNT_COUNTERS 239 kn8ae_intr_evcnt.ev_count++; 240 #else 241 ; /* XXX */ 242 #endif 243 ionode = DWLPX_MVEC_IONODE(vec); 244 hose = DWLPX_MVEC_HOSE(vec); 245 device = DWLPX_MVEC_PCISLOT(vec); 246 247 if (ionode < 0 || ionode >= NIONODE || hose < 0 || hose >= NHOSE || 248 device < 0 || device >= DWLPX_MAXDEV) { 249 panic("kn8ae_iointr: malformed vector 0x%x\n", vec); 250 } 251 vp = &vectab[ionode][hose][device]; 252 if ((*vp->func)(vp->arg) == 0) { 253 printf("kn8ae_iointr: TLSB Node %d Hose %d Slot %d - " 254 " unclaimed interrupt\n", ionode + 4, hose, device); 255 } 256 } 257 258 int 259 kn8ae_spurious(arg) 260 void *arg; 261 { 262 int ionode, hose, device; 263 ionode = DWLPX_MVEC_IONODE(arg); 264 hose = DWLPX_MVEC_HOSE(arg); 265 device = DWLPX_MVEC_PCISLOT(arg); 266 printf("Spurious Interrupt from TLSB Node %d Hose %d Slot %d\n", 267 ionode + 4, hose, device); 268 return (-1); 269 } 270 271 272 void 273 kn8ae_enadis_intr(irq, onoff) 274 pci_intr_handle_t irq; 275 int onoff; 276 { 277 unsigned long paddr; 278 u_int32_t val; 279 int ionode, hose, device, hpc, busp, s; 280 281 ionode = DWLPX_MVEC_IONODE(irq); 282 hose = DWLPX_MVEC_HOSE(irq); 283 device = DWLPX_MVEC_PCISLOT(irq); 284 busp = 1 << (((irq >> 16) & 0xff) - 1); 285 paddr = (1LL << 39); 286 paddr |= (unsigned long) ionode << 36; 287 paddr |= (unsigned long) hose << 34; 288 if (device < 4) { 289 hpc = 0; 290 } else if (device < 8) { 291 hpc = 1; 292 device -= 4; 293 } else { 294 hpc = 2; 295 device -= 8; 296 } 297 busp <<= (device << 2); 298 val = imaskcache[ionode][hose][hpc]; 299 if (onoff) 300 val |= busp; 301 else 302 val &= ~busp; 303 imaskcache[ionode][hose][hpc] = val; 304 #if 0 305 printf("kn8ae_%s_intr: irq %lx imsk 0x%x hpc %d TLSB node %d hose %d\n", 306 onoff? "enable" : "disable", irq, val, hpc, ionode + 4, hose); 307 #endif 308 s = splhigh(); 309 REGVAL(PCIA_IMASK(hpc) + paddr) = val; 310 alpha_mb(); 311 (void) splx(s); 312 } 313 314 void 315 kn8ae_enable_intr(irq) 316 pci_intr_handle_t irq; 317 { 318 kn8ae_enadis_intr(irq, 1); 319 } 320 321 void 322 kn8ae_disable_intr(irq) 323 pci_intr_handle_t irq; 324 { 325 kn8ae_enadis_intr(irq, 0); 326 } 327
Indexes created Mon Sep 29 21:09:56 GMT 2025