pci_kn8ae.c revision 1.15
1 /* $NetBSD: pci_kn8ae.c,v 1.15 2000/06/04 19:14:25 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1997 by Matthew Jacob 5 * NASA AMES Research Center. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 34 35 __KERNEL_RCSID(0, "$NetBSD: pci_kn8ae.c,v 1.15 2000/06/04 19:14:25 cgd Exp $"); 36 37 #include <sys/types.h> 38 #include <sys/param.h> 39 #include <sys/time.h> 40 #include <sys/systm.h> 41 #include <sys/errno.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/syslog.h> 45 46 #include <vm/vm.h> 47 48 #include <machine/autoconf.h> 49 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcivar.h> 52 53 #include <alpha/pci/dwlpxreg.h> 54 #include <alpha/pci/dwlpxvar.h> 55 #include <alpha/pci/pci_kn8ae.h> 56 57 #ifndef EVCNT_COUNTERS 58 #include <machine/intrcnt.h> 59 #endif 60 61 int dec_kn8ae_intr_map __P((void *, pcitag_t, int, int, 62 pci_intr_handle_t *)); 63 const char *dec_kn8ae_intr_string __P((void *, pci_intr_handle_t)); 64 const struct evcnt *dec_kn8ae_intr_evcnt __P((void *, pci_intr_handle_t)); 65 void *dec_kn8ae_intr_establish __P((void *, pci_intr_handle_t, 66 int, int (*func)(void *), void *)); 67 void dec_kn8ae_intr_disestablish __P((void *, void *)); 68 69 struct vectab { 70 int (*func) __P((void *)); 71 void *arg; 72 } vectab[DWLPX_NIONODE][DWLPX_NHOSE][DWLPX_MAXDEV]; 73 static u_int32_t imaskcache[DWLPX_NIONODE][DWLPX_NHOSE][NHPC]; 74 75 #ifdef EVCNT_COUNTERS 76 struct evcnt kn8ae_intr_evcnt; 77 #endif 78 79 int kn8ae_spurious __P((void *)); 80 void kn8ae_iointr __P((void *framep, unsigned long vec)); 81 void kn8ae_enadis_intr __P((pci_intr_handle_t, int)); 82 void kn8ae_enable_intr __P((pci_intr_handle_t irq)); 83 void kn8ae_disable_intr __P((pci_intr_handle_t irq)); 84 85 void 86 pci_kn8ae_pickintr(ccp, first) 87 struct dwlpx_config *ccp; 88 int first; 89 { 90 int io, hose, dev; 91 pci_chipset_tag_t pc = &ccp->cc_pc; 92 93 pc->pc_intr_v = ccp; 94 pc->pc_intr_map = dec_kn8ae_intr_map; 95 pc->pc_intr_string = dec_kn8ae_intr_string; 96 pc->pc_intr_evcnt = dec_kn8ae_intr_evcnt; 97 pc->pc_intr_establish = dec_kn8ae_intr_establish; 98 pc->pc_intr_disestablish = dec_kn8ae_intr_disestablish; 99 100 /* Not supported on KN8AE. */ 101 pc->pc_pciide_compat_intr_establish = NULL; 102 103 if (!first) { 104 return; 105 } 106 107 for (io = 0; io < DWLPX_NIONODE; io++) { 108 for (hose = 0; hose < DWLPX_NHOSE; hose++) { 109 for (dev = 0; dev < DWLPX_MAXDEV; dev++) { 110 vectab[io][hose][dev].func = kn8ae_spurious; 111 vectab[io][hose][dev].arg = (void *) 112 (u_int64_t) DWLPX_MVEC(io, hose, dev); 113 } 114 } 115 } 116 for (io = 0; io < DWLPX_NIONODE; io++) { 117 for (hose = 0; hose < DWLPX_NHOSE; hose++) { 118 for (dev = 0; dev < NHPC; dev++) { 119 imaskcache[io][hose][dev] = DWLPX_IMASK_DFLT; 120 } 121 } 122 } 123 set_iointr(kn8ae_iointr); 124 } 125 126 int 127 dec_kn8ae_intr_map(ccv, bustag, buspin, line, ihp) 128 void *ccv; 129 pcitag_t bustag; 130 int buspin, line; 131 pci_intr_handle_t *ihp; 132 { 133 int device, ionode, hose; 134 struct dwlpx_config *ccp = ccv; 135 pci_chipset_tag_t pc = &ccp->cc_pc; 136 137 if (buspin == 0) { 138 /* No IRQ used. */ 139 return 1; 140 } 141 if (buspin > 4) { 142 printf("dec_kn8ae_intr_map: bad interrupt pin %d\n", buspin); 143 return 1; 144 } 145 alpha_pci_decompose_tag(pc, bustag, NULL, &device, NULL); 146 ionode = ccp->cc_sc->dwlpx_node - 4; 147 hose = ccp->cc_sc->dwlpx_hosenum; 148 149 /* 150 * handle layout: 151 * bits 0..15 DWLPX_MVEC(ionode, hose, device) 152 * bits 16-24 buspin (1..N) 153 * bits 24-31 IPL 154 */ 155 *ihp = DWLPX_MVEC(ionode, hose, device) | (buspin << 16) | (14 << 24); 156 return (0); 157 } 158 159 const char * 160 dec_kn8ae_intr_string(ccv, ih) 161 void *ccv; 162 pci_intr_handle_t ih; 163 { 164 static char irqstr[64]; 165 sprintf(irqstr, "kn8ae irq %ld vector 0x%lx PCI Interrupt Pin %c", 166 (ih >> 24), ih & 0xffff, (int)(((ih >> 16) & 0x7) - 1) + 'A'); 167 return (irqstr); 168 } 169 170 const struct evcnt * 171 dec_kn8ae_intr_evcnt(ccv, ih) 172 void *ccv; 173 pci_intr_handle_t ih; 174 { 175 176 /* XXX for now, no evcnt parent reported */ 177 return (NULL); 178 } 179 180 void * 181 dec_kn8ae_intr_establish(ccv, ih, level, func, arg) 182 void *ccv; 183 pci_intr_handle_t ih; 184 int level; 185 int (*func) __P((void *)); 186 void *arg; 187 { 188 struct dwlpx_config *ccp = ccv; 189 void *cookie = NULL; 190 int ionode, hose, device, s; 191 struct vectab *vp; 192 193 ionode = ccp->cc_sc->dwlpx_node - 4; 194 hose = ccp->cc_sc->dwlpx_hosenum; 195 device = DWLPX_MVEC_PCISLOT(ih); 196 197 if (ionode < 0 || ionode >= DWLPX_NIONODE) { 198 panic("dec_kn8ae_intr_establish: bad ionode %d\n", ionode); 199 } 200 if (hose < 0 || hose >= DWLPX_NHOSE) { 201 panic("dec_kn8ae_intr_establish: bad hose %d\n", hose); 202 } 203 if (device < 0 || device >= DWLPX_MAXDEV) { 204 panic("dec_kn8ae_intr_establish: bad device %d\n", device); 205 } 206 207 vp = &vectab[ionode][hose][device]; 208 if (vp->func != kn8ae_spurious) { 209 printf("dec_kn8ae_intr_establish: vector 0x%lx already used\n", 210 ih & 0xffff); 211 return (cookie); 212 } 213 214 s = splhigh(); 215 vp->func = func; 216 vp->arg = arg; 217 (void) splx(s); 218 kn8ae_enable_intr(ih); 219 cookie = (void *) (u_int64_t) DWLPX_MVEC(ionode, hose, device); 220 return (cookie); 221 } 222 223 void 224 dec_kn8ae_intr_disestablish(ccv, cookie) 225 void *ccv, *cookie; 226 { 227 int ionode, hose, device, s; 228 struct vectab *vp; 229 230 ionode = DWLPX_MVEC_IONODE(cookie); 231 hose = DWLPX_MVEC_HOSE(cookie); 232 device = DWLPX_MVEC_PCISLOT(cookie); 233 if (ionode < 0 || ionode >= DWLPX_NIONODE || 234 hose < 0 || hose >= DWLPX_NHOSE || 235 device < 0 || device >= DWLPX_MAXDEV) { 236 return; 237 } 238 vp = &vectab[ionode][hose][device]; 239 s = splhigh(); 240 vp->func = kn8ae_spurious; 241 vp->arg = cookie; 242 (void) splx(s); 243 } 244 245 int 246 kn8ae_spurious(arg) 247 void *arg; 248 { 249 int ionode, hose, device; 250 ionode = DWLPX_MVEC_IONODE(arg); 251 hose = DWLPX_MVEC_HOSE(arg); 252 device = DWLPX_MVEC_PCISLOT(arg); 253 printf("Spurious Interrupt from TLSB Node %d Hose %d Slot %d\n", 254 ionode + 4, hose, device); 255 return (-1); 256 } 257 258 259 void 260 kn8ae_iointr(framep, vec) 261 void *framep; 262 unsigned long vec; 263 { 264 struct vectab *vp; 265 int ionode, hose, device; 266 if ((vec & DWLPX_VEC_EMARK) != 0) { 267 #ifdef EVCNT_COUNTERS 268 kn8ae_intr_evcnt.ev_count++; 269 #else 270 intrcnt[INTRCNT_KN8AE_IRQ]++; 271 #endif 272 dwlpx_iointr(framep, vec); 273 return; 274 } 275 if ((vec & DWLPX_VEC_MARK) == 0) { 276 panic("kn8ae_iointr: vec 0x%lx\n", vec); 277 /* NOTREACHED */ 278 } 279 ionode = DWLPX_MVEC_IONODE(vec); 280 hose = DWLPX_MVEC_HOSE(vec); 281 device = DWLPX_MVEC_PCISLOT(vec); 282 #ifdef EVCNT_COUNTERS 283 kn8ae_intr_evcnt.ev_count++; 284 #else 285 intrcnt[INTRCNT_KN8AE_IRQ+1]++; 286 #endif 287 288 if (ionode < 0 || ionode >= DWLPX_NIONODE || 289 hose < 0 || hose >= DWLPX_NHOSE || 290 device < 0 || device >= DWLPX_MAXDEV) { 291 panic("kn8ae_iointr: malformed vector 0x%lx\n", vec); 292 /* NOTREACHED */ 293 } 294 vp = &vectab[ionode][hose][device]; 295 if ((*vp->func)(vp->arg) == 0) { 296 #if 0 297 printf("kn8ae_iointr: TLSB Node %d Hose %d Slot %d - " 298 " unclaimed interrupt\n", ionode + 4, hose, device); 299 #endif 300 } 301 } 302 303 void 304 kn8ae_enadis_intr(irq, onoff) 305 pci_intr_handle_t irq; 306 int onoff; 307 { 308 unsigned long paddr; 309 u_int32_t val; 310 int ionode, hose, device, hpc, busp, s; 311 312 ionode = DWLPX_MVEC_IONODE(irq); 313 hose = DWLPX_MVEC_HOSE(irq); 314 device = DWLPX_MVEC_PCISLOT(irq); 315 busp = 1 << (((irq >> 16) & 0xff) - 1); 316 paddr = (1LL << 39); 317 paddr |= (unsigned long) ionode << 36; 318 paddr |= (unsigned long) hose << 34; 319 if (device < 4) { 320 hpc = 0; 321 } else if (device < 8) { 322 hpc = 1; 323 device -= 4; 324 } else { 325 hpc = 2; 326 device -= 8; 327 } 328 busp <<= (device << 2); 329 val = imaskcache[ionode][hose][hpc]; 330 if (onoff) 331 val |= busp; 332 else 333 val &= ~busp; 334 imaskcache[ionode][hose][hpc] = val; 335 #if 0 336 printf("kn8ae_%s_intr: irq %lx imsk 0x%x hpc %d TLSB node %d hose %d\n", 337 onoff? "enable" : "disable", irq, val, hpc, ionode + 4, hose); 338 #endif 339 s = splhigh(); 340 REGVAL(PCIA_IMASK(hpc) + paddr) = val; 341 alpha_mb(); 342 (void) splx(s); 343 } 344 345 void 346 kn8ae_enable_intr(irq) 347 pci_intr_handle_t irq; 348 { 349 kn8ae_enadis_intr(irq, 1); 350 } 351 352 void 353 kn8ae_disable_intr(irq) 354 pci_intr_handle_t irq; 355 { 356 kn8ae_enadis_intr(irq, 0); 357 } 358
Indexes created Mon Sep 29 21:09:56 GMT 2025