pci_kn8ae.c revision 1.18
1 /* $NetBSD: pci_kn8ae.c,v 1.18 2000/12/28 22:59:07 sommerfeld Exp $ */ 2 3 /* 4 * Copyright (c) 1997 by Matthew Jacob 5 * NASA AMES Research Center. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 34 35 __KERNEL_RCSID(0, "$NetBSD: pci_kn8ae.c,v 1.18 2000/12/28 22:59:07 sommerfeld Exp $"); 36 37 #include <sys/types.h> 38 #include <sys/param.h> 39 #include <sys/time.h> 40 #include <sys/systm.h> 41 #include <sys/errno.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/syslog.h> 45 46 #include <uvm/uvm_extern.h> 47 48 #include <machine/autoconf.h> 49 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcivar.h> 52 53 #include <alpha/pci/dwlpxreg.h> 54 #include <alpha/pci/dwlpxvar.h> 55 #include <alpha/pci/pci_kn8ae.h> 56 57 int dec_kn8ae_intr_map __P((struct pci_attach_args *, 58 pci_intr_handle_t *)); 59 const char *dec_kn8ae_intr_string __P((void *, pci_intr_handle_t)); 60 const struct evcnt *dec_kn8ae_intr_evcnt __P((void *, pci_intr_handle_t)); 61 void *dec_kn8ae_intr_establish __P((void *, pci_intr_handle_t, 62 int, int (*func)(void *), void *)); 63 void dec_kn8ae_intr_disestablish __P((void *, void *)); 64 65 struct vectab { 66 int (*func) __P((void *)); 67 void *arg; 68 } vectab[DWLPX_NIONODE][DWLPX_NHOSE][DWLPX_MAXDEV]; 69 static u_int32_t imaskcache[DWLPX_NIONODE][DWLPX_NHOSE][NHPC]; 70 71 int kn8ae_spurious __P((void *)); 72 void kn8ae_iointr __P((void *framep, unsigned long vec)); 73 void kn8ae_enadis_intr __P((pci_intr_handle_t, int)); 74 void kn8ae_enable_intr __P((pci_intr_handle_t irq)); 75 void kn8ae_disable_intr __P((pci_intr_handle_t irq)); 76 77 void 78 pci_kn8ae_pickintr(ccp, first) 79 struct dwlpx_config *ccp; 80 int first; 81 { 82 int io, hose, dev; 83 pci_chipset_tag_t pc = &ccp->cc_pc; 84 85 pc->pc_intr_v = ccp; 86 pc->pc_intr_map = dec_kn8ae_intr_map; 87 pc->pc_intr_string = dec_kn8ae_intr_string; 88 pc->pc_intr_evcnt = dec_kn8ae_intr_evcnt; 89 pc->pc_intr_establish = dec_kn8ae_intr_establish; 90 pc->pc_intr_disestablish = dec_kn8ae_intr_disestablish; 91 92 /* Not supported on KN8AE. */ 93 pc->pc_pciide_compat_intr_establish = NULL; 94 95 if (!first) { 96 return; 97 } 98 99 for (io = 0; io < DWLPX_NIONODE; io++) { 100 for (hose = 0; hose < DWLPX_NHOSE; hose++) { 101 for (dev = 0; dev < DWLPX_MAXDEV; dev++) { 102 vectab[io][hose][dev].func = kn8ae_spurious; 103 vectab[io][hose][dev].arg = (void *) 104 (u_int64_t) DWLPX_MVEC(io, hose, dev); 105 } 106 } 107 } 108 for (io = 0; io < DWLPX_NIONODE; io++) { 109 for (hose = 0; hose < DWLPX_NHOSE; hose++) { 110 for (dev = 0; dev < NHPC; dev++) { 111 imaskcache[io][hose][dev] = DWLPX_IMASK_DFLT; 112 } 113 } 114 } 115 set_iointr(kn8ae_iointr); 116 } 117 118 int 119 dec_kn8ae_intr_map(pa, ihp) 120 struct pci_attach_args *pa; 121 pci_intr_handle_t *ihp; 122 { 123 pcitag_t bustag = pa->pa_intrtag; 124 int buspin = pa->pa_intrpin; 125 pci_chipset_tag_t pc = pa->pa_pc; 126 struct dwlpx_config *ccp = (struct dwlpx_config *)pc->pc_intr_v; 127 int device, ionode, hose; 128 129 if (buspin == 0) { 130 /* No IRQ used. */ 131 return 1; 132 } 133 if (buspin > 4) { 134 printf("dec_kn8ae_intr_map: bad interrupt pin %d\n", buspin); 135 return 1; 136 } 137 alpha_pci_decompose_tag(pc, bustag, NULL, &device, NULL); 138 ionode = ccp->cc_sc->dwlpx_node - 4; 139 hose = ccp->cc_sc->dwlpx_hosenum; 140 141 /* 142 * handle layout: 143 * bits 0..15 DWLPX_MVEC(ionode, hose, device) 144 * bits 16-24 buspin (1..N) 145 * bits 24-31 IPL 146 */ 147 *ihp = DWLPX_MVEC(ionode, hose, device) | (buspin << 16) | (14 << 24); 148 return (0); 149 } 150 151 const char * 152 dec_kn8ae_intr_string(ccv, ih) 153 void *ccv; 154 pci_intr_handle_t ih; 155 { 156 static char irqstr[64]; 157 sprintf(irqstr, "kn8ae irq %ld vector 0x%lx PCI Interrupt Pin %c", 158 (ih >> 24), ih & 0xffff, (int)(((ih >> 16) & 0x7) - 1) + 'A'); 159 return (irqstr); 160 } 161 162 const struct evcnt * 163 dec_kn8ae_intr_evcnt(ccv, ih) 164 void *ccv; 165 pci_intr_handle_t ih; 166 { 167 168 /* XXX for now, no evcnt parent reported */ 169 return (NULL); 170 } 171 172 void * 173 dec_kn8ae_intr_establish(ccv, ih, level, func, arg) 174 void *ccv; 175 pci_intr_handle_t ih; 176 int level; 177 int (*func) __P((void *)); 178 void *arg; 179 { 180 struct dwlpx_config *ccp = ccv; 181 void *cookie = NULL; 182 int ionode, hose, device, s; 183 struct vectab *vp; 184 185 ionode = ccp->cc_sc->dwlpx_node - 4; 186 hose = ccp->cc_sc->dwlpx_hosenum; 187 device = DWLPX_MVEC_PCISLOT(ih); 188 189 if (ionode < 0 || ionode >= DWLPX_NIONODE) { 190 panic("dec_kn8ae_intr_establish: bad ionode %d\n", ionode); 191 } 192 if (hose < 0 || hose >= DWLPX_NHOSE) { 193 panic("dec_kn8ae_intr_establish: bad hose %d\n", hose); 194 } 195 if (device < 0 || device >= DWLPX_MAXDEV) { 196 panic("dec_kn8ae_intr_establish: bad device %d\n", device); 197 } 198 199 vp = &vectab[ionode][hose][device]; 200 if (vp->func != kn8ae_spurious) { 201 printf("dec_kn8ae_intr_establish: vector 0x%lx already used\n", 202 ih & 0xffff); 203 return (cookie); 204 } 205 206 s = splhigh(); 207 vp->func = func; 208 vp->arg = arg; 209 (void) splx(s); 210 kn8ae_enable_intr(ih); 211 cookie = (void *) (u_int64_t) DWLPX_MVEC(ionode, hose, device); 212 return (cookie); 213 } 214 215 void 216 dec_kn8ae_intr_disestablish(ccv, cookie) 217 void *ccv, *cookie; 218 { 219 int ionode, hose, device, s; 220 struct vectab *vp; 221 222 ionode = DWLPX_MVEC_IONODE(cookie); 223 hose = DWLPX_MVEC_HOSE(cookie); 224 device = DWLPX_MVEC_PCISLOT(cookie); 225 if (ionode < 0 || ionode >= DWLPX_NIONODE || 226 hose < 0 || hose >= DWLPX_NHOSE || 227 device < 0 || device >= DWLPX_MAXDEV) { 228 return; 229 } 230 vp = &vectab[ionode][hose][device]; 231 s = splhigh(); 232 vp->func = kn8ae_spurious; 233 vp->arg = cookie; 234 (void) splx(s); 235 } 236 237 int 238 kn8ae_spurious(arg) 239 void *arg; 240 { 241 int ionode, hose, device; 242 ionode = DWLPX_MVEC_IONODE(arg); 243 hose = DWLPX_MVEC_HOSE(arg); 244 device = DWLPX_MVEC_PCISLOT(arg); 245 printf("Spurious Interrupt from TLSB Node %d Hose %d Slot %d\n", 246 ionode + 4, hose, device); 247 return (-1); 248 } 249 250 251 void 252 kn8ae_iointr(framep, vec) 253 void *framep; 254 unsigned long vec; 255 { 256 struct vectab *vp; 257 int ionode, hose, device; 258 if ((vec & DWLPX_VEC_EMARK) != 0) { 259 dwlpx_iointr(framep, vec); 260 return; 261 } 262 if ((vec & DWLPX_VEC_MARK) == 0) { 263 panic("kn8ae_iointr: vec 0x%lx\n", vec); 264 /* NOTREACHED */ 265 } 266 ionode = DWLPX_MVEC_IONODE(vec); 267 hose = DWLPX_MVEC_HOSE(vec); 268 device = DWLPX_MVEC_PCISLOT(vec); 269 270 if (ionode < 0 || ionode >= DWLPX_NIONODE || 271 hose < 0 || hose >= DWLPX_NHOSE || 272 device < 0 || device >= DWLPX_MAXDEV) { 273 panic("kn8ae_iointr: malformed vector 0x%lx\n", vec); 274 /* NOTREACHED */ 275 } 276 vp = &vectab[ionode][hose][device]; 277 if ((*vp->func)(vp->arg) == 0) { 278 #if 0 279 printf("kn8ae_iointr: TLSB Node %d Hose %d Slot %d - " 280 " unclaimed interrupt\n", ionode + 4, hose, device); 281 #endif 282 } 283 } 284 285 void 286 kn8ae_enadis_intr(irq, onoff) 287 pci_intr_handle_t irq; 288 int onoff; 289 { 290 unsigned long paddr; 291 u_int32_t val; 292 int ionode, hose, device, hpc, busp, s; 293 294 ionode = DWLPX_MVEC_IONODE(irq); 295 hose = DWLPX_MVEC_HOSE(irq); 296 device = DWLPX_MVEC_PCISLOT(irq); 297 busp = 1 << (((irq >> 16) & 0xff) - 1); 298 paddr = (1LL << 39); 299 paddr |= (unsigned long) ionode << 36; 300 paddr |= (unsigned long) hose << 34; 301 if (device < 4) { 302 hpc = 0; 303 } else if (device < 8) { 304 hpc = 1; 305 device -= 4; 306 } else { 307 hpc = 2; 308 device -= 8; 309 } 310 busp <<= (device << 2); 311 val = imaskcache[ionode][hose][hpc]; 312 if (onoff) 313 val |= busp; 314 else 315 val &= ~busp; 316 imaskcache[ionode][hose][hpc] = val; 317 #if 0 318 printf("kn8ae_%s_intr: irq %lx imsk 0x%x hpc %d TLSB node %d hose %d\n", 319 onoff? "enable" : "disable", irq, val, hpc, ionode + 4, hose); 320 #endif 321 s = splhigh(); 322 REGVAL(PCIA_IMASK(hpc) + paddr) = val; 323 alpha_mb(); 324 (void) splx(s); 325 } 326 327 void 328 kn8ae_enable_intr(irq) 329 pci_intr_handle_t irq; 330 { 331 kn8ae_enadis_intr(irq, 1); 332 } 333 334 void 335 kn8ae_disable_intr(irq) 336 pci_intr_handle_t irq; 337 { 338 kn8ae_enadis_intr(irq, 0); 339 } 340
Indexes created Tue Sep 30 11:09:46 GMT 2025