pci_kn8ae.c revision 1.2
1 /* $NetBSD: pci_kn8ae.c,v 1.2 1997/03/12 21:10:19 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1997 by Matthew Jacob 5 * NASA AMES Research Center. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <sys/types.h> 34 #include <sys/param.h> 35 #include <sys/time.h> 36 #include <sys/systm.h> 37 #include <sys/errno.h> 38 #include <sys/malloc.h> 39 #include <sys/device.h> 40 #include <sys/syslog.h> 41 42 #include <vm/vm.h> 43 44 #include <machine/autoconf.h> 45 46 #include <dev/pci/pcireg.h> 47 #include <dev/pci/pcivar.h> 48 49 #include <alpha/pci/dwlpxreg.h> 50 #include <alpha/pci/dwlpxvar.h> 51 #include <alpha/pci/pci_kn8ae.h> 52 53 #ifndef EVCNT_COUNTERS 54 #include <machine/intrcnt.h> 55 #endif 56 57 int dec_kn8ae_intr_map __P((void *, pcitag_t, int, int, 58 pci_intr_handle_t *)); 59 const char *dec_kn8ae_intr_string __P((void *, pci_intr_handle_t)); 60 void *dec_kn8ae_intr_establish __P((void *, pci_intr_handle_t, 61 int, int (*func)(void *), void *)); 62 void dec_kn8ae_intr_disestablish __P((void *, void *)); 63 64 #define NIONODE 5 65 #define NHOSE 4 66 struct vectab { 67 int (*func) __P((void *)); 68 void *arg; 69 } vectab[NIONODE][NHOSE][DWLPX_MAXDEV]; 70 static u_int32_t imaskcache[NIONODE][NHOSE][NHPC]; 71 72 #ifdef EVCNT_COUNTERS 73 struct evcnt kn8ae_intr_evcnt; 74 #endif 75 76 int kn8ae_spurious __P((void *)); 77 void kn8ae_iointr __P((void *framep, unsigned long vec)); 78 void kn8ae_enadis_intr __P((pci_intr_handle_t, int)); 79 void kn8ae_enable_intr __P((pci_intr_handle_t irq)); 80 void kn8ae_disable_intr __P((pci_intr_handle_t irq)); 81 82 void 83 pci_kn8ae_pickintr(ccp, first) 84 struct dwlpx_config *ccp; 85 int first; 86 { 87 int io, hose, dev; 88 pci_chipset_tag_t pc = &ccp->cc_pc; 89 90 pc->pc_intr_v = ccp; 91 pc->pc_intr_map = dec_kn8ae_intr_map; 92 pc->pc_intr_string = dec_kn8ae_intr_string; 93 pc->pc_intr_establish = dec_kn8ae_intr_establish; 94 pc->pc_intr_disestablish = dec_kn8ae_intr_disestablish; 95 96 if (!first) { 97 return; 98 } 99 100 for (io = 0; io < NIONODE; io++) { 101 for (hose = 0; hose < NHOSE; hose++) { 102 for (dev = 0; dev < DWLPX_MAXDEV; dev++) { 103 vectab[io][hose][dev].func = kn8ae_spurious; 104 vectab[io][hose][dev].arg = (void *) 105 (u_int64_t) DWLPX_MVEC(io, hose, dev); 106 } 107 } 108 } 109 for (io = 0; io < NIONODE; io++) { 110 for (hose = 0; hose < NHOSE; hose++) { 111 for (dev = 0; dev < NHPC; dev++) { 112 imaskcache[io][hose][dev] = DWLPX_IMASK_DFLT; 113 } 114 } 115 } 116 set_iointr(kn8ae_iointr); 117 } 118 119 int 120 dec_kn8ae_intr_map(ccv, bustag, buspin, line, ihp) 121 void *ccv; 122 pcitag_t bustag; 123 int buspin, line; 124 pci_intr_handle_t *ihp; 125 { 126 int device, ionode, hose; 127 struct dwlpx_config *ccp = ccv; 128 pci_chipset_tag_t pc = &ccp->cc_pc; 129 130 if (buspin == 0) { 131 /* No IRQ used. */ 132 return 1; 133 } 134 if (buspin > 4) { 135 printf("pci_map_int: bad interrupt pin %d\n", buspin); 136 return 1; 137 } 138 pci_decompose_tag(pc, bustag, NULL, &device, NULL); 139 ionode = ccp->cc_sc->dwlpx_node - 4; 140 hose = ccp->cc_sc->dwlpx_hosenum; 141 142 /* 143 * handle layout: 144 * bits 0..15 DWLPX_MVEC(ionode, hose, device) 145 * bits 16-24 buspin (1..N) 146 * bits 24-31 IPL 147 */ 148 *ihp = DWLPX_MVEC(ionode, hose, device) | (buspin << 16) | (14 << 24); 149 return (0); 150 } 151 152 const char * 153 dec_kn8ae_intr_string(ccv, ih) 154 void *ccv; 155 pci_intr_handle_t ih; 156 { 157 static char irqstr[64]; 158 sprintf(irqstr, "kn8ae irq %d vector 0x%x PCI Interrupt Pin %c", 159 (ih >> 24), ih & 0xffff, (((ih >> 16) & 0x7) - 1) + 'A'); 160 return (irqstr); 161 } 162 163 void * 164 dec_kn8ae_intr_establish(ccv, ih, level, func, arg) 165 void *ccv; 166 pci_intr_handle_t ih; 167 int level; 168 int (*func) __P((void *)); 169 void *arg; 170 { 171 struct dwlpx_config *ccp = ccv; 172 void *cookie = NULL; 173 int ionode, hose, device, s; 174 struct vectab *vp; 175 176 ionode = ccp->cc_sc->dwlpx_node - 4; 177 hose = ccp->cc_sc->dwlpx_hosenum; 178 device = DWLPX_MVEC_PCISLOT(ih); 179 180 if (ionode < 0 || ionode >= NIONODE) { 181 panic("dec_kn8ae_intr_establish: bad ionode %d\n", ionode); 182 } 183 if (hose < 0 || hose >= NHOSE) { 184 panic("dec_kn8ae_intr_establish: bad hose %d\n", hose); 185 } 186 if (device < 0 || device >= DWLPX_MAXDEV) { 187 panic("dec_kn8ae_intr_establish: bad device %d\n", device); 188 } 189 190 vp = &vectab[ionode][hose][device]; 191 if (vp->func != kn8ae_spurious) { 192 printf("dec_kn8ae_intr_establish: vector 0x%x already used\n", 193 ih & 0xffff); 194 return (cookie); 195 } 196 197 s = splhigh(); 198 vp->func = func; 199 vp->arg = arg; 200 (void) splx(s); 201 kn8ae_enable_intr(ih); 202 cookie = (void *) (u_int64_t) DWLPX_MVEC(ionode, hose, device); 203 return (cookie); 204 } 205 206 void 207 dec_kn8ae_intr_disestablish(ccv, cookie) 208 void *ccv, *cookie; 209 { 210 int ionode, hose, device, s; 211 struct vectab *vp; 212 213 ionode = DWLPX_MVEC_IONODE(cookie); 214 hose = DWLPX_MVEC_HOSE(cookie); 215 device = DWLPX_MVEC_PCISLOT(cookie); 216 if (ionode < 0 || ionode >= NIONODE || hose < 0 || hose >= NHOSE || 217 device < 0 || device >= DWLPX_MAXDEV) { 218 return; 219 } 220 vp = &vectab[ionode][hose][device]; 221 s = splhigh(); 222 vp->func = kn8ae_spurious; 223 vp->arg = cookie; 224 (void) splx(s); 225 } 226 227 void 228 kn8ae_iointr(framep, vec) 229 void *framep; 230 unsigned long vec; 231 { 232 struct vectab *vp; 233 int ionode, hose, device; 234 if ((vec & DWLPX_VEC_MARK) == 0) { 235 panic("kn8ae_iointr: vec 0x%x\n", vec); 236 } 237 #ifdef EVCNT_COUNTERS 238 kn8ae_intr_evcnt.ev_count++; 239 #else 240 ; /* XXX */ 241 #endif 242 ionode = DWLPX_MVEC_IONODE(vec); 243 hose = DWLPX_MVEC_HOSE(vec); 244 device = DWLPX_MVEC_PCISLOT(vec); 245 246 if (ionode < 0 || ionode >= NIONODE || hose < 0 || hose >= NHOSE || 247 device < 0 || device >= DWLPX_MAXDEV) { 248 panic("kn8ae_iointr: malformed vector 0x%x\n", vec); 249 } 250 vp = &vectab[ionode][hose][device]; 251 if ((*vp->func)(vp->arg) == 0) { 252 printf("kn8ae_iointr: TLSB Node %d Hose %d Slot %d - " 253 " unclaimed interrupt\n", ionode + 4, hose, device); 254 } 255 } 256 257 int 258 kn8ae_spurious(arg) 259 void *arg; 260 { 261 int ionode, hose, device; 262 ionode = DWLPX_MVEC_IONODE(arg); 263 hose = DWLPX_MVEC_HOSE(arg); 264 device = DWLPX_MVEC_PCISLOT(arg); 265 printf("Spurious Interrupt from TLSB Node %d Hose %d Slot %d\n", 266 ionode + 4, hose, device); 267 return (-1); 268 } 269 270 271 void 272 kn8ae_enadis_intr(irq, onoff) 273 pci_intr_handle_t irq; 274 int onoff; 275 { 276 unsigned long paddr; 277 u_int32_t val; 278 int ionode, hose, device, hpc, busp, s; 279 280 ionode = DWLPX_MVEC_IONODE(irq); 281 hose = DWLPX_MVEC_HOSE(irq); 282 device = DWLPX_MVEC_PCISLOT(irq); 283 busp = 1 << (((irq >> 16) & 0xff) - 1); 284 paddr = (1LL << 39); 285 paddr |= (unsigned long) ionode << 36; 286 paddr |= (unsigned long) hose << 34; 287 if (device < 4) { 288 hpc = 0; 289 } else if (device < 8) { 290 hpc = 1; 291 device -= 4; 292 } else { 293 hpc = 2; 294 device -= 8; 295 } 296 busp <<= (device << 2); 297 val = imaskcache[ionode][hose][hpc]; 298 if (onoff) 299 val |= busp; 300 else 301 val &= ~busp; 302 imaskcache[ionode][hose][hpc] = val; 303 #if 0 304 printf("kn8ae_%s_intr: irq %lx imsk 0x%x hpc %d TLSB node %d hose %d\n", 305 onoff? "enable" : "disable", irq, val, hpc, ionode + 4, hose); 306 #endif 307 s = splhigh(); 308 REGVAL(PCIA_IMASK(hpc) + paddr) = val; 309 alpha_mb(); 310 (void) splx(s); 311 } 312 313 void 314 kn8ae_enable_intr(irq) 315 pci_intr_handle_t irq; 316 { 317 kn8ae_enadis_intr(irq, 1); 318 } 319 320 void 321 kn8ae_disable_intr(irq) 322 pci_intr_handle_t irq; 323 { 324 kn8ae_enadis_intr(irq, 0); 325 } 326
Indexes created Mon Sep 29 15:09:53 GMT 2025