pci_kn8ae.c revision 1.22
1 /* $NetBSD: pci_kn8ae.c,v 1.22 2009/03/14 14:45:53 dsl Exp $ */ 2 3 /* 4 * Copyright (c) 1997 by Matthew Jacob 5 * NASA AMES Research Center. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 34 35 __KERNEL_RCSID(0, "$NetBSD: pci_kn8ae.c,v 1.22 2009/03/14 14:45:53 dsl Exp $"); 36 37 #include <sys/types.h> 38 #include <sys/param.h> 39 #include <sys/time.h> 40 #include <sys/systm.h> 41 #include <sys/errno.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/syslog.h> 45 46 #include <uvm/uvm_extern.h> 47 48 #include <machine/autoconf.h> 49 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcivar.h> 52 53 #include <alpha/pci/dwlpxreg.h> 54 #include <alpha/pci/dwlpxvar.h> 55 #include <alpha/pci/pci_kn8ae.h> 56 57 int dec_kn8ae_intr_map(struct pci_attach_args *, 58 pci_intr_handle_t *); 59 const char *dec_kn8ae_intr_string(void *, pci_intr_handle_t); 60 const struct evcnt *dec_kn8ae_intr_evcnt(void *, pci_intr_handle_t); 61 void *dec_kn8ae_intr_establish(void *, pci_intr_handle_t, 62 int, int (*func)(void *), void *); 63 void dec_kn8ae_intr_disestablish(void *, void *); 64 65 static u_int32_t imaskcache[DWLPX_NIONODE][DWLPX_NHOSE][NHPC]; 66 67 void kn8ae_spurious(void *, u_long); 68 void kn8ae_enadis_intr(struct dwlpx_config *, pci_intr_handle_t, int); 69 70 void 71 pci_kn8ae_pickintr(ccp, first) 72 struct dwlpx_config *ccp; 73 int first; 74 { 75 int io, hose, dev; 76 pci_chipset_tag_t pc = &ccp->cc_pc; 77 78 pc->pc_intr_v = ccp; 79 pc->pc_intr_map = dec_kn8ae_intr_map; 80 pc->pc_intr_string = dec_kn8ae_intr_string; 81 pc->pc_intr_evcnt = dec_kn8ae_intr_evcnt; 82 pc->pc_intr_establish = dec_kn8ae_intr_establish; 83 pc->pc_intr_disestablish = dec_kn8ae_intr_disestablish; 84 85 /* Not supported on KN8AE. */ 86 pc->pc_pciide_compat_intr_establish = NULL; 87 88 if (!first) { 89 return; 90 } 91 92 for (io = 0; io < DWLPX_NIONODE; io++) { 93 for (hose = 0; hose < DWLPX_NHOSE; hose++) { 94 for (dev = 0; dev < NHPC; dev++) { 95 imaskcache[io][hose][dev] = DWLPX_IMASK_DFLT; 96 } 97 } 98 } 99 } 100 101 #define IH_MAKE(vec, dev, pin) \ 102 ((vec) | ((dev) << 16) | ((pin) << 24)) 103 104 #define IH_VEC(ih) ((ih) & 0xffff) 105 #define IH_DEV(ih) (((ih) >> 16) & 0xff) 106 #define IH_PIN(ih) (((ih) >> 24) & 0xff) 107 108 int 109 dec_kn8ae_intr_map(pa, ihp) 110 struct pci_attach_args *pa; 111 pci_intr_handle_t *ihp; 112 { 113 pcitag_t bustag = pa->pa_intrtag; 114 int buspin = pa->pa_intrpin; 115 pci_chipset_tag_t pc = pa->pa_pc; 116 int device; 117 u_long vec; 118 119 if (buspin == 0) { 120 /* No IRQ used. */ 121 return 1; 122 } 123 if (buspin > 4) { 124 printf("dec_kn8ae_intr_map: bad interrupt pin %d\n", buspin); 125 return 1; 126 } 127 pci_decompose_tag(pc, bustag, NULL, &device, NULL); 128 129 vec = scb_alloc(kn8ae_spurious, NULL); 130 if (vec == SCB_ALLOC_FAILED) { 131 printf("dec_kn8ae_intr_map: no vector available for " 132 "device %d pin %d\n", device, buspin); 133 return 1; 134 } 135 136 *ihp = IH_MAKE(vec, device, buspin); 137 138 return (0); 139 } 140 141 const char * 142 dec_kn8ae_intr_string(ccv, ih) 143 void *ccv; 144 pci_intr_handle_t ih; 145 { 146 static char irqstr[64]; 147 148 sprintf(irqstr, "vector 0x%lx", IH_VEC(ih)); 149 150 return (irqstr); 151 } 152 153 const struct evcnt * 154 dec_kn8ae_intr_evcnt(ccv, ih) 155 void *ccv; 156 pci_intr_handle_t ih; 157 { 158 159 /* XXX for now, no evcnt parent reported */ 160 return (NULL); 161 } 162 163 void * 164 dec_kn8ae_intr_establish(ccv, ih, level, func, arg) 165 void *ccv; 166 pci_intr_handle_t ih; 167 int level; 168 int (*func)(void *); 169 void *arg; 170 { 171 struct dwlpx_config *ccp = ccv; 172 void *cookie; 173 struct scbvec *scb; 174 u_long vec; 175 int pin, device, hpc; 176 177 device = IH_DEV(ih); 178 pin = IH_PIN(ih); 179 vec = IH_VEC(ih); 180 181 scb = &scb_iovectab[SCB_VECTOIDX(vec - SCB_IOVECBASE)]; 182 183 if (scb->scb_func != kn8ae_spurious) { 184 printf("dec_kn8ae_intr_establish: vector 0x%lx not mapped\n", 185 vec); 186 return (NULL); 187 } 188 189 /* 190 * NOTE: The PCIA hardware doesn't support interrupt sharing, 191 * so we don't have to worry about it (in theory, at least). 192 */ 193 194 scb->scb_arg = arg; 195 alpha_mb(); 196 scb->scb_func = (void (*)(void *, u_long))func; 197 alpha_mb(); 198 199 if (device < 4) { 200 hpc = 0; 201 } else if (device < 8) { 202 device -= 4; 203 hpc = 1; 204 } else { 205 device -= 8; 206 hpc = 2; 207 } 208 REGVAL(PCIA_DEVVEC(hpc, device, pin) + ccp->cc_sysbase) = vec; 209 210 kn8ae_enadis_intr(ccp, ih, 1); 211 212 cookie = (void *) ih; 213 214 return (cookie); 215 } 216 217 void 218 dec_kn8ae_intr_disestablish(ccv, cookie) 219 void *ccv, *cookie; 220 { 221 struct dwlpx_config *ccp = ccv; 222 pci_intr_handle_t ih = (u_long) cookie; 223 struct scbvec *scb; 224 u_long vec; 225 226 vec = IH_VEC(ih); 227 228 scb = &scb_iovectab[SCB_VECTOIDX(vec - SCB_IOVECBASE)]; 229 230 kn8ae_enadis_intr(ccp, ih, 0); 231 232 scb_free(vec); 233 } 234 235 void 236 kn8ae_spurious(void *arg, u_long vec) 237 { 238 printf("Spurious interrupt on temporary interrupt vector 0x%lx\n", vec); 239 } 240 241 void 242 kn8ae_enadis_intr(ccp, irq, onoff) 243 struct dwlpx_config *ccp; 244 pci_intr_handle_t irq; 245 int onoff; 246 { 247 struct dwlpx_softc *sc = ccp->cc_sc; 248 unsigned long paddr; 249 u_int32_t val; 250 int ionode, hose, device, hpc, busp, s; 251 252 ionode = sc->dwlpx_node - 4; 253 hose = sc->dwlpx_hosenum; 254 255 device = IH_DEV(irq); 256 busp = (1 << (IH_PIN(irq) - 1)); 257 258 paddr = (1LL << 39); 259 paddr |= (unsigned long) ionode << 36; 260 paddr |= (unsigned long) hose << 34; 261 262 if (device < 4) { 263 hpc = 0; 264 } else if (device < 8) { 265 hpc = 1; 266 device -= 4; 267 } else { 268 hpc = 2; 269 device -= 8; 270 } 271 busp <<= (device << 2); 272 val = imaskcache[ionode][hose][hpc]; 273 if (onoff) 274 val |= busp; 275 else 276 val &= ~busp; 277 imaskcache[ionode][hose][hpc] = val; 278 #if 0 279 printf("kn8ae_%s_intr: irq %lx imsk 0x%x hpc %d TLSB node %d hose %d\n", 280 onoff? "enable" : "disable", irq, val, hpc, ionode + 4, hose); 281 #endif 282 s = splhigh(); 283 REGVAL(PCIA_IMASK(hpc) + paddr) = val; 284 alpha_mb(); 285 (void) splx(s); 286 } 287
Indexes created Tue Sep 30 11:09:46 GMT 2025