pci_kn8ae.c revision 1.3
1 /* $NetBSD: pci_kn8ae.c,v 1.3 1997/04/07 02:01:26 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1997 by Matthew Jacob 5 * NASA AMES Research Center. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <machine/options.h> /* Pull in config options headers */ 34 35 #include <sys/types.h> 36 #include <sys/param.h> 37 #include <sys/time.h> 38 #include <sys/systm.h> 39 #include <sys/errno.h> 40 #include <sys/malloc.h> 41 #include <sys/device.h> 42 #include <sys/syslog.h> 43 44 #include <vm/vm.h> 45 46 #include <machine/autoconf.h> 47 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcivar.h> 50 51 #include <alpha/pci/dwlpxreg.h> 52 #include <alpha/pci/dwlpxvar.h> 53 #include <alpha/pci/pci_kn8ae.h> 54 55 #ifndef EVCNT_COUNTERS 56 #include <machine/intrcnt.h> 57 #endif 58 59 int dec_kn8ae_intr_map __P((void *, pcitag_t, int, int, 60 pci_intr_handle_t *)); 61 const char *dec_kn8ae_intr_string __P((void *, pci_intr_handle_t)); 62 void *dec_kn8ae_intr_establish __P((void *, pci_intr_handle_t, 63 int, int (*func)(void *), void *)); 64 void dec_kn8ae_intr_disestablish __P((void *, void *)); 65 66 #define NIONODE 5 67 #define NHOSE 4 68 struct vectab { 69 int (*func) __P((void *)); 70 void *arg; 71 } vectab[NIONODE][NHOSE][DWLPX_MAXDEV]; 72 static u_int32_t imaskcache[NIONODE][NHOSE][NHPC]; 73 74 #ifdef EVCNT_COUNTERS 75 struct evcnt kn8ae_intr_evcnt; 76 #endif 77 78 int kn8ae_spurious __P((void *)); 79 void kn8ae_iointr __P((void *framep, unsigned long vec)); 80 void kn8ae_enadis_intr __P((pci_intr_handle_t, int)); 81 void kn8ae_enable_intr __P((pci_intr_handle_t irq)); 82 void kn8ae_disable_intr __P((pci_intr_handle_t irq)); 83 84 void 85 pci_kn8ae_pickintr(ccp, first) 86 struct dwlpx_config *ccp; 87 int first; 88 { 89 int io, hose, dev; 90 pci_chipset_tag_t pc = &ccp->cc_pc; 91 92 pc->pc_intr_v = ccp; 93 pc->pc_intr_map = dec_kn8ae_intr_map; 94 pc->pc_intr_string = dec_kn8ae_intr_string; 95 pc->pc_intr_establish = dec_kn8ae_intr_establish; 96 pc->pc_intr_disestablish = dec_kn8ae_intr_disestablish; 97 98 if (!first) { 99 return; 100 } 101 102 for (io = 0; io < NIONODE; io++) { 103 for (hose = 0; hose < NHOSE; hose++) { 104 for (dev = 0; dev < DWLPX_MAXDEV; dev++) { 105 vectab[io][hose][dev].func = kn8ae_spurious; 106 vectab[io][hose][dev].arg = (void *) 107 (u_int64_t) DWLPX_MVEC(io, hose, dev); 108 } 109 } 110 } 111 for (io = 0; io < NIONODE; io++) { 112 for (hose = 0; hose < NHOSE; hose++) { 113 for (dev = 0; dev < NHPC; dev++) { 114 imaskcache[io][hose][dev] = DWLPX_IMASK_DFLT; 115 } 116 } 117 } 118 set_iointr(kn8ae_iointr); 119 } 120 121 int 122 dec_kn8ae_intr_map(ccv, bustag, buspin, line, ihp) 123 void *ccv; 124 pcitag_t bustag; 125 int buspin, line; 126 pci_intr_handle_t *ihp; 127 { 128 int device, ionode, hose; 129 struct dwlpx_config *ccp = ccv; 130 pci_chipset_tag_t pc = &ccp->cc_pc; 131 132 if (buspin == 0) { 133 /* No IRQ used. */ 134 return 1; 135 } 136 if (buspin > 4) { 137 printf("pci_map_int: bad interrupt pin %d\n", buspin); 138 return 1; 139 } 140 pci_decompose_tag(pc, bustag, NULL, &device, NULL); 141 ionode = ccp->cc_sc->dwlpx_node - 4; 142 hose = ccp->cc_sc->dwlpx_hosenum; 143 144 /* 145 * handle layout: 146 * bits 0..15 DWLPX_MVEC(ionode, hose, device) 147 * bits 16-24 buspin (1..N) 148 * bits 24-31 IPL 149 */ 150 *ihp = DWLPX_MVEC(ionode, hose, device) | (buspin << 16) | (14 << 24); 151 return (0); 152 } 153 154 const char * 155 dec_kn8ae_intr_string(ccv, ih) 156 void *ccv; 157 pci_intr_handle_t ih; 158 { 159 static char irqstr[64]; 160 sprintf(irqstr, "kn8ae irq %d vector 0x%x PCI Interrupt Pin %c", 161 (ih >> 24), ih & 0xffff, (((ih >> 16) & 0x7) - 1) + 'A'); 162 return (irqstr); 163 } 164 165 void * 166 dec_kn8ae_intr_establish(ccv, ih, level, func, arg) 167 void *ccv; 168 pci_intr_handle_t ih; 169 int level; 170 int (*func) __P((void *)); 171 void *arg; 172 { 173 struct dwlpx_config *ccp = ccv; 174 void *cookie = NULL; 175 int ionode, hose, device, s; 176 struct vectab *vp; 177 178 ionode = ccp->cc_sc->dwlpx_node - 4; 179 hose = ccp->cc_sc->dwlpx_hosenum; 180 device = DWLPX_MVEC_PCISLOT(ih); 181 182 if (ionode < 0 || ionode >= NIONODE) { 183 panic("dec_kn8ae_intr_establish: bad ionode %d\n", ionode); 184 } 185 if (hose < 0 || hose >= NHOSE) { 186 panic("dec_kn8ae_intr_establish: bad hose %d\n", hose); 187 } 188 if (device < 0 || device >= DWLPX_MAXDEV) { 189 panic("dec_kn8ae_intr_establish: bad device %d\n", device); 190 } 191 192 vp = &vectab[ionode][hose][device]; 193 if (vp->func != kn8ae_spurious) { 194 printf("dec_kn8ae_intr_establish: vector 0x%x already used\n", 195 ih & 0xffff); 196 return (cookie); 197 } 198 199 s = splhigh(); 200 vp->func = func; 201 vp->arg = arg; 202 (void) splx(s); 203 kn8ae_enable_intr(ih); 204 cookie = (void *) (u_int64_t) DWLPX_MVEC(ionode, hose, device); 205 return (cookie); 206 } 207 208 void 209 dec_kn8ae_intr_disestablish(ccv, cookie) 210 void *ccv, *cookie; 211 { 212 int ionode, hose, device, s; 213 struct vectab *vp; 214 215 ionode = DWLPX_MVEC_IONODE(cookie); 216 hose = DWLPX_MVEC_HOSE(cookie); 217 device = DWLPX_MVEC_PCISLOT(cookie); 218 if (ionode < 0 || ionode >= NIONODE || hose < 0 || hose >= NHOSE || 219 device < 0 || device >= DWLPX_MAXDEV) { 220 return; 221 } 222 vp = &vectab[ionode][hose][device]; 223 s = splhigh(); 224 vp->func = kn8ae_spurious; 225 vp->arg = cookie; 226 (void) splx(s); 227 } 228 229 void 230 kn8ae_iointr(framep, vec) 231 void *framep; 232 unsigned long vec; 233 { 234 struct vectab *vp; 235 int ionode, hose, device; 236 if ((vec & DWLPX_VEC_MARK) == 0) { 237 panic("kn8ae_iointr: vec 0x%x\n", vec); 238 } 239 #ifdef EVCNT_COUNTERS 240 kn8ae_intr_evcnt.ev_count++; 241 #else 242 ; /* XXX */ 243 #endif 244 ionode = DWLPX_MVEC_IONODE(vec); 245 hose = DWLPX_MVEC_HOSE(vec); 246 device = DWLPX_MVEC_PCISLOT(vec); 247 248 if (ionode < 0 || ionode >= NIONODE || hose < 0 || hose >= NHOSE || 249 device < 0 || device >= DWLPX_MAXDEV) { 250 panic("kn8ae_iointr: malformed vector 0x%x\n", vec); 251 } 252 vp = &vectab[ionode][hose][device]; 253 if ((*vp->func)(vp->arg) == 0) { 254 printf("kn8ae_iointr: TLSB Node %d Hose %d Slot %d - " 255 " unclaimed interrupt\n", ionode + 4, hose, device); 256 } 257 } 258 259 int 260 kn8ae_spurious(arg) 261 void *arg; 262 { 263 int ionode, hose, device; 264 ionode = DWLPX_MVEC_IONODE(arg); 265 hose = DWLPX_MVEC_HOSE(arg); 266 device = DWLPX_MVEC_PCISLOT(arg); 267 printf("Spurious Interrupt from TLSB Node %d Hose %d Slot %d\n", 268 ionode + 4, hose, device); 269 return (-1); 270 } 271 272 273 void 274 kn8ae_enadis_intr(irq, onoff) 275 pci_intr_handle_t irq; 276 int onoff; 277 { 278 unsigned long paddr; 279 u_int32_t val; 280 int ionode, hose, device, hpc, busp, s; 281 282 ionode = DWLPX_MVEC_IONODE(irq); 283 hose = DWLPX_MVEC_HOSE(irq); 284 device = DWLPX_MVEC_PCISLOT(irq); 285 busp = 1 << (((irq >> 16) & 0xff) - 1); 286 paddr = (1LL << 39); 287 paddr |= (unsigned long) ionode << 36; 288 paddr |= (unsigned long) hose << 34; 289 if (device < 4) { 290 hpc = 0; 291 } else if (device < 8) { 292 hpc = 1; 293 device -= 4; 294 } else { 295 hpc = 2; 296 device -= 8; 297 } 298 busp <<= (device << 2); 299 val = imaskcache[ionode][hose][hpc]; 300 if (onoff) 301 val |= busp; 302 else 303 val &= ~busp; 304 imaskcache[ionode][hose][hpc] = val; 305 #if 0 306 printf("kn8ae_%s_intr: irq %lx imsk 0x%x hpc %d TLSB node %d hose %d\n", 307 onoff? "enable" : "disable", irq, val, hpc, ionode + 4, hose); 308 #endif 309 s = splhigh(); 310 REGVAL(PCIA_IMASK(hpc) + paddr) = val; 311 alpha_mb(); 312 (void) splx(s); 313 } 314 315 void 316 kn8ae_enable_intr(irq) 317 pci_intr_handle_t irq; 318 { 319 kn8ae_enadis_intr(irq, 1); 320 } 321 322 void 323 kn8ae_disable_intr(irq) 324 pci_intr_handle_t irq; 325 { 326 kn8ae_enadis_intr(irq, 0); 327 } 328
Indexes created Mon Sep 29 13:09:55 GMT 2025