pci_kn8ae.c revision 1.30
1 /* $NetBSD: pci_kn8ae.c,v 1.30 2020/09/22 15:24:02 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1997 by Matthew Jacob 5 * NASA AMES Research Center. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 34 35 __KERNEL_RCSID(0, "$NetBSD: pci_kn8ae.c,v 1.30 2020/09/22 15:24:02 thorpej Exp $"); 36 37 #include <sys/types.h> 38 #include <sys/param.h> 39 #include <sys/time.h> 40 #include <sys/systm.h> 41 #include <sys/errno.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/syslog.h> 45 46 #include <machine/autoconf.h> 47 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcivar.h> 50 51 #include <alpha/pci/dwlpxreg.h> 52 #include <alpha/pci/dwlpxvar.h> 53 #include <alpha/pci/pci_kn8ae.h> 54 55 static int dec_kn8ae_intr_map(const struct pci_attach_args *, 56 pci_intr_handle_t *); 57 static const char *dec_kn8ae_intr_string(pci_chipset_tag_t, pci_intr_handle_t, 58 char *, size_t); 59 static const struct evcnt *dec_kn8ae_intr_evcnt(pci_chipset_tag_t, 60 pci_intr_handle_t); 61 static void *dec_kn8ae_intr_establish(pci_chipset_tag_t, pci_intr_handle_t, 62 int, int (*func)(void *), void *); 63 static void dec_kn8ae_intr_disestablish(pci_chipset_tag_t, void *); 64 65 static uint32_t imaskcache[DWLPX_NIONODE][DWLPX_NHOSE][NHPC]; 66 67 static void kn8ae_spurious(void *, u_long); 68 static void kn8ae_enadis_intr(struct dwlpx_config *, pci_intr_handle_t, 69 int); 70 71 struct kn8ae_wrapped_pci_intr { 72 int (*ih_fn)(void *); 73 }; 74 75 static struct kn8ae_wrapped_pci_intr 76 kn8ae_wrapped_pci_intrs[SCB_VECTOIDX(SCB_SIZE - SCB_IOVECBASE)] 77 __read_mostly; 78 79 static void 80 kn8ae_intr_wrapper(void *arg, u_long vec) 81 { 82 const u_long idx = SCB_VECTOIDX(vec - SCB_IOVECBASE); 83 84 KERNEL_LOCK(1, NULL); 85 kn8ae_wrapped_pci_intrs[idx].ih_fn(arg); 86 KERNEL_UNLOCK_ONE(NULL); 87 } 88 89 void 90 pci_kn8ae_pickintr(struct dwlpx_config *ccp, int first) 91 { 92 int io, hose, dev; 93 pci_chipset_tag_t pc = &ccp->cc_pc; 94 95 pc->pc_intr_v = ccp; 96 pc->pc_intr_map = dec_kn8ae_intr_map; 97 pc->pc_intr_string = dec_kn8ae_intr_string; 98 pc->pc_intr_evcnt = dec_kn8ae_intr_evcnt; 99 pc->pc_intr_establish = dec_kn8ae_intr_establish; 100 pc->pc_intr_disestablish = dec_kn8ae_intr_disestablish; 101 102 /* Not supported on KN8AE. */ 103 pc->pc_pciide_compat_intr_establish = NULL; 104 105 if (!first) { 106 return; 107 } 108 109 for (io = 0; io < DWLPX_NIONODE; io++) { 110 for (hose = 0; hose < DWLPX_NHOSE; hose++) { 111 for (dev = 0; dev < NHPC; dev++) { 112 imaskcache[io][hose][dev] = DWLPX_IMASK_DFLT; 113 } 114 } 115 } 116 } 117 118 #define IH_MAKE(vec, dev, pin) \ 119 ((vec) | ((dev) << 16) | ((pin) << 24)) 120 121 #define IH_VEC(ih) ((ih) & 0xffff) 122 #define IH_DEV(ih) (((ih) >> 16) & 0xff) 123 #define IH_PIN(ih) (((ih) >> 24) & 0xff) 124 125 static int 126 dec_kn8ae_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 127 { 128 pcitag_t bustag = pa->pa_intrtag; 129 int buspin = pa->pa_intrpin; 130 pci_chipset_tag_t pc = pa->pa_pc; 131 int device; 132 u_long vec; 133 134 if (buspin == 0) { 135 /* No IRQ used. */ 136 return 1; 137 } 138 if (buspin < 0 || buspin > 4) { 139 printf("dec_kn8ae_intr_map: bad interrupt pin %d\n", buspin); 140 return 1; 141 } 142 pci_decompose_tag(pc, bustag, NULL, &device, NULL); 143 144 vec = scb_alloc(kn8ae_spurious, NULL); 145 if (vec == SCB_ALLOC_FAILED) { 146 printf("dec_kn8ae_intr_map: no vector available for " 147 "device %d pin %d\n", device, buspin); 148 return 1; 149 } 150 151 alpha_pci_intr_handle_init(ihp, IH_MAKE(vec, device, buspin), 0); 152 153 return (0); 154 } 155 156 static const char * 157 dec_kn8ae_intr_string(pci_chipset_tag_t const pc __unused, 158 pci_intr_handle_t const ih, char * const buf, size_t const len) 159 { 160 const u_int ihv = alpha_pci_intr_handle_get_irq(&ih); 161 162 snprintf(buf, len, "vector 0x%x", IH_VEC(ihv)); 163 return buf; 164 } 165 166 static const struct evcnt * 167 dec_kn8ae_intr_evcnt(pci_chipset_tag_t const pc __unused, 168 pci_intr_handle_t const ih __unused) 169 { 170 171 /* XXX for now, no evcnt parent reported */ 172 return (NULL); 173 } 174 175 static void * 176 dec_kn8ae_intr_establish( 177 pci_chipset_tag_t const pc, 178 pci_intr_handle_t const ih, 179 int const level, 180 int (*func)(void *), 181 void *arg) 182 { 183 struct dwlpx_config * const ccp = pc->pc_intr_v; 184 void *cookie; 185 struct scbvec *scb; 186 u_long vec; 187 int pin, device, hpc; 188 const u_int ihv = alpha_pci_intr_handle_get_irq(&ih); 189 const u_int flags = alpha_pci_intr_handle_get_flags(&ih); 190 191 device = IH_DEV(ihv); 192 pin = IH_PIN(ihv); 193 vec = IH_VEC(ihv); 194 195 scb = &scb_iovectab[SCB_VECTOIDX(vec - SCB_IOVECBASE)]; 196 197 if (scb->scb_func != kn8ae_spurious) { 198 printf("dec_kn8ae_intr_establish: vector 0x%lx not mapped\n", 199 vec); 200 return (NULL); 201 } 202 203 /* 204 * NOTE: The PCIA hardware doesn't support interrupt sharing, 205 * so we don't have to worry about it (in theory, at least). 206 */ 207 208 scb->scb_arg = arg; 209 alpha_mb(); 210 if (flags & ALPHA_INTR_MPSAFE) { 211 scb->scb_func = (void (*)(void *, u_long))func; 212 } else { 213 kn8ae_wrapped_pci_intrs[ 214 SCB_VECTOIDX(vec - SCB_IOVECBASE)].ih_fn = func; 215 alpha_mb(); 216 scb->scb_func = kn8ae_intr_wrapper; 217 } 218 alpha_mb(); 219 220 if (device < 4) { 221 hpc = 0; 222 } else if (device < 8) { 223 device -= 4; 224 hpc = 1; 225 } else { 226 device -= 8; 227 hpc = 2; 228 } 229 REGVAL(PCIA_DEVVEC(hpc, device, pin) + ccp->cc_sysbase) = vec; 230 231 kn8ae_enadis_intr(ccp, ih, 1); 232 233 cookie = (void *) ih.value; 234 235 return (cookie); 236 } 237 238 static void 239 dec_kn8ae_intr_disestablish(pci_chipset_tag_t const pc, void * const cookie) 240 { 241 struct dwlpx_config * const ccp = pc->pc_intr_v; 242 const u_long ihv = (u_long) cookie; 243 pci_intr_handle_t ih = { .value = ihv }; 244 struct scbvec *scb; 245 u_long vec; 246 247 vec = IH_VEC(ihv); 248 249 scb = &scb_iovectab[SCB_VECTOIDX(vec - SCB_IOVECBASE)]; 250 __USE(scb); 251 252 kn8ae_enadis_intr(ccp, ih, 0); 253 254 scb_free(vec); 255 } 256 257 static void 258 kn8ae_spurious(void * const arg __unused, u_long const vec) 259 { 260 printf("Spurious interrupt on temporary interrupt vector 0x%lx\n", vec); 261 } 262 263 static void 264 kn8ae_enadis_intr(struct dwlpx_config *ccp, pci_intr_handle_t ih, int onoff) 265 { 266 struct dwlpx_softc *sc = ccp->cc_sc; 267 const u_int ihv = alpha_pci_intr_handle_get_irq(&ih); 268 unsigned long paddr; 269 uint32_t val; 270 int ionode, hose, device, hpc, busp, s; 271 272 ionode = sc->dwlpx_node - 4; 273 hose = sc->dwlpx_hosenum; 274 275 device = IH_DEV(ihv); 276 busp = (1 << (IH_PIN(ihv) - 1)); 277 278 paddr = (1LL << 39); 279 paddr |= (unsigned long) ionode << 36; 280 paddr |= (unsigned long) hose << 34; 281 282 if (device < 4) { 283 hpc = 0; 284 } else if (device < 8) { 285 hpc = 1; 286 device -= 4; 287 } else { 288 hpc = 2; 289 device -= 8; 290 } 291 busp <<= (device << 2); 292 val = imaskcache[ionode][hose][hpc]; 293 if (onoff) 294 val |= busp; 295 else 296 val &= ~busp; 297 imaskcache[ionode][hose][hpc] = val; 298 #if 0 299 printf("kn8ae_%s_intr: ihv %x imsk 0x%x hpc %d TLSB node %d hose %d\n", 300 onoff? "enable" : "disable", ihv, val, hpc, ionode + 4, hose); 301 #endif 302 s = splhigh(); 303 REGVAL(PCIA_IMASK(hpc) + paddr) = val; 304 alpha_mb(); 305 (void) splx(s); 306 } 307
Indexes created Tue Sep 30 20:09:53 GMT 2025