pci_kn8ae.c revision 1.33
1 /* $NetBSD: pci_kn8ae.c,v 1.33 2021/06/19 16:59:07 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1997 by Matthew Jacob 5 * NASA AMES Research Center. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 34 35 __KERNEL_RCSID(0, "$NetBSD: pci_kn8ae.c,v 1.33 2021/06/19 16:59:07 thorpej Exp $"); 36 37 #include <sys/types.h> 38 #include <sys/param.h> 39 #include <sys/time.h> 40 #include <sys/systm.h> 41 #include <sys/errno.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/cpu.h> 45 #include <sys/syslog.h> 46 #include <sys/once.h> 47 48 #include <machine/autoconf.h> 49 #include <machine/rpb.h> 50 51 #include <dev/pci/pcireg.h> 52 #include <dev/pci/pcivar.h> 53 54 #include <alpha/pci/dwlpxreg.h> 55 #include <alpha/pci/dwlpxvar.h> 56 57 static int dec_kn8ae_intr_map(const struct pci_attach_args *, 58 pci_intr_handle_t *); 59 static const char *dec_kn8ae_intr_string(pci_chipset_tag_t, pci_intr_handle_t, 60 char *, size_t); 61 static const struct evcnt *dec_kn8ae_intr_evcnt(pci_chipset_tag_t, 62 pci_intr_handle_t); 63 static void *dec_kn8ae_intr_establish(pci_chipset_tag_t, pci_intr_handle_t, 64 int, int (*func)(void *), void *); 65 static void dec_kn8ae_intr_disestablish(pci_chipset_tag_t, void *); 66 67 static uint32_t imaskcache[DWLPX_NIONODE][DWLPX_NHOSE][NHPC]; 68 69 static void kn8ae_spurious(void *, u_long); 70 static void kn8ae_enadis_intr(struct dwlpx_config *, pci_intr_handle_t, 71 int); 72 73 struct kn8ae_wrapped_pci_intr { 74 int (*ih_fn)(void *); 75 }; 76 77 static struct kn8ae_wrapped_pci_intr 78 kn8ae_wrapped_pci_intrs[SCB_VECTOIDX(SCB_SIZE - SCB_IOVECBASE)] 79 __read_mostly; 80 81 static void 82 kn8ae_intr_wrapper(void *arg, u_long vec) 83 { 84 const u_long idx = SCB_VECTOIDX(vec - SCB_IOVECBASE); 85 86 KERNEL_LOCK(1, NULL); 87 kn8ae_wrapped_pci_intrs[idx].ih_fn(arg); 88 KERNEL_UNLOCK_ONE(NULL); 89 } 90 91 static ONCE_DECL(pci_kn8ae_once); 92 93 static int 94 pci_kn8ae_init_imaskcache(void) 95 { 96 int io, hose, dev; 97 98 for (io = 0; io < DWLPX_NIONODE; io++) { 99 for (hose = 0; hose < DWLPX_NHOSE; hose++) { 100 for (dev = 0; dev < NHPC; dev++) { 101 imaskcache[io][hose][dev] = DWLPX_IMASK_DFLT; 102 } 103 } 104 } 105 106 return 0; 107 } 108 109 static void 110 pci_kn8ae_pickintr(void *core, bus_space_tag_t iot, bus_space_tag_t memt, 111 pci_chipset_tag_t pc) 112 { 113 114 pc->pc_intr_v = core; 115 pc->pc_intr_map = dec_kn8ae_intr_map; 116 pc->pc_intr_string = dec_kn8ae_intr_string; 117 pc->pc_intr_evcnt = dec_kn8ae_intr_evcnt; 118 pc->pc_intr_establish = dec_kn8ae_intr_establish; 119 pc->pc_intr_disestablish = dec_kn8ae_intr_disestablish; 120 121 /* Not supported on KN8AE. */ 122 pc->pc_pciide_compat_intr_establish = NULL; 123 124 RUN_ONCE(&pci_kn8ae_once, pci_kn8ae_init_imaskcache); 125 } 126 ALPHA_PCI_INTR_INIT(ST_DEC_21000, pci_kn8ae_pickintr) 127 128 #define IH_MAKE(vec, dev, pin) \ 129 ((vec) | ((dev) << 16) | ((pin) << 24)) 130 131 #define IH_VEC(ih) ((ih) & 0xffff) 132 #define IH_DEV(ih) (((ih) >> 16) & 0xff) 133 #define IH_PIN(ih) (((ih) >> 24) & 0xff) 134 135 static int 136 dec_kn8ae_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 137 { 138 pcitag_t bustag = pa->pa_intrtag; 139 int buspin = pa->pa_intrpin; 140 pci_chipset_tag_t pc = pa->pa_pc; 141 int device; 142 u_long vec; 143 144 if (buspin == 0) { 145 /* No IRQ used. */ 146 return 1; 147 } 148 if (buspin < 0 || buspin > 4) { 149 printf("dec_kn8ae_intr_map: bad interrupt pin %d\n", buspin); 150 return 1; 151 } 152 pci_decompose_tag(pc, bustag, NULL, &device, NULL); 153 154 mutex_enter(&cpu_lock); 155 vec = scb_alloc(kn8ae_spurious, NULL); 156 mutex_exit(&cpu_lock); 157 if (vec == SCB_ALLOC_FAILED) { 158 printf("dec_kn8ae_intr_map: no vector available for " 159 "device %d pin %d\n", device, buspin); 160 return 1; 161 } 162 163 alpha_pci_intr_handle_init(ihp, IH_MAKE(vec, device, buspin), 0); 164 165 return (0); 166 } 167 168 static const char * 169 dec_kn8ae_intr_string(pci_chipset_tag_t const pc __unused, 170 pci_intr_handle_t const ih, char * const buf, size_t const len) 171 { 172 const u_int ihv = alpha_pci_intr_handle_get_irq(&ih); 173 174 snprintf(buf, len, "vector 0x%x", IH_VEC(ihv)); 175 return buf; 176 } 177 178 static const struct evcnt * 179 dec_kn8ae_intr_evcnt(pci_chipset_tag_t const pc __unused, 180 pci_intr_handle_t const ih __unused) 181 { 182 183 /* XXX for now, no evcnt parent reported */ 184 return (NULL); 185 } 186 187 static void * 188 dec_kn8ae_intr_establish( 189 pci_chipset_tag_t const pc, 190 pci_intr_handle_t const ih, 191 int const level, 192 int (*func)(void *), 193 void *arg) 194 { 195 struct dwlpx_config * const ccp = pc->pc_intr_v; 196 void *cookie; 197 struct scbvec *scb; 198 u_long vec; 199 int pin, device, hpc; 200 void (*scb_func)(void *, u_long); 201 const u_int ihv = alpha_pci_intr_handle_get_irq(&ih); 202 const u_int flags = alpha_pci_intr_handle_get_flags(&ih); 203 204 device = IH_DEV(ihv); 205 pin = IH_PIN(ihv); 206 vec = IH_VEC(ihv); 207 208 mutex_enter(&cpu_lock); 209 210 scb = &scb_iovectab[SCB_VECTOIDX(vec - SCB_IOVECBASE)]; 211 212 if (scb->scb_func != kn8ae_spurious) { 213 mutex_exit(&cpu_lock); 214 printf("dec_kn8ae_intr_establish: vector 0x%lx not mapped\n", 215 vec); 216 return (NULL); 217 } 218 219 /* 220 * NOTE: The PCIA hardware doesn't support interrupt sharing, 221 * so we don't have to worry about it (in theory, at least). 222 */ 223 224 if (flags & ALPHA_INTR_MPSAFE) { 225 scb_func = (void (*)(void *, u_long))func; 226 } else { 227 kn8ae_wrapped_pci_intrs[ 228 SCB_VECTOIDX(vec - SCB_IOVECBASE)].ih_fn = func; 229 scb_func = kn8ae_intr_wrapper; 230 } 231 232 scb_set(vec, scb_func, arg); 233 234 if (device < 4) { 235 hpc = 0; 236 } else if (device < 8) { 237 device -= 4; 238 hpc = 1; 239 } else { 240 device -= 8; 241 hpc = 2; 242 } 243 244 REGVAL(PCIA_DEVVEC(hpc, device, pin) + ccp->cc_sysbase) = vec; 245 kn8ae_enadis_intr(ccp, ih, 1); 246 247 mutex_exit(&cpu_lock); 248 249 cookie = (void *) ih.value; 250 251 return (cookie); 252 } 253 254 static void 255 dec_kn8ae_intr_disestablish(pci_chipset_tag_t const pc, void * const cookie) 256 { 257 struct dwlpx_config * const ccp = pc->pc_intr_v; 258 const u_long ihv = (u_long) cookie; 259 pci_intr_handle_t ih = { .value = ihv }; 260 u_long vec; 261 262 vec = IH_VEC(ihv); 263 264 mutex_enter(&cpu_lock); 265 266 kn8ae_enadis_intr(ccp, ih, 0); 267 268 scb_free(vec); 269 270 mutex_exit(&cpu_lock); 271 } 272 273 static void 274 kn8ae_spurious(void * const arg __unused, u_long const vec) 275 { 276 printf("Spurious interrupt on temporary interrupt vector 0x%lx\n", vec); 277 } 278 279 static void 280 kn8ae_enadis_intr(struct dwlpx_config *ccp, pci_intr_handle_t ih, int onoff) 281 { 282 struct dwlpx_softc *sc = ccp->cc_sc; 283 const u_int ihv = alpha_pci_intr_handle_get_irq(&ih); 284 unsigned long paddr; 285 uint32_t val; 286 int ionode, hose, device, hpc, busp; 287 288 ionode = sc->dwlpx_node - 4; 289 hose = sc->dwlpx_hosenum; 290 291 device = IH_DEV(ihv); 292 busp = (1 << (IH_PIN(ihv) - 1)); 293 294 paddr = (1LL << 39); 295 paddr |= (unsigned long) ionode << 36; 296 paddr |= (unsigned long) hose << 34; 297 298 if (device < 4) { 299 hpc = 0; 300 } else if (device < 8) { 301 hpc = 1; 302 device -= 4; 303 } else { 304 hpc = 2; 305 device -= 8; 306 } 307 busp <<= (device << 2); 308 val = imaskcache[ionode][hose][hpc]; 309 if (onoff) 310 val |= busp; 311 else 312 val &= ~busp; 313 imaskcache[ionode][hose][hpc] = val; 314 #if 0 315 printf("kn8ae_%s_intr: ihv %x imsk 0x%x hpc %d TLSB node %d hose %d\n", 316 onoff? "enable" : "disable", ihv, val, hpc, ionode + 4, hose); 317 #endif 318 const u_long psl = alpha_pal_swpipl(ALPHA_PSL_IPL_HIGH); 319 REGVAL(PCIA_IMASK(hpc) + paddr) = val; 320 alpha_mb(); 321 alpha_pal_swpipl(psl); 322 } 323
Indexes created Tue Sep 30 17:09:57 GMT 2025