pci_kn8ae.c revision 1.4
1 /* $NetBSD: pci_kn8ae.c,v 1.4 1997/04/07 23:40:44 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1997 by Matthew Jacob 5 * NASA AMES Research Center. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <machine/options.h> /* Config options headers */ 34 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 35 36 __KERNEL_RCSID(0, "$NetBSD: pci_kn8ae.c,v 1.4 1997/04/07 23:40:44 cgd Exp $"); 37 38 #include <sys/types.h> 39 #include <sys/param.h> 40 #include <sys/time.h> 41 #include <sys/systm.h> 42 #include <sys/errno.h> 43 #include <sys/malloc.h> 44 #include <sys/device.h> 45 #include <sys/syslog.h> 46 47 #include <vm/vm.h> 48 49 #include <machine/autoconf.h> 50 51 #include <dev/pci/pcireg.h> 52 #include <dev/pci/pcivar.h> 53 54 #include <alpha/pci/dwlpxreg.h> 55 #include <alpha/pci/dwlpxvar.h> 56 #include <alpha/pci/pci_kn8ae.h> 57 58 #ifndef EVCNT_COUNTERS 59 #include <machine/intrcnt.h> 60 #endif 61 62 int dec_kn8ae_intr_map __P((void *, pcitag_t, int, int, 63 pci_intr_handle_t *)); 64 const char *dec_kn8ae_intr_string __P((void *, pci_intr_handle_t)); 65 void *dec_kn8ae_intr_establish __P((void *, pci_intr_handle_t, 66 int, int (*func)(void *), void *)); 67 void dec_kn8ae_intr_disestablish __P((void *, void *)); 68 69 #define NIONODE 5 70 #define NHOSE 4 71 struct vectab { 72 int (*func) __P((void *)); 73 void *arg; 74 } vectab[NIONODE][NHOSE][DWLPX_MAXDEV]; 75 static u_int32_t imaskcache[NIONODE][NHOSE][NHPC]; 76 77 #ifdef EVCNT_COUNTERS 78 struct evcnt kn8ae_intr_evcnt; 79 #endif 80 81 int kn8ae_spurious __P((void *)); 82 void kn8ae_iointr __P((void *framep, unsigned long vec)); 83 void kn8ae_enadis_intr __P((pci_intr_handle_t, int)); 84 void kn8ae_enable_intr __P((pci_intr_handle_t irq)); 85 void kn8ae_disable_intr __P((pci_intr_handle_t irq)); 86 87 void 88 pci_kn8ae_pickintr(ccp, first) 89 struct dwlpx_config *ccp; 90 int first; 91 { 92 int io, hose, dev; 93 pci_chipset_tag_t pc = &ccp->cc_pc; 94 95 pc->pc_intr_v = ccp; 96 pc->pc_intr_map = dec_kn8ae_intr_map; 97 pc->pc_intr_string = dec_kn8ae_intr_string; 98 pc->pc_intr_establish = dec_kn8ae_intr_establish; 99 pc->pc_intr_disestablish = dec_kn8ae_intr_disestablish; 100 101 if (!first) { 102 return; 103 } 104 105 for (io = 0; io < NIONODE; io++) { 106 for (hose = 0; hose < NHOSE; hose++) { 107 for (dev = 0; dev < DWLPX_MAXDEV; dev++) { 108 vectab[io][hose][dev].func = kn8ae_spurious; 109 vectab[io][hose][dev].arg = (void *) 110 (u_int64_t) DWLPX_MVEC(io, hose, dev); 111 } 112 } 113 } 114 for (io = 0; io < NIONODE; io++) { 115 for (hose = 0; hose < NHOSE; hose++) { 116 for (dev = 0; dev < NHPC; dev++) { 117 imaskcache[io][hose][dev] = DWLPX_IMASK_DFLT; 118 } 119 } 120 } 121 set_iointr(kn8ae_iointr); 122 } 123 124 int 125 dec_kn8ae_intr_map(ccv, bustag, buspin, line, ihp) 126 void *ccv; 127 pcitag_t bustag; 128 int buspin, line; 129 pci_intr_handle_t *ihp; 130 { 131 int device, ionode, hose; 132 struct dwlpx_config *ccp = ccv; 133 pci_chipset_tag_t pc = &ccp->cc_pc; 134 135 if (buspin == 0) { 136 /* No IRQ used. */ 137 return 1; 138 } 139 if (buspin > 4) { 140 printf("pci_map_int: bad interrupt pin %d\n", buspin); 141 return 1; 142 } 143 pci_decompose_tag(pc, bustag, NULL, &device, NULL); 144 ionode = ccp->cc_sc->dwlpx_node - 4; 145 hose = ccp->cc_sc->dwlpx_hosenum; 146 147 /* 148 * handle layout: 149 * bits 0..15 DWLPX_MVEC(ionode, hose, device) 150 * bits 16-24 buspin (1..N) 151 * bits 24-31 IPL 152 */ 153 *ihp = DWLPX_MVEC(ionode, hose, device) | (buspin << 16) | (14 << 24); 154 return (0); 155 } 156 157 const char * 158 dec_kn8ae_intr_string(ccv, ih) 159 void *ccv; 160 pci_intr_handle_t ih; 161 { 162 static char irqstr[64]; 163 sprintf(irqstr, "kn8ae irq %d vector 0x%x PCI Interrupt Pin %c", 164 (ih >> 24), ih & 0xffff, (((ih >> 16) & 0x7) - 1) + 'A'); 165 return (irqstr); 166 } 167 168 void * 169 dec_kn8ae_intr_establish(ccv, ih, level, func, arg) 170 void *ccv; 171 pci_intr_handle_t ih; 172 int level; 173 int (*func) __P((void *)); 174 void *arg; 175 { 176 struct dwlpx_config *ccp = ccv; 177 void *cookie = NULL; 178 int ionode, hose, device, s; 179 struct vectab *vp; 180 181 ionode = ccp->cc_sc->dwlpx_node - 4; 182 hose = ccp->cc_sc->dwlpx_hosenum; 183 device = DWLPX_MVEC_PCISLOT(ih); 184 185 if (ionode < 0 || ionode >= NIONODE) { 186 panic("dec_kn8ae_intr_establish: bad ionode %d\n", ionode); 187 } 188 if (hose < 0 || hose >= NHOSE) { 189 panic("dec_kn8ae_intr_establish: bad hose %d\n", hose); 190 } 191 if (device < 0 || device >= DWLPX_MAXDEV) { 192 panic("dec_kn8ae_intr_establish: bad device %d\n", device); 193 } 194 195 vp = &vectab[ionode][hose][device]; 196 if (vp->func != kn8ae_spurious) { 197 printf("dec_kn8ae_intr_establish: vector 0x%x already used\n", 198 ih & 0xffff); 199 return (cookie); 200 } 201 202 s = splhigh(); 203 vp->func = func; 204 vp->arg = arg; 205 (void) splx(s); 206 kn8ae_enable_intr(ih); 207 cookie = (void *) (u_int64_t) DWLPX_MVEC(ionode, hose, device); 208 return (cookie); 209 } 210 211 void 212 dec_kn8ae_intr_disestablish(ccv, cookie) 213 void *ccv, *cookie; 214 { 215 int ionode, hose, device, s; 216 struct vectab *vp; 217 218 ionode = DWLPX_MVEC_IONODE(cookie); 219 hose = DWLPX_MVEC_HOSE(cookie); 220 device = DWLPX_MVEC_PCISLOT(cookie); 221 if (ionode < 0 || ionode >= NIONODE || hose < 0 || hose >= NHOSE || 222 device < 0 || device >= DWLPX_MAXDEV) { 223 return; 224 } 225 vp = &vectab[ionode][hose][device]; 226 s = splhigh(); 227 vp->func = kn8ae_spurious; 228 vp->arg = cookie; 229 (void) splx(s); 230 } 231 232 void 233 kn8ae_iointr(framep, vec) 234 void *framep; 235 unsigned long vec; 236 { 237 struct vectab *vp; 238 int ionode, hose, device; 239 if ((vec & DWLPX_VEC_MARK) == 0) { 240 panic("kn8ae_iointr: vec 0x%x\n", vec); 241 } 242 #ifdef EVCNT_COUNTERS 243 kn8ae_intr_evcnt.ev_count++; 244 #else 245 ; /* XXX */ 246 #endif 247 ionode = DWLPX_MVEC_IONODE(vec); 248 hose = DWLPX_MVEC_HOSE(vec); 249 device = DWLPX_MVEC_PCISLOT(vec); 250 251 if (ionode < 0 || ionode >= NIONODE || hose < 0 || hose >= NHOSE || 252 device < 0 || device >= DWLPX_MAXDEV) { 253 panic("kn8ae_iointr: malformed vector 0x%x\n", vec); 254 } 255 vp = &vectab[ionode][hose][device]; 256 if ((*vp->func)(vp->arg) == 0) { 257 printf("kn8ae_iointr: TLSB Node %d Hose %d Slot %d - " 258 " unclaimed interrupt\n", ionode + 4, hose, device); 259 } 260 } 261 262 int 263 kn8ae_spurious(arg) 264 void *arg; 265 { 266 int ionode, hose, device; 267 ionode = DWLPX_MVEC_IONODE(arg); 268 hose = DWLPX_MVEC_HOSE(arg); 269 device = DWLPX_MVEC_PCISLOT(arg); 270 printf("Spurious Interrupt from TLSB Node %d Hose %d Slot %d\n", 271 ionode + 4, hose, device); 272 return (-1); 273 } 274 275 276 void 277 kn8ae_enadis_intr(irq, onoff) 278 pci_intr_handle_t irq; 279 int onoff; 280 { 281 unsigned long paddr; 282 u_int32_t val; 283 int ionode, hose, device, hpc, busp, s; 284 285 ionode = DWLPX_MVEC_IONODE(irq); 286 hose = DWLPX_MVEC_HOSE(irq); 287 device = DWLPX_MVEC_PCISLOT(irq); 288 busp = 1 << (((irq >> 16) & 0xff) - 1); 289 paddr = (1LL << 39); 290 paddr |= (unsigned long) ionode << 36; 291 paddr |= (unsigned long) hose << 34; 292 if (device < 4) { 293 hpc = 0; 294 } else if (device < 8) { 295 hpc = 1; 296 device -= 4; 297 } else { 298 hpc = 2; 299 device -= 8; 300 } 301 busp <<= (device << 2); 302 val = imaskcache[ionode][hose][hpc]; 303 if (onoff) 304 val |= busp; 305 else 306 val &= ~busp; 307 imaskcache[ionode][hose][hpc] = val; 308 #if 0 309 printf("kn8ae_%s_intr: irq %lx imsk 0x%x hpc %d TLSB node %d hose %d\n", 310 onoff? "enable" : "disable", irq, val, hpc, ionode + 4, hose); 311 #endif 312 s = splhigh(); 313 REGVAL(PCIA_IMASK(hpc) + paddr) = val; 314 alpha_mb(); 315 (void) splx(s); 316 } 317 318 void 319 kn8ae_enable_intr(irq) 320 pci_intr_handle_t irq; 321 { 322 kn8ae_enadis_intr(irq, 1); 323 } 324 325 void 326 kn8ae_disable_intr(irq) 327 pci_intr_handle_t irq; 328 { 329 kn8ae_enadis_intr(irq, 0); 330 } 331
Indexes created Mon Sep 29 21:09:56 GMT 2025