pci_kn8ae.c revision 1.8
1 /* $NetBSD: pci_kn8ae.c,v 1.8 1998/03/23 06:32:39 mjacob Exp $ */ 2 3 /* 4 * Copyright (c) 1997 by Matthew Jacob 5 * NASA AMES Research Center. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 34 35 __KERNEL_RCSID(0, "$NetBSD: pci_kn8ae.c,v 1.8 1998/03/23 06:32:39 mjacob Exp $"); 36 37 #include <sys/types.h> 38 #include <sys/param.h> 39 #include <sys/time.h> 40 #include <sys/systm.h> 41 #include <sys/errno.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/syslog.h> 45 46 #include <vm/vm.h> 47 48 #include <machine/autoconf.h> 49 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcivar.h> 52 53 #include <alpha/pci/dwlpxreg.h> 54 #include <alpha/pci/dwlpxvar.h> 55 #include <alpha/pci/pci_kn8ae.h> 56 57 #ifndef EVCNT_COUNTERS 58 #include <machine/intrcnt.h> 59 #endif 60 61 int dec_kn8ae_intr_map __P((void *, pcitag_t, int, int, 62 pci_intr_handle_t *)); 63 const char *dec_kn8ae_intr_string __P((void *, pci_intr_handle_t)); 64 void *dec_kn8ae_intr_establish __P((void *, pci_intr_handle_t, 65 int, int (*func)(void *), void *)); 66 void dec_kn8ae_intr_disestablish __P((void *, void *)); 67 68 struct vectab { 69 int (*func) __P((void *)); 70 void *arg; 71 } vectab[DWLPX_NIONODE][DWLPX_NHOSE][DWLPX_MAXDEV]; 72 static u_int32_t imaskcache[DWLPX_NIONODE][DWLPX_NHOSE][NHPC]; 73 74 #ifdef EVCNT_COUNTERS 75 struct evcnt kn8ae_intr_evcnt; 76 #endif 77 78 int kn8ae_spurious __P((void *)); 79 void kn8ae_iointr __P((void *framep, unsigned long vec)); 80 void kn8ae_enadis_intr __P((pci_intr_handle_t, int)); 81 void kn8ae_enable_intr __P((pci_intr_handle_t irq)); 82 void kn8ae_disable_intr __P((pci_intr_handle_t irq)); 83 84 void 85 pci_kn8ae_pickintr(ccp, first) 86 struct dwlpx_config *ccp; 87 int first; 88 { 89 int io, hose, dev; 90 pci_chipset_tag_t pc = &ccp->cc_pc; 91 92 pc->pc_intr_v = ccp; 93 pc->pc_intr_map = dec_kn8ae_intr_map; 94 pc->pc_intr_string = dec_kn8ae_intr_string; 95 pc->pc_intr_establish = dec_kn8ae_intr_establish; 96 pc->pc_intr_disestablish = dec_kn8ae_intr_disestablish; 97 98 if (!first) { 99 return; 100 } 101 102 for (io = 0; io < DWLPX_NIONODE; io++) { 103 for (hose = 0; hose < DWLPX_NHOSE; hose++) { 104 for (dev = 0; dev < DWLPX_MAXDEV; dev++) { 105 vectab[io][hose][dev].func = kn8ae_spurious; 106 vectab[io][hose][dev].arg = (void *) 107 (u_int64_t) DWLPX_MVEC(io, hose, dev); 108 } 109 } 110 } 111 for (io = 0; io < DWLPX_NIONODE; io++) { 112 for (hose = 0; hose < DWLPX_NHOSE; hose++) { 113 for (dev = 0; dev < NHPC; dev++) { 114 imaskcache[io][hose][dev] = DWLPX_IMASK_DFLT; 115 } 116 } 117 } 118 set_iointr(kn8ae_iointr); 119 } 120 121 int 122 dec_kn8ae_intr_map(ccv, bustag, buspin, line, ihp) 123 void *ccv; 124 pcitag_t bustag; 125 int buspin, line; 126 pci_intr_handle_t *ihp; 127 { 128 int device, ionode, hose; 129 struct dwlpx_config *ccp = ccv; 130 pci_chipset_tag_t pc = &ccp->cc_pc; 131 132 if (buspin == 0) { 133 /* No IRQ used. */ 134 return 1; 135 } 136 if (buspin > 4) { 137 printf("pci_map_int: bad interrupt pin %d\n", buspin); 138 return 1; 139 } 140 alpha_pci_decompose_tag(pc, bustag, NULL, &device, NULL); 141 ionode = ccp->cc_sc->dwlpx_node - 4; 142 hose = ccp->cc_sc->dwlpx_hosenum; 143 144 /* 145 * handle layout: 146 * bits 0..15 DWLPX_MVEC(ionode, hose, device) 147 * bits 16-24 buspin (1..N) 148 * bits 24-31 IPL 149 */ 150 *ihp = DWLPX_MVEC(ionode, hose, device) | (buspin << 16) | (14 << 24); 151 return (0); 152 } 153 154 const char * 155 dec_kn8ae_intr_string(ccv, ih) 156 void *ccv; 157 pci_intr_handle_t ih; 158 { 159 static char irqstr[64]; 160 sprintf(irqstr, "kn8ae irq %d vector 0x%x PCI Interrupt Pin %c", 161 (ih >> 24), ih & 0xffff, (((ih >> 16) & 0x7) - 1) + 'A'); 162 return (irqstr); 163 } 164 165 void * 166 dec_kn8ae_intr_establish(ccv, ih, level, func, arg) 167 void *ccv; 168 pci_intr_handle_t ih; 169 int level; 170 int (*func) __P((void *)); 171 void *arg; 172 { 173 struct dwlpx_config *ccp = ccv; 174 void *cookie = NULL; 175 int ionode, hose, device, s; 176 struct vectab *vp; 177 178 ionode = ccp->cc_sc->dwlpx_node - 4; 179 hose = ccp->cc_sc->dwlpx_hosenum; 180 device = DWLPX_MVEC_PCISLOT(ih); 181 182 if (ionode < 0 || ionode >= DWLPX_NIONODE) { 183 panic("dec_kn8ae_intr_establish: bad ionode %d\n", ionode); 184 } 185 if (hose < 0 || hose >= DWLPX_NHOSE) { 186 panic("dec_kn8ae_intr_establish: bad hose %d\n", hose); 187 } 188 if (device < 0 || device >= DWLPX_MAXDEV) { 189 panic("dec_kn8ae_intr_establish: bad device %d\n", device); 190 } 191 192 vp = &vectab[ionode][hose][device]; 193 if (vp->func != kn8ae_spurious) { 194 printf("dec_kn8ae_intr_establish: vector 0x%x already used\n", 195 ih & 0xffff); 196 return (cookie); 197 } 198 199 s = splhigh(); 200 vp->func = func; 201 vp->arg = arg; 202 (void) splx(s); 203 kn8ae_enable_intr(ih); 204 cookie = (void *) (u_int64_t) DWLPX_MVEC(ionode, hose, device); 205 return (cookie); 206 } 207 208 void 209 dec_kn8ae_intr_disestablish(ccv, cookie) 210 void *ccv, *cookie; 211 { 212 int ionode, hose, device, s; 213 struct vectab *vp; 214 215 ionode = DWLPX_MVEC_IONODE(cookie); 216 hose = DWLPX_MVEC_HOSE(cookie); 217 device = DWLPX_MVEC_PCISLOT(cookie); 218 if (ionode < 0 || ionode >= DWLPX_NIONODE || 219 hose < 0 || hose >= DWLPX_NHOSE || 220 device < 0 || device >= DWLPX_MAXDEV) { 221 return; 222 } 223 vp = &vectab[ionode][hose][device]; 224 s = splhigh(); 225 vp->func = kn8ae_spurious; 226 vp->arg = cookie; 227 (void) splx(s); 228 } 229 230 void 231 kn8ae_iointr(framep, vec) 232 void *framep; 233 unsigned long vec; 234 { 235 struct vectab *vp; 236 int ionode, hose, device; 237 if ((vec & DWLPX_VEC_EMARK) != 0) { 238 dwlpx_iointr(framep, vec); 239 return; 240 } 241 if ((vec & DWLPX_VEC_MARK) == 0) { 242 panic("kn8ae_iointr: vec 0x%x\n", vec); 243 /* NOTREACHED */ 244 } 245 #ifdef EVCNT_COUNTERS 246 kn8ae_intr_evcnt.ev_count++; 247 #else 248 ; /* XXX */ 249 #endif 250 ionode = DWLPX_MVEC_IONODE(vec); 251 hose = DWLPX_MVEC_HOSE(vec); 252 device = DWLPX_MVEC_PCISLOT(vec); 253 254 if (ionode < 0 || ionode >= DWLPX_NIONODE || 255 hose < 0 || hose >= DWLPX_NHOSE || 256 device < 0 || device >= DWLPX_MAXDEV) { 257 panic("kn8ae_iointr: malformed vector 0x%x\n", vec); 258 /* NOTREACHED */ 259 } 260 vp = &vectab[ionode][hose][device]; 261 if ((*vp->func)(vp->arg) == 0) { 262 #if 0 263 printf("kn8ae_iointr: TLSB Node %d Hose %d Slot %d - " 264 " unclaimed interrupt\n", ionode + 4, hose, device); 265 #endif 266 } 267 } 268 269 int 270 kn8ae_spurious(arg) 271 void *arg; 272 { 273 int ionode, hose, device; 274 ionode = DWLPX_MVEC_IONODE(arg); 275 hose = DWLPX_MVEC_HOSE(arg); 276 device = DWLPX_MVEC_PCISLOT(arg); 277 printf("Spurious Interrupt from TLSB Node %d Hose %d Slot %d\n", 278 ionode + 4, hose, device); 279 return (-1); 280 } 281 282 283 void 284 kn8ae_enadis_intr(irq, onoff) 285 pci_intr_handle_t irq; 286 int onoff; 287 { 288 unsigned long paddr; 289 u_int32_t val; 290 int ionode, hose, device, hpc, busp, s; 291 292 ionode = DWLPX_MVEC_IONODE(irq); 293 hose = DWLPX_MVEC_HOSE(irq); 294 device = DWLPX_MVEC_PCISLOT(irq); 295 busp = 1 << (((irq >> 16) & 0xff) - 1); 296 paddr = (1LL << 39); 297 paddr |= (unsigned long) ionode << 36; 298 paddr |= (unsigned long) hose << 34; 299 if (device < 4) { 300 hpc = 0; 301 } else if (device < 8) { 302 hpc = 1; 303 device -= 4; 304 } else { 305 hpc = 2; 306 device -= 8; 307 } 308 busp <<= (device << 2); 309 val = imaskcache[ionode][hose][hpc]; 310 if (onoff) 311 val |= busp; 312 else 313 val &= ~busp; 314 imaskcache[ionode][hose][hpc] = val; 315 #if 0 316 printf("kn8ae_%s_intr: irq %lx imsk 0x%x hpc %d TLSB node %d hose %d\n", 317 onoff? "enable" : "disable", irq, val, hpc, ionode + 4, hose); 318 #endif 319 s = splhigh(); 320 REGVAL(PCIA_IMASK(hpc) + paddr) = val; 321 alpha_mb(); 322 (void) splx(s); 323 } 324 325 void 326 kn8ae_enable_intr(irq) 327 pci_intr_handle_t irq; 328 { 329 kn8ae_enadis_intr(irq, 1); 330 } 331 332 void 333 kn8ae_disable_intr(irq) 334 pci_intr_handle_t irq; 335 { 336 kn8ae_enadis_intr(irq, 0); 337 } 338
Indexes created Tue Sep 30 07:10:03 GMT 2025