tsp_pci.c revision 1.10.34.2 1 1.10.34.2 thorpej /* $NetBSD: tsp_pci.c,v 1.10.34.2 2021/08/01 22:42:02 thorpej Exp $ */
2 1.1 ross
3 1.1 ross /*-
4 1.1 ross * Copyright (c) 1999 by Ross Harvey. All rights reserved.
5 1.1 ross *
6 1.1 ross * Redistribution and use in source and binary forms, with or without
7 1.1 ross * modification, are permitted provided that the following conditions
8 1.1 ross * are met:
9 1.1 ross * 1. Redistributions of source code must retain the above copyright
10 1.1 ross * notice, this list of conditions and the following disclaimer.
11 1.1 ross * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 ross * notice, this list of conditions and the following disclaimer in the
13 1.1 ross * documentation and/or other materials provided with the distribution.
14 1.1 ross * 3. All advertising materials mentioning features or use of this software
15 1.1 ross * must display the following acknowledgement:
16 1.1 ross * This product includes software developed by Ross Harvey.
17 1.1 ross * 4. The name of Ross Harvey may not be used to endorse or promote products
18 1.1 ross * derived from this software without specific prior written permission.
19 1.1 ross *
20 1.1 ross * THIS SOFTWARE IS PROVIDED BY ROSS HARVEY ``AS IS'' AND ANY EXPRESS
21 1.1 ross * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
22 1.1 ross * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP0SE
23 1.1 ross * ARE DISCLAIMED. IN NO EVENT SHALL ROSS HARVEY BE LIABLE FOR ANY
24 1.1 ross * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 1.1 ross * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 1.1 ross * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 1.1 ross * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 1.1 ross * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 1.1 ross * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 1.1 ross * SUCH DAMAGE.
31 1.1 ross */
32 1.1 ross
33 1.1 ross #include <sys/cdefs.h>
34 1.1 ross
35 1.10.34.2 thorpej __KERNEL_RCSID(0, "$NetBSD: tsp_pci.c,v 1.10.34.2 2021/08/01 22:42:02 thorpej Exp $");
36 1.1 ross
37 1.1 ross #include <sys/param.h>
38 1.1 ross #include <sys/systm.h>
39 1.1 ross #include <sys/kernel.h>
40 1.1 ross #include <sys/device.h>
41 1.2 mrg
42 1.1 ross #include <dev/pci/pcireg.h>
43 1.1 ross #include <dev/pci/pcivar.h>
44 1.1 ross
45 1.1 ross #include <machine/autoconf.h>
46 1.1 ross #include <machine/rpb.h>
47 1.1 ross
48 1.1 ross #include <alpha/pci/tsreg.h>
49 1.1 ross #include <alpha/pci/tsvar.h>
50 1.1 ross
51 1.1 ross #define tsp_pci() { Generate ctags(1) key. }
52 1.1 ross
53 1.10.34.1 thorpej static pcireg_t tsp_conf_read(void *, pcitag_t, int);
54 1.10.34.1 thorpej static void tsp_conf_write(void *, pcitag_t, int, pcireg_t);
55 1.1 ross
56 1.1 ross void
57 1.5 dsl tsp_pci_init(pci_chipset_tag_t pc, void *v)
58 1.1 ross {
59 1.1 ross pc->pc_conf_v = v;
60 1.1 ross pc->pc_conf_read = tsp_conf_read;
61 1.1 ross pc->pc_conf_write = tsp_conf_write;
62 1.1 ross }
63 1.1 ross
64 1.1 ross /*
65 1.1 ross * Tsunami makes this a lot easier than it used to be, automatically
66 1.1 ross * generating type 0 or type 1 cycles, and quietly returning -1 with
67 1.1 ross * no errors on unanswered probes.
68 1.1 ross */
69 1.10.34.1 thorpej static pcireg_t
70 1.5 dsl tsp_conf_read(void *cpv, pcitag_t tag, int offset)
71 1.1 ross {
72 1.1 ross pcireg_t *datap, data;
73 1.1 ross struct tsp_config *pcp = cpv;
74 1.1 ross
75 1.10 msaitoh if ((unsigned int)offset >= PCI_CONF_SIZE)
76 1.10 msaitoh return (pcireg_t) -1;
77 1.10 msaitoh
78 1.1 ross datap = S_PAGE(pcp->pc_iobase | P_PCI_CONFIG | tag | (offset & ~3));
79 1.1 ross alpha_mb();
80 1.1 ross data = *datap;
81 1.1 ross alpha_mb();
82 1.1 ross return data;
83 1.1 ross }
84 1.1 ross
85 1.10.34.1 thorpej static void
86 1.5 dsl tsp_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)
87 1.1 ross {
88 1.1 ross pcireg_t *datap;
89 1.1 ross struct tsp_config *pcp = cpv;
90 1.1 ross
91 1.10 msaitoh if ((unsigned int)offset >= PCI_CONF_SIZE)
92 1.10 msaitoh return;
93 1.10 msaitoh
94 1.1 ross datap = S_PAGE(pcp->pc_iobase | P_PCI_CONFIG | tag | (offset & ~3));
95 1.1 ross alpha_mb();
96 1.1 ross *datap = data;
97 1.1 ross alpha_mb();
98 1.1 ross }
99 1.7 hans
100 1.7 hans #define NTH_STR(n, ...) ((const char *[]){ __VA_ARGS__ }[n])
101 1.7 hans
102 1.7 hans void
103 1.7 hans tsp_print_error(unsigned int indent, unsigned long p_error)
104 1.7 hans {
105 1.7 hans char buf[40];
106 1.7 hans
107 1.7 hans if (PER_INV(p_error)) {
108 1.7 hans IPRINTF(indent, "data invalid\n");
109 1.7 hans return;
110 1.7 hans }
111 1.7 hans
112 1.7 hans if (!PER_ERR(p_error))
113 1.7 hans return;
114 1.7 hans
115 1.7 hans snprintb(buf, 40,
116 1.7 hans "\177\20"
117 1.7 hans "b\0Error lost\0"
118 1.7 hans "b\1PCI SERR#\0"
119 1.7 hans "b\2PCI PERR#\0"
120 1.7 hans "b\3Delayed completion retry timeout\0"
121 1.7 hans "b\4Invalid S/G page table entry\0"
122 1.7 hans "b\5Address parity error\0"
123 1.7 hans "b\6Target abort\0"
124 1.7 hans "b\7PCI read data parity error\0"
125 1.7 hans "b\10no PCI DEVSEL#\0"
126 1.7 hans "b\11unknown\0"
127 1.7 hans "b\12Uncorrectable ECC\0"
128 1.7 hans "b\13Correctable ECC\0",
129 1.7 hans PER_ERR(p_error));
130 1.7 hans IPRINTF(indent, "error = %s\n", buf);
131 1.7 hans
132 1.7 hans if (PER_ECC(p_error)) {
133 1.7 hans IPRINTF(indent, "address = 0x%09lx\n", PER_SADR(p_error));
134 1.7 hans IPRINTF(indent, "command = 0x%lx<%s>\n", PER_CMD(p_error),
135 1.7 hans NTH_STR(PER_CMD(p_error) & 0x3,
136 1.7 hans "DMA read", "DMA RMW", "?", "S/G read"));
137 1.7 hans IPRINTF(indent, "syndrome = 0x%02lx\n", PER_SYN(p_error));
138 1.7 hans } else {
139 1.7 hans IPRINTF(indent, "address = 0x%08lx, 0x%lx<%s>\n",
140 1.7 hans PER_PADR(p_error), PER_TRNS(p_error),
141 1.7 hans NTH_STR(PER_TRNS(p_error), "No DAC", "DAC SG Win3",
142 1.7 hans "Monster Window", "Monster Window"));
143 1.7 hans IPRINTF(indent, "command = 0x%lx<%s>\n", PER_CMD(p_error),
144 1.7 hans NTH_STR(PER_CMD(p_error),
145 1.7 hans "PCI IACK", "PCI special cycle",
146 1.7 hans "PCI I/O read", "PCI I/O write", "?",
147 1.7 hans "PCI PTP write", "PCI memory read",
148 1.7 hans "PCI memory write", "PCI CSR write",
149 1.7 hans "?", "?", "?", "?", "?", "?", "?"));
150 1.7 hans }
151 1.7 hans }
152