tsp_pci.c revision 1.6.2.1 1 1.6.2.1 uebayasi /* $NetBSD: tsp_pci.c,v 1.6.2.1 2010/10/22 07:20:56 uebayasi Exp $ */
2 1.1 ross
3 1.1 ross /*-
4 1.1 ross * Copyright (c) 1999 by Ross Harvey. All rights reserved.
5 1.1 ross *
6 1.1 ross * Redistribution and use in source and binary forms, with or without
7 1.1 ross * modification, are permitted provided that the following conditions
8 1.1 ross * are met:
9 1.1 ross * 1. Redistributions of source code must retain the above copyright
10 1.1 ross * notice, this list of conditions and the following disclaimer.
11 1.1 ross * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 ross * notice, this list of conditions and the following disclaimer in the
13 1.1 ross * documentation and/or other materials provided with the distribution.
14 1.1 ross * 3. All advertising materials mentioning features or use of this software
15 1.1 ross * must display the following acknowledgement:
16 1.1 ross * This product includes software developed by Ross Harvey.
17 1.1 ross * 4. The name of Ross Harvey may not be used to endorse or promote products
18 1.1 ross * derived from this software without specific prior written permission.
19 1.1 ross *
20 1.1 ross * THIS SOFTWARE IS PROVIDED BY ROSS HARVEY ``AS IS'' AND ANY EXPRESS
21 1.1 ross * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
22 1.1 ross * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP0SE
23 1.1 ross * ARE DISCLAIMED. IN NO EVENT SHALL ROSS HARVEY BE LIABLE FOR ANY
24 1.1 ross * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 1.1 ross * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 1.1 ross * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 1.1 ross * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 1.1 ross * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 1.1 ross * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 1.1 ross * SUCH DAMAGE.
31 1.1 ross *
32 1.1 ross */
33 1.1 ross
34 1.1 ross #include <sys/cdefs.h>
35 1.1 ross
36 1.6.2.1 uebayasi __KERNEL_RCSID(0, "$NetBSD: tsp_pci.c,v 1.6.2.1 2010/10/22 07:20:56 uebayasi Exp $");
37 1.1 ross
38 1.1 ross #include <sys/param.h>
39 1.1 ross #include <sys/systm.h>
40 1.1 ross #include <sys/kernel.h>
41 1.1 ross #include <sys/device.h>
42 1.2 mrg
43 1.2 mrg #include <uvm/uvm_extern.h>
44 1.2 mrg
45 1.1 ross #include <dev/pci/pcireg.h>
46 1.1 ross #include <dev/pci/pcivar.h>
47 1.1 ross
48 1.1 ross #include <machine/autoconf.h>
49 1.1 ross #include <machine/rpb.h>
50 1.1 ross
51 1.1 ross #include <alpha/pci/tsreg.h>
52 1.1 ross #include <alpha/pci/tsvar.h>
53 1.1 ross
54 1.1 ross #define tsp_pci() { Generate ctags(1) key. }
55 1.1 ross
56 1.4 dsl void tsp_attach_hook(struct device *, struct device *,
57 1.4 dsl struct pcibus_attach_args *);
58 1.4 dsl int tsp_bus_maxdevs(void *, int);
59 1.4 dsl pcitag_t tsp_make_tag(void *, int, int, int);
60 1.4 dsl void tsp_decompose_tag(void *, pcitag_t, int *, int *,
61 1.4 dsl int *);
62 1.4 dsl pcireg_t tsp_conf_read(void *, pcitag_t, int);
63 1.4 dsl void tsp_conf_write(void *, pcitag_t, int, pcireg_t);
64 1.1 ross
65 1.1 ross void
66 1.5 dsl tsp_pci_init(pci_chipset_tag_t pc, void *v)
67 1.1 ross {
68 1.1 ross pc->pc_conf_v = v;
69 1.1 ross pc->pc_attach_hook = tsp_attach_hook;
70 1.1 ross pc->pc_bus_maxdevs = tsp_bus_maxdevs;
71 1.1 ross pc->pc_make_tag = tsp_make_tag;
72 1.1 ross pc->pc_decompose_tag = tsp_decompose_tag;
73 1.1 ross pc->pc_conf_read = tsp_conf_read;
74 1.1 ross pc->pc_conf_write = tsp_conf_write;
75 1.1 ross }
76 1.1 ross
77 1.1 ross void
78 1.6 dsl tsp_attach_hook(struct device *parent, struct device *self, struct pcibus_attach_args *pba)
79 1.1 ross {
80 1.1 ross }
81 1.1 ross
82 1.1 ross int
83 1.5 dsl tsp_bus_maxdevs(void *cpv, int busno)
84 1.1 ross {
85 1.1 ross return 32;
86 1.1 ross }
87 1.1 ross
88 1.1 ross pcitag_t
89 1.6 dsl tsp_make_tag(void *cpv, int b, int d, int f)
90 1.1 ross {
91 1.1 ross return b << 16 | d << 11 | f << 8;
92 1.1 ross }
93 1.1 ross
94 1.1 ross void
95 1.6 dsl tsp_decompose_tag(void *cpv, pcitag_t tag, int *bp, int *dp, int *fp)
96 1.1 ross {
97 1.1 ross if (bp != NULL)
98 1.1 ross *bp = (tag >> 16) & 0xff;
99 1.1 ross if (dp != NULL)
100 1.1 ross *dp = (tag >> 11) & 0x1f;
101 1.1 ross if (fp != NULL)
102 1.1 ross *fp = (tag >> 8) & 0x7;
103 1.1 ross }
104 1.1 ross /*
105 1.1 ross * Tsunami makes this a lot easier than it used to be, automatically
106 1.1 ross * generating type 0 or type 1 cycles, and quietly returning -1 with
107 1.1 ross * no errors on unanswered probes.
108 1.1 ross */
109 1.1 ross pcireg_t
110 1.5 dsl tsp_conf_read(void *cpv, pcitag_t tag, int offset)
111 1.1 ross {
112 1.1 ross pcireg_t *datap, data;
113 1.1 ross struct tsp_config *pcp = cpv;
114 1.1 ross
115 1.1 ross datap = S_PAGE(pcp->pc_iobase | P_PCI_CONFIG | tag | (offset & ~3));
116 1.1 ross alpha_mb();
117 1.1 ross data = *datap;
118 1.1 ross alpha_mb();
119 1.1 ross return data;
120 1.1 ross }
121 1.1 ross
122 1.1 ross void
123 1.5 dsl tsp_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)
124 1.1 ross {
125 1.1 ross pcireg_t *datap;
126 1.1 ross struct tsp_config *pcp = cpv;
127 1.1 ross
128 1.1 ross datap = S_PAGE(pcp->pc_iobase | P_PCI_CONFIG | tag | (offset & ~3));
129 1.1 ross alpha_mb();
130 1.1 ross *datap = data;
131 1.1 ross alpha_mb();
132 1.1 ross }
133 1.6.2.1 uebayasi
134 1.6.2.1 uebayasi #define NTH_STR(n, ...) ((const char *[]){ __VA_ARGS__ }[n])
135 1.6.2.1 uebayasi
136 1.6.2.1 uebayasi void
137 1.6.2.1 uebayasi tsp_print_error(unsigned int indent, unsigned long p_error)
138 1.6.2.1 uebayasi {
139 1.6.2.1 uebayasi char buf[40];
140 1.6.2.1 uebayasi
141 1.6.2.1 uebayasi if (PER_INV(p_error)) {
142 1.6.2.1 uebayasi IPRINTF(indent, "data invalid\n");
143 1.6.2.1 uebayasi return;
144 1.6.2.1 uebayasi }
145 1.6.2.1 uebayasi
146 1.6.2.1 uebayasi if (!PER_ERR(p_error))
147 1.6.2.1 uebayasi return;
148 1.6.2.1 uebayasi
149 1.6.2.1 uebayasi snprintb(buf, 40,
150 1.6.2.1 uebayasi "\177\20"
151 1.6.2.1 uebayasi "b\0Error lost\0"
152 1.6.2.1 uebayasi "b\1PCI SERR#\0"
153 1.6.2.1 uebayasi "b\2PCI PERR#\0"
154 1.6.2.1 uebayasi "b\3Delayed completion retry timeout\0"
155 1.6.2.1 uebayasi "b\4Invalid S/G page table entry\0"
156 1.6.2.1 uebayasi "b\5Address parity error\0"
157 1.6.2.1 uebayasi "b\6Target abort\0"
158 1.6.2.1 uebayasi "b\7PCI read data parity error\0"
159 1.6.2.1 uebayasi "b\10no PCI DEVSEL#\0"
160 1.6.2.1 uebayasi "b\11unknown\0"
161 1.6.2.1 uebayasi "b\12Uncorrectable ECC\0"
162 1.6.2.1 uebayasi "b\13Correctable ECC\0",
163 1.6.2.1 uebayasi PER_ERR(p_error));
164 1.6.2.1 uebayasi IPRINTF(indent, "error = %s\n", buf);
165 1.6.2.1 uebayasi
166 1.6.2.1 uebayasi if (PER_ECC(p_error)) {
167 1.6.2.1 uebayasi IPRINTF(indent, "address = 0x%09lx\n", PER_SADR(p_error));
168 1.6.2.1 uebayasi IPRINTF(indent, "command = 0x%lx<%s>\n", PER_CMD(p_error),
169 1.6.2.1 uebayasi NTH_STR(PER_CMD(p_error) & 0x3,
170 1.6.2.1 uebayasi "DMA read", "DMA RMW", "?", "S/G read"));
171 1.6.2.1 uebayasi IPRINTF(indent, "syndrome = 0x%02lx\n", PER_SYN(p_error));
172 1.6.2.1 uebayasi } else {
173 1.6.2.1 uebayasi IPRINTF(indent, "address = 0x%08lx, 0x%lx<%s>\n",
174 1.6.2.1 uebayasi PER_PADR(p_error), PER_TRNS(p_error),
175 1.6.2.1 uebayasi NTH_STR(PER_TRNS(p_error), "No DAC", "DAC SG Win3",
176 1.6.2.1 uebayasi "Monster Window", "Monster Window"));
177 1.6.2.1 uebayasi IPRINTF(indent, "command = 0x%lx<%s>\n", PER_CMD(p_error),
178 1.6.2.1 uebayasi NTH_STR(PER_CMD(p_error),
179 1.6.2.1 uebayasi "PCI IACK", "PCI special cycle",
180 1.6.2.1 uebayasi "PCI I/O read", "PCI I/O write", "?",
181 1.6.2.1 uebayasi "PCI PTP write", "PCI memory read",
182 1.6.2.1 uebayasi "PCI memory write", "PCI CSR write",
183 1.6.2.1 uebayasi "?", "?", "?", "?", "?", "?", "?"));
184 1.6.2.1 uebayasi }
185 1.6.2.1 uebayasi }
186