Home | History | Annotate | Line # | Download | only in pci
tsp_pci.c revision 1.8
      1  1.8  matt /* $NetBSD: tsp_pci.c,v 1.8 2010/12/15 01:27:19 matt Exp $ */
      2  1.1  ross 
      3  1.1  ross /*-
      4  1.1  ross  * Copyright (c) 1999 by Ross Harvey.  All rights reserved.
      5  1.1  ross  *
      6  1.1  ross  * Redistribution and use in source and binary forms, with or without
      7  1.1  ross  * modification, are permitted provided that the following conditions
      8  1.1  ross  * are met:
      9  1.1  ross  * 1. Redistributions of source code must retain the above copyright
     10  1.1  ross  *    notice, this list of conditions and the following disclaimer.
     11  1.1  ross  * 2. Redistributions in binary form must reproduce the above copyright
     12  1.1  ross  *    notice, this list of conditions and the following disclaimer in the
     13  1.1  ross  *    documentation and/or other materials provided with the distribution.
     14  1.1  ross  * 3. All advertising materials mentioning features or use of this software
     15  1.1  ross  *    must display the following acknowledgement:
     16  1.1  ross  *	This product includes software developed by Ross Harvey.
     17  1.1  ross  * 4. The name of Ross Harvey may not be used to endorse or promote products
     18  1.1  ross  *    derived from this software without specific prior written permission.
     19  1.1  ross  *
     20  1.1  ross  * THIS SOFTWARE IS PROVIDED BY ROSS HARVEY ``AS IS'' AND ANY EXPRESS
     21  1.1  ross  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     22  1.1  ross  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP0SE
     23  1.1  ross  * ARE DISCLAIMED.  IN NO EVENT SHALL ROSS HARVEY BE LIABLE FOR ANY
     24  1.1  ross  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     25  1.1  ross  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     26  1.1  ross  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     27  1.1  ross  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     28  1.1  ross  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     29  1.1  ross  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     30  1.1  ross  * SUCH DAMAGE.
     31  1.1  ross  *
     32  1.1  ross  */
     33  1.1  ross 
     34  1.1  ross #include <sys/cdefs.h>
     35  1.1  ross 
     36  1.8  matt __KERNEL_RCSID(0, "$NetBSD: tsp_pci.c,v 1.8 2010/12/15 01:27:19 matt Exp $");
     37  1.1  ross 
     38  1.1  ross #include <sys/param.h>
     39  1.1  ross #include <sys/systm.h>
     40  1.1  ross #include <sys/kernel.h>
     41  1.1  ross #include <sys/device.h>
     42  1.2   mrg 
     43  1.1  ross #include <dev/pci/pcireg.h>
     44  1.1  ross #include <dev/pci/pcivar.h>
     45  1.1  ross 
     46  1.1  ross #include <machine/autoconf.h>
     47  1.1  ross #include <machine/rpb.h>
     48  1.1  ross 
     49  1.1  ross #include <alpha/pci/tsreg.h>
     50  1.1  ross #include <alpha/pci/tsvar.h>
     51  1.1  ross 
     52  1.1  ross #define tsp_pci() { Generate ctags(1) key. }
     53  1.1  ross 
     54  1.4   dsl void		tsp_attach_hook(struct device *, struct device *,
     55  1.4   dsl 		    struct pcibus_attach_args *);
     56  1.4   dsl int		tsp_bus_maxdevs(void *, int);
     57  1.4   dsl pcitag_t	tsp_make_tag(void *, int, int, int);
     58  1.4   dsl void		tsp_decompose_tag(void *, pcitag_t, int *, int *,
     59  1.4   dsl 		    int *);
     60  1.4   dsl pcireg_t	tsp_conf_read(void *, pcitag_t, int);
     61  1.4   dsl void		tsp_conf_write(void *, pcitag_t, int, pcireg_t);
     62  1.1  ross 
     63  1.1  ross void
     64  1.5   dsl tsp_pci_init(pci_chipset_tag_t pc, void *v)
     65  1.1  ross {
     66  1.1  ross 	pc->pc_conf_v = v;
     67  1.1  ross 	pc->pc_attach_hook = tsp_attach_hook;
     68  1.1  ross 	pc->pc_bus_maxdevs = tsp_bus_maxdevs;
     69  1.1  ross 	pc->pc_make_tag = tsp_make_tag;
     70  1.1  ross 	pc->pc_decompose_tag = tsp_decompose_tag;
     71  1.1  ross 	pc->pc_conf_read = tsp_conf_read;
     72  1.1  ross 	pc->pc_conf_write = tsp_conf_write;
     73  1.1  ross }
     74  1.1  ross 
     75  1.1  ross void
     76  1.6   dsl tsp_attach_hook(struct device *parent, struct device *self, struct pcibus_attach_args *pba)
     77  1.1  ross {
     78  1.1  ross }
     79  1.1  ross 
     80  1.1  ross int
     81  1.5   dsl tsp_bus_maxdevs(void *cpv, int busno)
     82  1.1  ross {
     83  1.1  ross 	return 32;
     84  1.1  ross }
     85  1.1  ross 
     86  1.1  ross pcitag_t
     87  1.6   dsl tsp_make_tag(void *cpv, int b, int d, int f)
     88  1.1  ross {
     89  1.1  ross 	return b << 16 | d << 11 | f << 8;
     90  1.1  ross }
     91  1.1  ross 
     92  1.1  ross void
     93  1.6   dsl tsp_decompose_tag(void *cpv, pcitag_t tag, int *bp, int *dp, int *fp)
     94  1.1  ross {
     95  1.1  ross 	if (bp != NULL)
     96  1.1  ross 		*bp = (tag >> 16) & 0xff;
     97  1.1  ross 	if (dp != NULL)
     98  1.1  ross 		*dp = (tag >> 11) & 0x1f;
     99  1.1  ross 	if (fp != NULL)
    100  1.1  ross 		*fp = (tag >> 8) & 0x7;
    101  1.1  ross }
    102  1.1  ross /*
    103  1.1  ross  * Tsunami makes this a lot easier than it used to be, automatically
    104  1.1  ross  * generating type 0 or type 1 cycles, and quietly returning -1 with
    105  1.1  ross  * no errors on unanswered probes.
    106  1.1  ross  */
    107  1.1  ross pcireg_t
    108  1.5   dsl tsp_conf_read(void *cpv, pcitag_t tag, int offset)
    109  1.1  ross {
    110  1.1  ross 	pcireg_t *datap, data;
    111  1.1  ross 	struct tsp_config *pcp = cpv;
    112  1.1  ross 
    113  1.1  ross 	datap = S_PAGE(pcp->pc_iobase | P_PCI_CONFIG | tag | (offset & ~3));
    114  1.1  ross 	alpha_mb();
    115  1.1  ross 	data = *datap;
    116  1.1  ross 	alpha_mb();
    117  1.1  ross 	return data;
    118  1.1  ross }
    119  1.1  ross 
    120  1.1  ross void
    121  1.5   dsl tsp_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)
    122  1.1  ross {
    123  1.1  ross 	pcireg_t *datap;
    124  1.1  ross 	struct tsp_config *pcp = cpv;
    125  1.1  ross 
    126  1.1  ross 	datap = S_PAGE(pcp->pc_iobase | P_PCI_CONFIG | tag | (offset & ~3));
    127  1.1  ross 	alpha_mb();
    128  1.1  ross 	*datap = data;
    129  1.1  ross 	alpha_mb();
    130  1.1  ross }
    131  1.7  hans 
    132  1.7  hans #define NTH_STR(n, ...) ((const char *[]){ __VA_ARGS__ }[n])
    133  1.7  hans 
    134  1.7  hans void
    135  1.7  hans tsp_print_error(unsigned int indent, unsigned long p_error)
    136  1.7  hans {
    137  1.7  hans 	char buf[40];
    138  1.7  hans 
    139  1.7  hans 	if (PER_INV(p_error)) {
    140  1.7  hans 		IPRINTF(indent, "data invalid\n");
    141  1.7  hans 		return;
    142  1.7  hans 	}
    143  1.7  hans 
    144  1.7  hans 	if (!PER_ERR(p_error))
    145  1.7  hans 		return;
    146  1.7  hans 
    147  1.7  hans 	snprintb(buf, 40,
    148  1.7  hans 		 "\177\20"
    149  1.7  hans 		 "b\0Error lost\0"
    150  1.7  hans 		 "b\1PCI SERR#\0"
    151  1.7  hans 		 "b\2PCI PERR#\0"
    152  1.7  hans 		 "b\3Delayed completion retry timeout\0"
    153  1.7  hans 		 "b\4Invalid S/G page table entry\0"
    154  1.7  hans 		 "b\5Address parity error\0"
    155  1.7  hans 		 "b\6Target abort\0"
    156  1.7  hans 		 "b\7PCI read data parity error\0"
    157  1.7  hans 		 "b\10no PCI DEVSEL#\0"
    158  1.7  hans 		 "b\11unknown\0"
    159  1.7  hans 		 "b\12Uncorrectable ECC\0"
    160  1.7  hans 		 "b\13Correctable ECC\0",
    161  1.7  hans 		 PER_ERR(p_error));
    162  1.7  hans 	IPRINTF(indent, "error    = %s\n", buf);
    163  1.7  hans 
    164  1.7  hans 	if (PER_ECC(p_error)) {
    165  1.7  hans 		IPRINTF(indent, "address  = 0x%09lx\n", PER_SADR(p_error));
    166  1.7  hans 		IPRINTF(indent, "command  = 0x%lx<%s>\n", PER_CMD(p_error),
    167  1.7  hans 			NTH_STR(PER_CMD(p_error) & 0x3,
    168  1.7  hans 				"DMA read", "DMA RMW", "?", "S/G read"));
    169  1.7  hans 		IPRINTF(indent, "syndrome = 0x%02lx\n", PER_SYN(p_error));
    170  1.7  hans 	} else {
    171  1.7  hans 		IPRINTF(indent, "address  = 0x%08lx, 0x%lx<%s>\n",
    172  1.7  hans 			PER_PADR(p_error), PER_TRNS(p_error),
    173  1.7  hans 			NTH_STR(PER_TRNS(p_error), "No DAC", "DAC SG Win3",
    174  1.7  hans 				"Monster Window", "Monster Window"));
    175  1.7  hans 		IPRINTF(indent, "command  = 0x%lx<%s>\n", PER_CMD(p_error),
    176  1.7  hans 			NTH_STR(PER_CMD(p_error),
    177  1.7  hans 				"PCI IACK", "PCI special cycle",
    178  1.7  hans 				"PCI I/O read", "PCI I/O write", "?",
    179  1.7  hans 				"PCI PTP write", "PCI memory read",
    180  1.7  hans 				"PCI memory write", "PCI CSR write",
    181  1.7  hans 				"?", "?", "?", "?", "?", "?", "?"));
    182  1.7  hans 	}
    183  1.7  hans }
    184