tsp_pci.c revision 1.10.34.1
1 /* $NetBSD: tsp_pci.c,v 1.10.34.1 2021/05/13 00:47:21 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 by Ross Harvey. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Ross Harvey. 17 * 4. The name of Ross Harvey may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY ROSS HARVEY ``AS IS'' AND ANY EXPRESS 21 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 22 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP0SE 23 * ARE DISCLAIMED. IN NO EVENT SHALL ROSS HARVEY BE LIABLE FOR ANY 24 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 35 __KERNEL_RCSID(0, "$NetBSD: tsp_pci.c,v 1.10.34.1 2021/05/13 00:47:21 thorpej Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/device.h> 41 42 #include <dev/pci/pcireg.h> 43 #include <dev/pci/pcivar.h> 44 45 #include <machine/autoconf.h> 46 #include <machine/rpb.h> 47 48 #include <alpha/pci/tsreg.h> 49 #include <alpha/pci/tsvar.h> 50 51 #define tsp_pci() { Generate ctags(1) key. } 52 53 static void tsp_attach_hook(device_t, device_t, 54 struct pcibus_attach_args *); 55 static int tsp_bus_maxdevs(void *, int); 56 static pcitag_t tsp_make_tag(void *, int, int, int); 57 static void tsp_decompose_tag(void *, pcitag_t, int *, int *, 58 int *); 59 static pcireg_t tsp_conf_read(void *, pcitag_t, int); 60 static void tsp_conf_write(void *, pcitag_t, int, pcireg_t); 61 62 void 63 tsp_pci_init(pci_chipset_tag_t pc, void *v) 64 { 65 pc->pc_conf_v = v; 66 pc->pc_attach_hook = tsp_attach_hook; 67 pc->pc_bus_maxdevs = tsp_bus_maxdevs; 68 pc->pc_make_tag = tsp_make_tag; 69 pc->pc_decompose_tag = tsp_decompose_tag; 70 pc->pc_conf_read = tsp_conf_read; 71 pc->pc_conf_write = tsp_conf_write; 72 } 73 74 static void 75 tsp_attach_hook(device_t parent, device_t self, struct pcibus_attach_args *pba) 76 { 77 } 78 79 static int 80 tsp_bus_maxdevs(void *cpv, int busno) 81 { 82 return 32; 83 } 84 85 static pcitag_t 86 tsp_make_tag(void *cpv, int b, int d, int f) 87 { 88 return b << 16 | d << 11 | f << 8; 89 } 90 91 static void 92 tsp_decompose_tag(void *cpv, pcitag_t tag, int *bp, int *dp, int *fp) 93 { 94 if (bp != NULL) 95 *bp = (tag >> 16) & 0xff; 96 if (dp != NULL) 97 *dp = (tag >> 11) & 0x1f; 98 if (fp != NULL) 99 *fp = (tag >> 8) & 0x7; 100 } 101 102 /* 103 * Tsunami makes this a lot easier than it used to be, automatically 104 * generating type 0 or type 1 cycles, and quietly returning -1 with 105 * no errors on unanswered probes. 106 */ 107 static pcireg_t 108 tsp_conf_read(void *cpv, pcitag_t tag, int offset) 109 { 110 pcireg_t *datap, data; 111 struct tsp_config *pcp = cpv; 112 113 if ((unsigned int)offset >= PCI_CONF_SIZE) 114 return (pcireg_t) -1; 115 116 datap = S_PAGE(pcp->pc_iobase | P_PCI_CONFIG | tag | (offset & ~3)); 117 alpha_mb(); 118 data = *datap; 119 alpha_mb(); 120 return data; 121 } 122 123 static void 124 tsp_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data) 125 { 126 pcireg_t *datap; 127 struct tsp_config *pcp = cpv; 128 129 if ((unsigned int)offset >= PCI_CONF_SIZE) 130 return; 131 132 datap = S_PAGE(pcp->pc_iobase | P_PCI_CONFIG | tag | (offset & ~3)); 133 alpha_mb(); 134 *datap = data; 135 alpha_mb(); 136 } 137 138 #define NTH_STR(n, ...) ((const char *[]){ __VA_ARGS__ }[n]) 139 140 void 141 tsp_print_error(unsigned int indent, unsigned long p_error) 142 { 143 char buf[40]; 144 145 if (PER_INV(p_error)) { 146 IPRINTF(indent, "data invalid\n"); 147 return; 148 } 149 150 if (!PER_ERR(p_error)) 151 return; 152 153 snprintb(buf, 40, 154 "\177\20" 155 "b\0Error lost\0" 156 "b\1PCI SERR#\0" 157 "b\2PCI PERR#\0" 158 "b\3Delayed completion retry timeout\0" 159 "b\4Invalid S/G page table entry\0" 160 "b\5Address parity error\0" 161 "b\6Target abort\0" 162 "b\7PCI read data parity error\0" 163 "b\10no PCI DEVSEL#\0" 164 "b\11unknown\0" 165 "b\12Uncorrectable ECC\0" 166 "b\13Correctable ECC\0", 167 PER_ERR(p_error)); 168 IPRINTF(indent, "error = %s\n", buf); 169 170 if (PER_ECC(p_error)) { 171 IPRINTF(indent, "address = 0x%09lx\n", PER_SADR(p_error)); 172 IPRINTF(indent, "command = 0x%lx<%s>\n", PER_CMD(p_error), 173 NTH_STR(PER_CMD(p_error) & 0x3, 174 "DMA read", "DMA RMW", "?", "S/G read")); 175 IPRINTF(indent, "syndrome = 0x%02lx\n", PER_SYN(p_error)); 176 } else { 177 IPRINTF(indent, "address = 0x%08lx, 0x%lx<%s>\n", 178 PER_PADR(p_error), PER_TRNS(p_error), 179 NTH_STR(PER_TRNS(p_error), "No DAC", "DAC SG Win3", 180 "Monster Window", "Monster Window")); 181 IPRINTF(indent, "command = 0x%lx<%s>\n", PER_CMD(p_error), 182 NTH_STR(PER_CMD(p_error), 183 "PCI IACK", "PCI special cycle", 184 "PCI I/O read", "PCI I/O write", "?", 185 "PCI PTP write", "PCI memory read", 186 "PCI memory write", "PCI CSR write", 187 "?", "?", "?", "?", "?", "?", "?")); 188 } 189 } 190
Indexes created Sun Oct 19 02:09:48 GMT 2025