tsp_pci.c revision 1.8
1 /* $NetBSD: tsp_pci.c,v 1.8 2010/12/15 01:27:19 matt Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 by Ross Harvey. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Ross Harvey. 17 * 4. The name of Ross Harvey may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY ROSS HARVEY ``AS IS'' AND ANY EXPRESS 21 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 22 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP0SE 23 * ARE DISCLAIMED. IN NO EVENT SHALL ROSS HARVEY BE LIABLE FOR ANY 24 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 * 32 */ 33 34 #include <sys/cdefs.h> 35 36 __KERNEL_RCSID(0, "$NetBSD: tsp_pci.c,v 1.8 2010/12/15 01:27:19 matt Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 43 #include <dev/pci/pcireg.h> 44 #include <dev/pci/pcivar.h> 45 46 #include <machine/autoconf.h> 47 #include <machine/rpb.h> 48 49 #include <alpha/pci/tsreg.h> 50 #include <alpha/pci/tsvar.h> 51 52 #define tsp_pci() { Generate ctags(1) key. } 53 54 void tsp_attach_hook(struct device *, struct device *, 55 struct pcibus_attach_args *); 56 int tsp_bus_maxdevs(void *, int); 57 pcitag_t tsp_make_tag(void *, int, int, int); 58 void tsp_decompose_tag(void *, pcitag_t, int *, int *, 59 int *); 60 pcireg_t tsp_conf_read(void *, pcitag_t, int); 61 void tsp_conf_write(void *, pcitag_t, int, pcireg_t); 62 63 void 64 tsp_pci_init(pci_chipset_tag_t pc, void *v) 65 { 66 pc->pc_conf_v = v; 67 pc->pc_attach_hook = tsp_attach_hook; 68 pc->pc_bus_maxdevs = tsp_bus_maxdevs; 69 pc->pc_make_tag = tsp_make_tag; 70 pc->pc_decompose_tag = tsp_decompose_tag; 71 pc->pc_conf_read = tsp_conf_read; 72 pc->pc_conf_write = tsp_conf_write; 73 } 74 75 void 76 tsp_attach_hook(struct device *parent, struct device *self, struct pcibus_attach_args *pba) 77 { 78 } 79 80 int 81 tsp_bus_maxdevs(void *cpv, int busno) 82 { 83 return 32; 84 } 85 86 pcitag_t 87 tsp_make_tag(void *cpv, int b, int d, int f) 88 { 89 return b << 16 | d << 11 | f << 8; 90 } 91 92 void 93 tsp_decompose_tag(void *cpv, pcitag_t tag, int *bp, int *dp, int *fp) 94 { 95 if (bp != NULL) 96 *bp = (tag >> 16) & 0xff; 97 if (dp != NULL) 98 *dp = (tag >> 11) & 0x1f; 99 if (fp != NULL) 100 *fp = (tag >> 8) & 0x7; 101 } 102 /* 103 * Tsunami makes this a lot easier than it used to be, automatically 104 * generating type 0 or type 1 cycles, and quietly returning -1 with 105 * no errors on unanswered probes. 106 */ 107 pcireg_t 108 tsp_conf_read(void *cpv, pcitag_t tag, int offset) 109 { 110 pcireg_t *datap, data; 111 struct tsp_config *pcp = cpv; 112 113 datap = S_PAGE(pcp->pc_iobase | P_PCI_CONFIG | tag | (offset & ~3)); 114 alpha_mb(); 115 data = *datap; 116 alpha_mb(); 117 return data; 118 } 119 120 void 121 tsp_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data) 122 { 123 pcireg_t *datap; 124 struct tsp_config *pcp = cpv; 125 126 datap = S_PAGE(pcp->pc_iobase | P_PCI_CONFIG | tag | (offset & ~3)); 127 alpha_mb(); 128 *datap = data; 129 alpha_mb(); 130 } 131 132 #define NTH_STR(n, ...) ((const char *[]){ __VA_ARGS__ }[n]) 133 134 void 135 tsp_print_error(unsigned int indent, unsigned long p_error) 136 { 137 char buf[40]; 138 139 if (PER_INV(p_error)) { 140 IPRINTF(indent, "data invalid\n"); 141 return; 142 } 143 144 if (!PER_ERR(p_error)) 145 return; 146 147 snprintb(buf, 40, 148 "\177\20" 149 "b\0Error lost\0" 150 "b\1PCI SERR#\0" 151 "b\2PCI PERR#\0" 152 "b\3Delayed completion retry timeout\0" 153 "b\4Invalid S/G page table entry\0" 154 "b\5Address parity error\0" 155 "b\6Target abort\0" 156 "b\7PCI read data parity error\0" 157 "b\10no PCI DEVSEL#\0" 158 "b\11unknown\0" 159 "b\12Uncorrectable ECC\0" 160 "b\13Correctable ECC\0", 161 PER_ERR(p_error)); 162 IPRINTF(indent, "error = %s\n", buf); 163 164 if (PER_ECC(p_error)) { 165 IPRINTF(indent, "address = 0x%09lx\n", PER_SADR(p_error)); 166 IPRINTF(indent, "command = 0x%lx<%s>\n", PER_CMD(p_error), 167 NTH_STR(PER_CMD(p_error) & 0x3, 168 "DMA read", "DMA RMW", "?", "S/G read")); 169 IPRINTF(indent, "syndrome = 0x%02lx\n", PER_SYN(p_error)); 170 } else { 171 IPRINTF(indent, "address = 0x%08lx, 0x%lx<%s>\n", 172 PER_PADR(p_error), PER_TRNS(p_error), 173 NTH_STR(PER_TRNS(p_error), "No DAC", "DAC SG Win3", 174 "Monster Window", "Monster Window")); 175 IPRINTF(indent, "command = 0x%lx<%s>\n", PER_CMD(p_error), 176 NTH_STR(PER_CMD(p_error), 177 "PCI IACK", "PCI special cycle", 178 "PCI I/O read", "PCI I/O write", "?", 179 "PCI PTP write", "PCI memory read", 180 "PCI memory write", "PCI CSR write", 181 "?", "?", "?", "?", "?", "?", "?")); 182 } 183 } 184
Indexes created Mon Oct 20 05:10:11 GMT 2025