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ioasic.c revision 1.12 
      1 /* $NetBSD: ioasic.c,v 1.12 1997/04/06 22:31:50 cgd Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
      5  * All rights reserved.
      6  *
      7  * Author: Keith Bostic, Chris G. Demetriou
      8  *
      9  * Permission to use, copy, modify and distribute this software and
     10  * its documentation is hereby granted, provided that both the copyright
     11  * notice and this permission notice appear in all copies of the
     12  * software, derivative works or modified versions, and any portions
     13  * thereof, and that both notices appear in supporting documentation.
     14  *
     15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  *
     19  * Carnegie Mellon requests users of this software to return to
     20  *
     21  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22  *  School of Computer Science
     23  *  Carnegie Mellon University
     24  *  Pittsburgh PA 15213-3890
     25  *
     26  * any improvements or extensions that they make and grant Carnegie the
     27  * rights to redistribute these changes.
     28  */
     29 
     30 #include <machine/options.h>		/* Pull in config options headers */
     31 
     32 #include <sys/param.h>
     33 #include <sys/kernel.h>
     34 #include <sys/systm.h>
     35 #include <sys/device.h>
     36 
     37 #include <machine/autoconf.h>
     38 #include <machine/pte.h>
     39 #include <machine/rpb.h>
     40 #ifndef EVCNT_COUNTERS
     41 #include <machine/intrcnt.h>
     42 #endif
     43 
     44 #include <dev/tc/tcvar.h>
     45 #include <alpha/tc/ioasicreg.h>
     46 #include <dev/tc/ioasicvar.h>
     47 
     48 struct ioasic_softc {
     49 	struct	device sc_dv;
     50 
     51 	tc_addr_t sc_base;
     52 	void	*sc_cookie;
     53 };
     54 
     55 /* Definition of the driver for autoconfig. */
     56 int	ioasicmatch __P((struct device *, struct cfdata *, void *));
     57 void	ioasicattach __P((struct device *, struct device *, void *));
     58 int     ioasicprint(void *, const char *);
     59 
     60 struct cfattach ioasic_ca = {
     61 	sizeof(struct ioasic_softc), ioasicmatch, ioasicattach,
     62 };
     63 
     64 struct cfdriver ioasic_cd = {
     65 	NULL, "ioasic", DV_DULL,
     66 };
     67 
     68 int	ioasic_intr __P((void *));
     69 int	ioasic_intrnull __P((void *));
     70 
     71 #define	C(x)	((void *)(x))
     72 
     73 #define	IOASIC_DEV_LANCE	0
     74 #define	IOASIC_DEV_SCC0		1
     75 #define	IOASIC_DEV_SCC1		2
     76 #define	IOASIC_DEV_ISDN		3
     77 
     78 #define	IOASIC_DEV_BOGUS	-1
     79 
     80 #define	IOASIC_NCOOKIES		4
     81 
     82 struct ioasic_dev {
     83 	char		*iad_modname;
     84 	tc_offset_t	iad_offset;
     85 	void		*iad_cookie;
     86 	u_int32_t	iad_intrbits;
     87 } ioasic_devs[] = {
     88 	/* XXX lance name */
     89 	{ "lance",    0x000c0000, C(IOASIC_DEV_LANCE), IOASIC_INTR_LANCE, },
     90 	{ "z8530   ", 0x00100000, C(IOASIC_DEV_SCC0),  IOASIC_INTR_SCC_0, },
     91 	{ "z8530   ", 0x00180000, C(IOASIC_DEV_SCC1),  IOASIC_INTR_SCC_1, },
     92 	{ "TOY_RTC ", 0x00200000, C(IOASIC_DEV_BOGUS), 0,                 },
     93 	{ "AMD79c30", 0x00240000, C(IOASIC_DEV_ISDN),  IOASIC_INTR_ISDN,  },
     94 };
     95 int ioasic_ndevs = sizeof(ioasic_devs) / sizeof(ioasic_devs[0]);
     96 
     97 struct ioasicintr {
     98 	int	(*iai_func) __P((void *));
     99 	void	*iai_arg;
    100 } ioasicintrs[IOASIC_NCOOKIES];
    101 
    102 tc_addr_t ioasic_base;		/* XXX XXX XXX */
    103 
    104 /* There can be only one. */
    105 int ioasicfound;
    106 
    107 extern int cputype;
    108 
    109 int
    110 ioasicmatch(parent, cfdata, aux)
    111 	struct device *parent;
    112 	struct cfdata *cfdata;
    113 	void *aux;
    114 {
    115 	struct tc_attach_args *ta = aux;
    116 
    117 	/* Make sure that we're looking for this type of device. */
    118 	if (strncmp("FLAMG-IO", ta->ta_modname, TC_ROM_LLEN))
    119 		return (0);
    120 
    121 	/* Check that it can actually exist. */
    122 	if ((cputype != ST_DEC_3000_500) && (cputype != ST_DEC_3000_300))
    123 		panic("ioasicmatch: how did we get here?");
    124 
    125 	if (ioasicfound)
    126 		return (0);
    127 
    128 	return (1);
    129 }
    130 
    131 void
    132 ioasicattach(parent, self, aux)
    133 	struct device *parent, *self;
    134 	void *aux;
    135 {
    136 	struct ioasic_softc *sc = (struct ioasic_softc *)self;
    137 	struct tc_attach_args *ta = aux;
    138 	struct ioasicdev_attach_args ioasicdev;
    139 	u_long i;
    140 
    141 	ioasicfound = 1;
    142 
    143 	sc->sc_base = ta->ta_addr;
    144 	ioasic_base = sc->sc_base;			/* XXX XXX XXX */
    145 	sc->sc_cookie = ta->ta_cookie;
    146 
    147 #ifdef DEC_3000_300
    148 	if (cputype == ST_DEC_3000_300) {
    149 		*(volatile u_int *)IOASIC_REG_CSR(sc->sc_base) |=
    150 		    IOASIC_CSR_FASTMODE;
    151 		tc_mb();
    152 		printf(": slow mode\n");
    153 	} else
    154 #endif
    155 		printf(": fast mode\n");
    156 
    157 	/*
    158 	 * Turn off all device interrupt bits.
    159 	 * (This does _not_ include 3000/300 TC option slot bits.
    160 	 */
    161 	for (i = 0; i < ioasic_ndevs; i++)
    162 		*(volatile u_int32_t *)IOASIC_REG_IMSK(ioasic_base) &=
    163 			~ioasic_devs[i].iad_intrbits;
    164 	tc_mb();
    165 
    166 	/*
    167 	 * Set up interrupt handlers.
    168 	 */
    169 	for (i = 0; i < IOASIC_NCOOKIES; i++) {
    170 		ioasicintrs[i].iai_func = ioasic_intrnull;
    171 		ioasicintrs[i].iai_arg = (void *)i;
    172 	}
    173 	tc_intr_establish(parent, sc->sc_cookie, TC_IPL_NONE, ioasic_intr, sc);
    174 
    175         /*
    176 	 * Try to configure each device.
    177 	 */
    178         for (i = 0; i < ioasic_ndevs; i++) {
    179 		strncpy(ioasicdev.iada_modname, ioasic_devs[i].iad_modname,
    180 			TC_ROM_LLEN);
    181 		ioasicdev.iada_modname[TC_ROM_LLEN] = '\0';
    182 		ioasicdev.iada_offset = ioasic_devs[i].iad_offset;
    183 		ioasicdev.iada_addr = sc->sc_base + ioasic_devs[i].iad_offset;
    184 		ioasicdev.iada_cookie = ioasic_devs[i].iad_cookie;
    185 
    186                 /* Tell the autoconfig machinery we've found the hardware. */
    187                 config_found(self, &ioasicdev, ioasicprint);
    188         }
    189 }
    190 
    191 int
    192 ioasicprint(aux, pnp)
    193 	void *aux;
    194 	const char *pnp;
    195 {
    196 	struct ioasicdev_attach_args *d = aux;
    197 
    198         if (pnp)
    199                 printf("%s at %s", d->iada_modname, pnp);
    200         printf(" offset 0x%lx", (long)d->iada_offset);
    201         return (UNCONF);
    202 }
    203 
    204 int
    205 ioasic_submatch(match, d)
    206 	struct cfdata *match;
    207 	struct ioasicdev_attach_args *d;
    208 {
    209 
    210 	return ((match->ioasiccf_offset == d->iada_offset) ||
    211 		(match->ioasiccf_offset == IOASIC_OFFSET_UNKNOWN));
    212 }
    213 
    214 void
    215 ioasic_intr_establish(ioa, cookie, level, func, arg)
    216 	struct device *ioa;
    217 	void *cookie, *arg;
    218 	tc_intrlevel_t level;
    219 	int (*func) __P((void *));
    220 {
    221 	u_long dev, i;
    222 
    223 	dev = (u_long)cookie;
    224 #ifdef DIAGNOSTIC
    225 	/* XXX check cookie. */
    226 #endif
    227 
    228 	if (ioasicintrs[dev].iai_func != ioasic_intrnull)
    229 		panic("ioasic_intr_establish: cookie %d twice", dev);
    230 
    231 	ioasicintrs[dev].iai_func = func;
    232 	ioasicintrs[dev].iai_arg = arg;
    233 
    234 	/* Enable interrupts for the device. */
    235 	for (i = 0; i < ioasic_ndevs; i++)
    236 		if (ioasic_devs[i].iad_cookie == cookie)
    237 			break;
    238 	if (i == ioasic_ndevs)
    239 		panic("ioasic_intr_establish: invalid cookie.");
    240 	*(volatile u_int32_t *)IOASIC_REG_IMSK(ioasic_base) |=
    241 		ioasic_devs[i].iad_intrbits;
    242 	tc_mb();
    243 }
    244 
    245 void
    246 ioasic_intr_disestablish(ioa, cookie)
    247 	struct device *ioa;
    248 	void *cookie;
    249 {
    250 	u_long dev, i;
    251 
    252 	dev = (u_long)cookie;
    253 #ifdef DIAGNOSTIC
    254 	/* XXX check cookie. */
    255 #endif
    256 
    257 	if (ioasicintrs[dev].iai_func == ioasic_intrnull)
    258 		panic("ioasic_intr_disestablish: cookie %d missing intr", dev);
    259 
    260 	/* Enable interrupts for the device. */
    261 	for (i = 0; i < ioasic_ndevs; i++)
    262 		if (ioasic_devs[i].iad_cookie == cookie)
    263 			break;
    264 	if (i == ioasic_ndevs)
    265 		panic("ioasic_intr_disestablish: invalid cookie.");
    266 	*(volatile u_int32_t *)IOASIC_REG_IMSK(ioasic_base) &=
    267 		~ioasic_devs[i].iad_intrbits;
    268 	tc_mb();
    269 
    270 	ioasicintrs[dev].iai_func = ioasic_intrnull;
    271 	ioasicintrs[dev].iai_arg = (void *)dev;
    272 }
    273 
    274 int
    275 ioasic_intrnull(val)
    276 	void *val;
    277 {
    278 
    279 	panic("ioasic_intrnull: uncaught IOASIC intr for cookie %ld\n",
    280 	    (u_long)val);
    281 }
    282 
    283 /*
    284  * asic_intr --
    285  *	ASIC interrupt handler.
    286  */
    287 int
    288 ioasic_intr(val)
    289 	void *val;
    290 {
    291 	register struct ioasic_softc *sc = val;
    292 	register int ifound;
    293 	int gifound;
    294 	u_int32_t sir;
    295 	volatile u_int32_t *sirp;
    296 
    297 	sirp = (volatile u_int32_t *)IOASIC_REG_INTR(sc->sc_base);
    298 
    299 	gifound = 0;
    300 	do {
    301 		ifound = 0;
    302 		tc_syncbus();
    303 
    304 		sir = *sirp;
    305 
    306 #ifdef EVCNT_COUNTERS
    307 	/* No interrupt counting via evcnt counters */
    308 	XXX BREAK HERE XXX
    309 #else /* !EVCNT_COUNTERS */
    310 #define	INCRINTRCNT(slot)	intrcnt[INTRCNT_IOASIC + slot]++
    311 #endif /* EVCNT_COUNTERS */
    312 
    313 		/* XXX DUPLICATION OF INTERRUPT BIT INFORMATION... */
    314 #define	CHECKINTR(slot, bits)						\
    315 		if (sir & bits) {					\
    316 			ifound = 1;					\
    317 			INCRINTRCNT(slot);				\
    318 			(*ioasicintrs[slot].iai_func)			\
    319 			    (ioasicintrs[slot].iai_arg);		\
    320 		}
    321 		CHECKINTR(IOASIC_DEV_SCC0, IOASIC_INTR_SCC_0);
    322 		CHECKINTR(IOASIC_DEV_SCC1, IOASIC_INTR_SCC_1);
    323 		CHECKINTR(IOASIC_DEV_LANCE, IOASIC_INTR_LANCE);
    324 		CHECKINTR(IOASIC_DEV_ISDN, IOASIC_INTR_ISDN);
    325 
    326 		gifound |= ifound;
    327 	} while (ifound);
    328 
    329 	return (gifound);
    330 }
    331 
    332 /* XXX */
    333 char *
    334 ioasic_lance_ether_address()
    335 {
    336 
    337 	return (u_char *)IOASIC_SYS_ETHER_ADDRESS(ioasic_base);
    338 }
    339 
    340 void
    341 ioasic_lance_dma_setup(v)
    342 	void *v;
    343 {
    344 	volatile u_int32_t *ldp;
    345 	tc_addr_t tca;
    346 
    347 	tca = (tc_addr_t)v;
    348 
    349 	ldp = (volatile u_int *)IOASIC_REG_LANCE_DMAPTR(ioasic_base);
    350 	*ldp = ((tca << 3) & ~(tc_addr_t)0x1f) | ((tca >> 29) & 0x1f);
    351 	tc_wmb();
    352 
    353 	*(volatile u_int32_t *)IOASIC_REG_CSR(ioasic_base) |=
    354 	    IOASIC_CSR_DMAEN_LANCE;
    355 	tc_mb();
    356 }
    357