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ioasic.c revision 1.3 
      1 /*	$NetBSD: ioasic.c,v 1.3 1996/04/12 01:31:46 cgd Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1994, 1995 Carnegie-Mellon University.
      5  * All rights reserved.
      6  *
      7  * Author: Keith Bostic, Chris G. Demetriou
      8  *
      9  * Permission to use, copy, modify and distribute this software and
     10  * its documentation is hereby granted, provided that both the copyright
     11  * notice and this permission notice appear in all copies of the
     12  * software, derivative works or modified versions, and any portions
     13  * thereof, and that both notices appear in supporting documentation.
     14  *
     15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  *
     19  * Carnegie Mellon requests users of this software to return to
     20  *
     21  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22  *  School of Computer Science
     23  *  Carnegie Mellon University
     24  *  Pittsburgh PA 15213-3890
     25  *
     26  * any improvements or extensions that they make and grant Carnegie the
     27  * rights to redistribute these changes.
     28  */
     29 
     30 #include <sys/param.h>
     31 #include <sys/kernel.h>
     32 #include <sys/systm.h>
     33 #include <sys/device.h>
     34 
     35 #include <machine/autoconf.h>
     36 #include <machine/pte.h>
     37 #include <machine/rpb.h>
     38 
     39 #include <dev/tc/tcvar.h>
     40 #include <alpha/tc/ioasicreg.h>
     41 #include <dev/tc/ioasicvar.h>
     42 
     43 struct ioasic_softc {
     44 	struct	device sc_dv;
     45 
     46 	tc_addr_t sc_base;
     47 	void	*sc_cookie;
     48 };
     49 
     50 /* Definition of the driver for autoconfig. */
     51 int	ioasicmatch __P((struct device *, void *, void *));
     52 void	ioasicattach __P((struct device *, struct device *, void *));
     53 int     ioasicprint(void *, char *);
     54 
     55 struct cfattach ioasic_ca = {
     56 	sizeof(struct ioasic_softc), ioasicmatch, ioasicattach,
     57 };
     58 
     59 struct cfdriver ioasic_cd = {
     60 	NULL, "ioasic", DV_DULL,
     61 };
     62 
     63 int	ioasic_intr __P((void *));
     64 int	ioasic_intrnull __P((void *));
     65 
     66 #define	C(x)	((void *)(x))
     67 
     68 #define	IOASIC_DEV_LANCE	0
     69 #define	IOASIC_DEV_SCC0		1
     70 #define	IOASIC_DEV_SCC1		2
     71 #define	IOASIC_DEV_ISDN		3
     72 
     73 #define	IOASIC_DEV_BOGUS	-1
     74 
     75 #define	IOASIC_NCOOKIES		4
     76 
     77 struct ioasic_dev {
     78 	char		*iad_modname;
     79 	tc_offset_t	iad_offset;
     80 	void		*iad_cookie;
     81 	u_int32_t	iad_intrbits;
     82 } ioasic_devs[] = {
     83 	/* XXX lance name */
     84 	{ "lance",    0x000c0000, C(IOASIC_DEV_LANCE), IOASIC_INTR_LANCE, },
     85 	{ "z8530   ", 0x00100000, C(IOASIC_DEV_SCC0),  IOASIC_INTR_SCC_0, },
     86 	{ "z8530   ", 0x00180000, C(IOASIC_DEV_SCC1),  IOASIC_INTR_SCC_1, },
     87 	{ "TOY_RTC ", 0x00200000, C(IOASIC_DEV_BOGUS), 0,                 },
     88 	{ "AMD79c30", 0x00240000, C(IOASIC_DEV_ISDN),  IOASIC_INTR_ISDN,  },
     89 };
     90 int ioasic_ndevs = sizeof(ioasic_devs) / sizeof(ioasic_devs[0]);
     91 
     92 struct ioasicintr {
     93 	int	(*iai_func) __P((void *));
     94 	void	*iai_arg;
     95 } ioasicintrs[IOASIC_NCOOKIES];
     96 
     97 tc_addr_t ioasic_base;		/* XXX XXX XXX */
     98 
     99 /* There can be only one. */
    100 int ioasicfound;
    101 
    102 extern int cputype;
    103 
    104 int
    105 ioasicmatch(parent, cfdata, aux)
    106 	struct device *parent;
    107 	void *cfdata;
    108 	void *aux;
    109 {
    110 	struct tc_attach_args *ta = aux;
    111 
    112 	/* Make sure that we're looking for this type of device. */
    113 	if (strncmp("FLAMG-IO", ta->ta_modname, TC_ROM_LLEN))
    114 		return (0);
    115 
    116 	/* Check that it can actually exist. */
    117 	if ((cputype != ST_DEC_3000_500) && (cputype != ST_DEC_3000_300))
    118 		panic("ioasicmatch: how did we get here?");
    119 
    120 	if (ioasicfound)
    121 		return (0);
    122 
    123 	return (1);
    124 }
    125 
    126 void
    127 ioasicattach(parent, self, aux)
    128 	struct device *parent, *self;
    129 	void *aux;
    130 {
    131 	struct ioasic_softc *sc = (struct ioasic_softc *)self;
    132 	struct tc_attach_args *ta = aux;
    133 	struct ioasicdev_attach_args ioasicdev;
    134 	u_long i;
    135 
    136 	ioasicfound = 1;
    137 
    138 	sc->sc_base = ta->ta_addr;
    139 	ioasic_base = sc->sc_base;			/* XXX XXX XXX */
    140 	sc->sc_cookie = ta->ta_cookie;
    141 
    142 #ifdef DEC_3000_300
    143 	if (cputype == ST_DEC_3000_300) {
    144 		*(volatile u_int *)IOASIC_REG_CSR(sc->sc_base) |=
    145 		    IOASIC_CSR_FASTMODE;
    146 		tc_mb();
    147 		printf(": slow mode\n");
    148 	} else
    149 #endif
    150 		printf(": fast mode\n");
    151 
    152 	/*
    153 	 * Turn off all device interrupt bits.
    154 	 * (This does _not_ include 3000/300 TC option slot bits.
    155 	 */
    156 	for (i = 0; i < ioasic_ndevs; i++)
    157 		*(volatile u_int32_t *)IOASIC_REG_IMSK(ioasic_base) &=
    158 			~ioasic_devs[i].iad_intrbits;
    159 	tc_mb();
    160 
    161 	/*
    162 	 * Set up interrupt handlers.
    163 	 */
    164 	for (i = 0; i < IOASIC_NCOOKIES; i++) {
    165 		ioasicintrs[i].iai_func = ioasic_intrnull;
    166 		ioasicintrs[i].iai_arg = (void *)i;
    167 	}
    168 	tc_intr_establish(parent, sc->sc_cookie, TC_IPL_NONE, ioasic_intr, sc);
    169 
    170         /*
    171 	 * Try to configure each device.
    172 	 */
    173         for (i = 0; i < ioasic_ndevs; i++) {
    174 		strncpy(ioasicdev.iada_modname, ioasic_devs[i].iad_modname,
    175 			TC_ROM_LLEN);
    176 		ioasicdev.iada_modname[TC_ROM_LLEN] = '\0';
    177 		ioasicdev.iada_offset = ioasic_devs[i].iad_offset;
    178 		ioasicdev.iada_addr = sc->sc_base + ioasic_devs[i].iad_offset;
    179 		ioasicdev.iada_cookie = ioasic_devs[i].iad_cookie;
    180 
    181                 /* Tell the autoconfig machinery we've found the hardware. */
    182                 config_found(self, &ioasicdev, ioasicprint);
    183         }
    184 }
    185 
    186 int
    187 ioasicprint(aux, pnp)
    188 	void *aux;
    189 	char *pnp;
    190 {
    191 	struct ioasicdev_attach_args *d = aux;
    192 
    193         if (pnp)
    194                 printf("%s at %s", d->iada_modname, pnp);
    195         printf(" offset 0x%lx", (long)d->iada_offset);
    196         return (UNCONF);
    197 }
    198 
    199 int
    200 ioasic_submatch(match, d)
    201 	struct cfdata *match;
    202 	struct ioasicdev_attach_args *d;
    203 {
    204 
    205 	return ((match->ioasiccf_offset == d->iada_offset) ||
    206 		(match->ioasiccf_offset == IOASIC_OFFSET_UNKNOWN));
    207 }
    208 
    209 void
    210 ioasic_intr_establish(ioa, cookie, level, func, arg)
    211 	struct device *ioa;
    212 	void *cookie, *arg;
    213 	tc_intrlevel_t level;
    214 	int (*func) __P((void *));
    215 {
    216 	u_long dev, i;
    217 
    218 	dev = (u_long)cookie;
    219 #ifdef DIAGNOSTIC
    220 	/* XXX check cookie. */
    221 #endif
    222 
    223 	if (ioasicintrs[dev].iai_func != ioasic_intrnull)
    224 		panic("ioasic_intr_establish: cookie %d twice", dev);
    225 
    226 	ioasicintrs[dev].iai_func = func;
    227 	ioasicintrs[dev].iai_arg = arg;
    228 
    229 	/* Enable interrupts for the device. */
    230 	for (i = 0; i < ioasic_ndevs; i++)
    231 		if (ioasic_devs[i].iad_cookie == cookie)
    232 			break;
    233 	if (i == ioasic_ndevs)
    234 		panic("ioasic_intr_establish: invalid cookie.");
    235 	*(volatile u_int32_t *)IOASIC_REG_IMSK(ioasic_base) |=
    236 		ioasic_devs[i].iad_intrbits;
    237 	tc_mb();
    238 }
    239 
    240 void
    241 ioasic_intr_disestablish(ioa, cookie)
    242 	struct device *ioa;
    243 	void *cookie;
    244 {
    245 	u_long dev, i;
    246 
    247 	dev = (u_long)cookie;
    248 #ifdef DIAGNOSTIC
    249 	/* XXX check cookie. */
    250 #endif
    251 
    252 	if (ioasicintrs[dev].iai_func == ioasic_intrnull)
    253 		panic("ioasic_intr_disestablish: cookie %d missing intr", dev);
    254 
    255 	/* Enable interrupts for the device. */
    256 	for (i = 0; i < ioasic_ndevs; i++)
    257 		if (ioasic_devs[i].iad_cookie == cookie)
    258 			break;
    259 	if (i == ioasic_ndevs)
    260 		panic("ioasic_intr_disestablish: invalid cookie.");
    261 	*(volatile u_int32_t *)IOASIC_REG_IMSK(ioasic_base) &=
    262 		~ioasic_devs[i].iad_intrbits;
    263 	tc_mb();
    264 
    265 	ioasicintrs[dev].iai_func = ioasic_intrnull;
    266 	ioasicintrs[dev].iai_arg = (void *)dev;
    267 }
    268 
    269 int
    270 ioasic_intrnull(val)
    271 	void *val;
    272 {
    273 
    274 	panic("ioasic_intrnull: uncaught IOASIC intr for cookie %ld\n",
    275 	    (u_long)val);
    276 }
    277 
    278 /*
    279  * asic_intr --
    280  *	ASIC interrupt handler.
    281  */
    282 int
    283 ioasic_intr(val)
    284 	void *val;
    285 {
    286 	register struct ioasic_softc *sc = val;
    287 	register int i, ifound;
    288 	int gifound;
    289 	u_int32_t sir, junk;
    290 	volatile u_int32_t *sirp, *junkp;
    291 
    292 	sirp = (volatile u_int32_t *)IOASIC_REG_INTR(sc->sc_base);
    293 
    294 	gifound = 0;
    295 	do {
    296 		ifound = 0;
    297 		tc_syncbus();
    298 
    299 		sir = *sirp;
    300 
    301 		/* XXX DUPLICATION OF INTERRUPT BIT INFORMATION... */
    302 #define	CHECKINTR(slot, bits)						\
    303 		if (sir & bits) {					\
    304 			ifound = 1;					\
    305 			(*ioasicintrs[slot].iai_func)			\
    306 			    (ioasicintrs[slot].iai_arg);		\
    307 		}
    308 		CHECKINTR(IOASIC_DEV_SCC0, IOASIC_INTR_SCC_0);
    309 		CHECKINTR(IOASIC_DEV_SCC1, IOASIC_INTR_SCC_1);
    310 		CHECKINTR(IOASIC_DEV_LANCE, IOASIC_INTR_LANCE);
    311 		CHECKINTR(IOASIC_DEV_ISDN, IOASIC_INTR_ISDN);
    312 
    313 		gifound |= ifound;
    314 	} while (ifound);
    315 
    316 	return (gifound);
    317 }
    318 
    319 /* XXX */
    320 char *
    321 ioasic_lance_ether_address()
    322 {
    323 
    324 	return (u_char *)IOASIC_SYS_ETHER_ADDRESS(ioasic_base);
    325 }
    326 
    327 void
    328 ioasic_lance_dma_setup(v)
    329 	void *v;
    330 {
    331 	volatile u_int32_t *ldp;
    332 	tc_addr_t tca;
    333 
    334 	tca = (tc_addr_t)v;
    335 
    336 	ldp = (volatile u_int *)IOASIC_REG_LANCE_DMAPTR(ioasic_base);
    337 	*ldp = ((tca << 3) & ~(tc_addr_t)0x1f) | ((tca >> 29) & 0x1f);
    338 	tc_wmb();
    339 
    340 	*(volatile u_int32_t *)IOASIC_REG_CSR(ioasic_base) |=
    341 	    IOASIC_CSR_DMAEN_LANCE;
    342 	tc_mb();
    343 }
    344