Home | History | Annotate | Line # | Download | only in tc
tc_3000_300.c revision 1.4
      1  1.4  cgd /*	$NetBSD: tc_3000_300.c,v 1.4 1995/12/20 00:43:27 cgd Exp $	*/
      2  1.1  cgd 
      3  1.1  cgd /*
      4  1.1  cgd  * Copyright (c) 1994, 1995 Carnegie-Mellon University.
      5  1.1  cgd  * All rights reserved.
      6  1.1  cgd  *
      7  1.1  cgd  * Author: Chris G. Demetriou
      8  1.1  cgd  *
      9  1.1  cgd  * Permission to use, copy, modify and distribute this software and
     10  1.1  cgd  * its documentation is hereby granted, provided that both the copyright
     11  1.1  cgd  * notice and this permission notice appear in all copies of the
     12  1.1  cgd  * software, derivative works or modified versions, and any portions
     13  1.1  cgd  * thereof, and that both notices appear in supporting documentation.
     14  1.1  cgd  *
     15  1.1  cgd  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  1.1  cgd  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17  1.1  cgd  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  1.1  cgd  *
     19  1.1  cgd  * Carnegie Mellon requests users of this software to return to
     20  1.1  cgd  *
     21  1.1  cgd  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22  1.1  cgd  *  School of Computer Science
     23  1.1  cgd  *  Carnegie Mellon University
     24  1.1  cgd  *  Pittsburgh PA 15213-3890
     25  1.1  cgd  *
     26  1.1  cgd  * any improvements or extensions that they make and grant Carnegie the
     27  1.1  cgd  * rights to redistribute these changes.
     28  1.1  cgd  */
     29  1.1  cgd 
     30  1.1  cgd #include <sys/param.h>
     31  1.1  cgd #include <sys/device.h>
     32  1.1  cgd 
     33  1.1  cgd #include <machine/autoconf.h>
     34  1.1  cgd #include <machine/pte.h>
     35  1.1  cgd 
     36  1.4  cgd #include <dev/tc/tcvar.h>
     37  1.4  cgd #include <alpha/tc/tc_conf.h>
     38  1.1  cgd #include <alpha/tc/tc_3000_300.h>
     39  1.1  cgd 
     40  1.1  cgd void	tc_3000_300_intr_setup __P((void));
     41  1.4  cgd void	tc_3000_300_intr_establish __P((struct device *, void *,
     42  1.4  cgd 	    tc_intrlevel_t, int (*)(void *), void *));
     43  1.4  cgd void	tc_3000_300_intr_disestablish __P((struct device *, void *));
     44  1.1  cgd void	tc_3000_300_iointr __P((void *, int));
     45  1.1  cgd 
     46  1.4  cgd int	tc_3000_300_intrnull __P((void *));
     47  1.4  cgd 
     48  1.4  cgd #define	C(x)	((void *)(u_long)x)
     49  1.4  cgd #define	KV(x)	(phystok0seg(x))
     50  1.1  cgd 
     51  1.4  cgd struct tc_slotdesc tc_3000_300_slots[] = {
     52  1.4  cgd 	{ KV(0x100000000), C(TC_3000_300_DEV_OPT0), },	/* 0 - opt slot 0 */
     53  1.4  cgd 	{ KV(0x120000000), C(TC_3000_300_DEV_OPT1), },	/* 1 - opt slot 1 */
     54  1.4  cgd 	{ KV(0x180000000), C(TC_3000_300_DEV_BOGUS), },	/* 2 - TCDS ASIC */
     55  1.4  cgd 	{ KV(0x1a0000000), C(TC_3000_300_DEV_BOGUS), },	/* 3 - IOCTL ASIC */
     56  1.4  cgd 	{ KV(0x1c0000000), C(TC_3000_300_DEV_CXTURBO), }, /* 4 - CXTurbo */
     57  1.1  cgd };
     58  1.4  cgd int tc_3000_300_nslots =
     59  1.4  cgd     sizeof(tc_3000_300_slots) / sizeof(tc_3000_300_slots[0]);
     60  1.1  cgd 
     61  1.4  cgd struct tc_builtin tc_3000_300_builtins[] = {
     62  1.4  cgd 	{ "PMAGB-BA",	4, 0x02000000, C(TC_3000_300_DEV_CXTURBO),	},
     63  1.4  cgd 	{ "FLAMG-IO",	3, 0x00000000, C(TC_3000_300_DEV_IOASIC),	},
     64  1.4  cgd 	{ "PMAZ-DS ",	2, 0x00000000, C(TC_3000_300_DEV_TCDS),		},
     65  1.1  cgd };
     66  1.4  cgd int tc_3000_300_nbuiltins =
     67  1.4  cgd     sizeof(tc_3000_300_builtins) / sizeof(tc_3000_300_builtins[0]);
     68  1.1  cgd 
     69  1.4  cgd struct tcintr {
     70  1.4  cgd 	int	(*tci_func) __P((void *));
     71  1.4  cgd 	void	*tci_arg;
     72  1.4  cgd } tc_3000_300_intr[TC_3000_300_NCOOKIES];
     73  1.4  cgd 
     74  1.4  cgd /* XXX */
     75  1.4  cgd void	ioasic_intr_300_opt0_enable __P((int));
     76  1.4  cgd void	ioasic_intr_300_opt1_enable __P((int));
     77  1.4  cgd void	ioasic_300_opts_isintr __P((int *, int *));
     78  1.1  cgd 
     79  1.1  cgd void
     80  1.1  cgd tc_3000_300_intr_setup()
     81  1.1  cgd {
     82  1.4  cgd 	u_long i;
     83  1.1  cgd 
     84  1.4  cgd 	/*
     85  1.4  cgd 	 * Sisable all interrupts that we can (can't disable builtins).
     86  1.4  cgd 	 */
     87  1.4  cgd 	ioasic_intr_300_opt0_enable(0);
     88  1.4  cgd 	ioasic_intr_300_opt1_enable(0);
     89  1.4  cgd 
     90  1.4  cgd 	/*
     91  1.4  cgd 	 * Set up interrupt handlers.
     92  1.4  cgd 	 */
     93  1.4  cgd 	for (i = 0; i < TC_3000_300_NCOOKIES; i++) {
     94  1.4  cgd                 tc_3000_300_intr[i].tci_func = tc_3000_300_intrnull;
     95  1.4  cgd                 tc_3000_300_intr[i].tci_arg = (void *)i;
     96  1.2  cgd 	}
     97  1.1  cgd }
     98  1.1  cgd 
     99  1.1  cgd void
    100  1.4  cgd tc_3000_300_intr_establish(tcadev, cookie, level, func, arg)
    101  1.4  cgd 	struct device *tcadev;
    102  1.4  cgd 	void *cookie, *arg;
    103  1.4  cgd 	tc_intrlevel_t level;
    104  1.4  cgd 	int (*func) __P((void *));
    105  1.1  cgd {
    106  1.4  cgd 	u_long dev = (u_long)cookie;
    107  1.1  cgd 
    108  1.1  cgd #ifdef DIAGNOSTIC
    109  1.4  cgd 	/* XXX bounds-check cookie. */
    110  1.1  cgd #endif
    111  1.1  cgd 
    112  1.4  cgd 	if (tc_3000_300_intr[dev].tci_func != tc_3000_300_intrnull)
    113  1.4  cgd 		panic("tc_3000_300_intr_establish: cookie %d twice", dev);
    114  1.1  cgd 
    115  1.4  cgd 	tc_3000_300_intr[dev].tci_func = func;
    116  1.4  cgd 	tc_3000_300_intr[dev].tci_arg = arg;
    117  1.1  cgd 
    118  1.4  cgd 	switch (dev) {
    119  1.4  cgd 	case TC_3000_300_DEV_OPT0:
    120  1.4  cgd 		ioasic_intr_300_opt0_enable(1);
    121  1.4  cgd 		break;
    122  1.4  cgd 	case TC_3000_300_DEV_OPT1:
    123  1.4  cgd 		ioasic_intr_300_opt1_enable(1);
    124  1.4  cgd 		break;
    125  1.4  cgd 	default:
    126  1.4  cgd 		/* interrupts for builtins always enabled */
    127  1.4  cgd 		break;
    128  1.4  cgd 	}
    129  1.1  cgd }
    130  1.1  cgd 
    131  1.1  cgd void
    132  1.4  cgd tc_3000_300_intr_disestablish(tcadev, cookie)
    133  1.4  cgd 	struct device *tcadev;
    134  1.4  cgd 	void *cookie;
    135  1.1  cgd {
    136  1.4  cgd 	u_long dev = (u_long)cookie;
    137  1.1  cgd 
    138  1.1  cgd #ifdef DIAGNOSTIC
    139  1.4  cgd 	/* XXX bounds-check cookie. */
    140  1.1  cgd #endif
    141  1.1  cgd 
    142  1.4  cgd 	if (tc_3000_300_intr[dev].tci_func == tc_3000_300_intrnull)
    143  1.4  cgd 		panic("tc_3000_300_intr_disestablish: cookie %d bad intr",
    144  1.1  cgd 		    dev);
    145  1.1  cgd 
    146  1.4  cgd 	switch (dev) {
    147  1.4  cgd 	case TC_3000_300_DEV_OPT0:
    148  1.4  cgd 		ioasic_intr_300_opt0_enable(0);
    149  1.4  cgd 		break;
    150  1.4  cgd 	case TC_3000_300_DEV_OPT1:
    151  1.4  cgd 		ioasic_intr_300_opt1_enable(0);
    152  1.4  cgd 		break;
    153  1.4  cgd 	default:
    154  1.4  cgd 		/* interrupts for builtins always enabled */
    155  1.4  cgd 		break;
    156  1.4  cgd 	}
    157  1.1  cgd 
    158  1.4  cgd 	tc_3000_300_intr[dev].tci_func = tc_3000_300_intrnull;
    159  1.4  cgd 	tc_3000_300_intr[dev].tci_arg = (void *)dev;
    160  1.4  cgd }
    161  1.4  cgd 
    162  1.4  cgd int
    163  1.4  cgd tc_3000_300_intrnull(val)
    164  1.4  cgd 	void *val;
    165  1.4  cgd {
    166  1.4  cgd 
    167  1.4  cgd 	panic("tc_3000_300_intrnull: uncaught TC intr for cookie %ld\n",
    168  1.4  cgd 	    (u_long)val);
    169  1.1  cgd }
    170  1.1  cgd 
    171  1.1  cgd void
    172  1.1  cgd tc_3000_300_iointr(framep, vec)
    173  1.2  cgd 	void *framep;
    174  1.2  cgd 	int vec;
    175  1.1  cgd {
    176  1.2  cgd 	u_int32_t ir;
    177  1.4  cgd 	int opt0intr, opt1intr, ifound;
    178  1.1  cgd 
    179  1.1  cgd #ifdef DIAGNOSTIC
    180  1.1  cgd 	int s;
    181  1.1  cgd 	if (vec != 0x800)
    182  1.1  cgd 		panic("INVALID ASSUMPTION: vec %x, not 0x800", vec);
    183  1.1  cgd 	s = splhigh();
    184  1.1  cgd 	if (s != PSL_IPL_IO)
    185  1.1  cgd 		panic("INVALID ASSUMPTION: IPL %d, not %d", s, PSL_IPL_IO);
    186  1.1  cgd 	splx(s);
    187  1.1  cgd #endif
    188  1.1  cgd 
    189  1.1  cgd 	do {
    190  1.4  cgd 		tc_syncbus();
    191  1.2  cgd 
    192  1.2  cgd 		/* find out what interrupts/errors occurred */
    193  1.2  cgd 		ir = *(volatile u_int32_t *)TC_3000_300_IR;
    194  1.4  cgd 		ioasic_300_opts_isintr(&opt0intr, &opt1intr);
    195  1.4  cgd 		tc_mb();
    196  1.2  cgd 
    197  1.2  cgd 		/* clear the interrupts/errors we found. */
    198  1.2  cgd 		*(volatile u_int32_t *)TC_3000_300_IR = ir;
    199  1.4  cgd 		/* XXX can't clear TC option slot interrupts here? */
    200  1.4  cgd 		tc_wmb();
    201  1.1  cgd 
    202  1.1  cgd 		ifound = 0;
    203  1.4  cgd #define	CHECKINTR(slot, flag)						\
    204  1.4  cgd 		if (flag) {					\
    205  1.1  cgd 			ifound = 1;					\
    206  1.4  cgd 			(*tc_3000_300_intr[slot].tci_func)		\
    207  1.4  cgd 			    (tc_3000_300_intr[slot].tci_arg);		\
    208  1.1  cgd 		}
    209  1.1  cgd 		/* Do them in order of priority; highest slot # first. */
    210  1.4  cgd 		CHECKINTR(TC_3000_300_DEV_CXTURBO, ir & TC_3000_300_IR_CXTURBO);
    211  1.4  cgd 		CHECKINTR(TC_3000_300_DEV_IOASIC, ir & TC_3000_300_IR_IOASIC);
    212  1.4  cgd 		CHECKINTR(TC_3000_300_DEV_TCDS, ir & TC_3000_300_IR_TCDS);
    213  1.4  cgd 		CHECKINTR(TC_3000_300_DEV_OPT1, opt1intr);
    214  1.4  cgd 		CHECKINTR(TC_3000_300_DEV_OPT0, opt0intr);
    215  1.1  cgd #undef CHECKINTR
    216  1.1  cgd 
    217  1.1  cgd #ifdef DIAGNOSTIC
    218  1.1  cgd #define PRINTINTR(msg, bits)						\
    219  1.1  cgd 	if (ir & bits)							\
    220  1.1  cgd 		printf(msg);
    221  1.1  cgd 		PRINTINTR("BCache tag parity error\n",
    222  1.1  cgd 		    TC_3000_300_IR_BCTAGPARITY);
    223  1.1  cgd 		PRINTINTR("TC overrun error\n", TC_3000_300_IR_TCOVERRUN);
    224  1.1  cgd 		PRINTINTR("TC I/O timeout\n", TC_3000_300_IR_TCTIMEOUT);
    225  1.1  cgd 		PRINTINTR("Bcache parity error\n",
    226  1.1  cgd 		    TC_3000_300_IR_BCACHEPARITY);
    227  1.1  cgd 		PRINTINTR("Memory parity error\n", TC_3000_300_IR_MEMPARITY);
    228  1.1  cgd #undef PRINTINTR
    229  1.1  cgd #endif
    230  1.1  cgd 	} while (ifound);
    231  1.1  cgd }
    232