tc_3000_300.c revision 1.13
1 /* $NetBSD: tc_3000_300.c,v 1.13 1997/04/06 22:32:00 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <machine/options.h> /* Pull in config options headers */ 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/device.h> 35 36 #include <machine/autoconf.h> 37 #include <machine/pte.h> 38 #ifndef EVCNT_COUNTERS 39 #include <machine/intrcnt.h> 40 #endif 41 42 #include <dev/tc/tcvar.h> 43 #include <alpha/tc/tc_conf.h> 44 #include <alpha/tc/tc_3000_300.h> 45 #include <alpha/tc/ioasicreg.h> 46 47 void tc_3000_300_intr_setup __P((void)); 48 void tc_3000_300_intr_establish __P((struct device *, void *, 49 tc_intrlevel_t, int (*)(void *), void *)); 50 void tc_3000_300_intr_disestablish __P((struct device *, void *)); 51 void tc_3000_300_iointr __P((void *, unsigned long)); 52 53 int tc_3000_300_intrnull __P((void *)); 54 55 #define C(x) ((void *)(u_long)x) 56 #define KV(x) (ALPHA_PHYS_TO_K0SEG(x)) 57 58 /* 59 * We have to read and modify the IOASIC registers directly, because 60 * the TC option slot interrupt request and mask bits are stored there, 61 * and the ioasic code isn't initted when we need to frob some interrupt 62 * bits. 63 */ 64 #define DEC_3000_300_IOASIC_ADDR KV(0x1a0000000) 65 66 struct tc_slotdesc tc_3000_300_slots[] = { 67 { KV(0x100000000), C(TC_3000_300_DEV_OPT0), }, /* 0 - opt slot 0 */ 68 { KV(0x120000000), C(TC_3000_300_DEV_OPT1), }, /* 1 - opt slot 1 */ 69 { KV(0x180000000), C(TC_3000_300_DEV_BOGUS), }, /* 2 - TCDS ASIC */ 70 { KV(0x1a0000000), C(TC_3000_300_DEV_BOGUS), }, /* 3 - IOCTL ASIC */ 71 { KV(0x1c0000000), C(TC_3000_300_DEV_CXTURBO), }, /* 4 - CXTurbo */ 72 }; 73 int tc_3000_300_nslots = 74 sizeof(tc_3000_300_slots) / sizeof(tc_3000_300_slots[0]); 75 76 struct tc_builtin tc_3000_300_builtins[] = { 77 { "PMAGB-BA", 4, 0x02000000, C(TC_3000_300_DEV_CXTURBO), }, 78 { "FLAMG-IO", 3, 0x00000000, C(TC_3000_300_DEV_IOASIC), }, 79 { "PMAZ-DS ", 2, 0x00000000, C(TC_3000_300_DEV_TCDS), }, 80 }; 81 int tc_3000_300_nbuiltins = 82 sizeof(tc_3000_300_builtins) / sizeof(tc_3000_300_builtins[0]); 83 84 struct tcintr { 85 int (*tci_func) __P((void *)); 86 void *tci_arg; 87 } tc_3000_300_intr[TC_3000_300_NCOOKIES]; 88 89 void 90 tc_3000_300_intr_setup() 91 { 92 volatile u_int32_t *imskp; 93 u_long i; 94 95 /* 96 * Disable all interrupts that we can (can't disable builtins). 97 */ 98 imskp = (volatile u_int32_t *)IOASIC_REG_IMSK(DEC_3000_300_IOASIC_ADDR); 99 *imskp &= ~(IOASIC_INTR_300_OPT0 | IOASIC_INTR_300_OPT1); 100 101 /* 102 * Set up interrupt handlers. 103 */ 104 for (i = 0; i < TC_3000_300_NCOOKIES; i++) { 105 tc_3000_300_intr[i].tci_func = tc_3000_300_intrnull; 106 tc_3000_300_intr[i].tci_arg = (void *)i; 107 } 108 } 109 110 void 111 tc_3000_300_intr_establish(tcadev, cookie, level, func, arg) 112 struct device *tcadev; 113 void *cookie, *arg; 114 tc_intrlevel_t level; 115 int (*func) __P((void *)); 116 { 117 volatile u_int32_t *imskp; 118 u_long dev = (u_long)cookie; 119 120 #ifdef DIAGNOSTIC 121 /* XXX bounds-check cookie. */ 122 #endif 123 124 if (tc_3000_300_intr[dev].tci_func != tc_3000_300_intrnull) 125 panic("tc_3000_300_intr_establish: cookie %d twice", dev); 126 127 tc_3000_300_intr[dev].tci_func = func; 128 tc_3000_300_intr[dev].tci_arg = arg; 129 130 imskp = (volatile u_int32_t *)IOASIC_REG_IMSK(DEC_3000_300_IOASIC_ADDR); 131 switch (dev) { 132 case TC_3000_300_DEV_OPT0: 133 *imskp |= IOASIC_INTR_300_OPT0; 134 break; 135 case TC_3000_300_DEV_OPT1: 136 *imskp |= IOASIC_INTR_300_OPT1; 137 break; 138 default: 139 /* interrupts for builtins always enabled */ 140 break; 141 } 142 } 143 144 void 145 tc_3000_300_intr_disestablish(tcadev, cookie) 146 struct device *tcadev; 147 void *cookie; 148 { 149 volatile u_int32_t *imskp; 150 u_long dev = (u_long)cookie; 151 152 #ifdef DIAGNOSTIC 153 /* XXX bounds-check cookie. */ 154 #endif 155 156 if (tc_3000_300_intr[dev].tci_func == tc_3000_300_intrnull) 157 panic("tc_3000_300_intr_disestablish: cookie %d bad intr", 158 dev); 159 160 imskp = (volatile u_int32_t *)IOASIC_REG_IMSK(DEC_3000_300_IOASIC_ADDR); 161 switch (dev) { 162 case TC_3000_300_DEV_OPT0: 163 *imskp &= ~IOASIC_INTR_300_OPT0; 164 break; 165 case TC_3000_300_DEV_OPT1: 166 *imskp &= ~IOASIC_INTR_300_OPT1; 167 break; 168 default: 169 /* interrupts for builtins always enabled */ 170 break; 171 } 172 173 tc_3000_300_intr[dev].tci_func = tc_3000_300_intrnull; 174 tc_3000_300_intr[dev].tci_arg = (void *)dev; 175 } 176 177 int 178 tc_3000_300_intrnull(val) 179 void *val; 180 { 181 182 panic("tc_3000_300_intrnull: uncaught TC intr for cookie %ld\n", 183 (u_long)val); 184 } 185 186 void 187 tc_3000_300_iointr(framep, vec) 188 void *framep; 189 unsigned long vec; 190 { 191 u_int32_t tcir, ioasicir, ioasicimr; 192 int ifound; 193 194 #ifdef DIAGNOSTIC 195 int s; 196 if (vec != 0x800) 197 panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec); 198 s = splhigh(); 199 if (s != ALPHA_PSL_IPL_IO) 200 panic("INVALID ASSUMPTION: IPL %d, not %d", s, 201 ALPHA_PSL_IPL_IO); 202 splx(s); 203 #endif 204 205 do { 206 tc_syncbus(); 207 208 /* find out what interrupts/errors occurred */ 209 tcir = *(volatile u_int32_t *)TC_3000_300_IR; 210 ioasicir = *(volatile u_int32_t *) 211 IOASIC_REG_INTR(DEC_3000_300_IOASIC_ADDR); 212 ioasicimr = *(volatile u_int32_t *) 213 IOASIC_REG_IMSK(DEC_3000_300_IOASIC_ADDR); 214 tc_mb(); 215 216 /* Ignore interrupts that aren't enabled out. */ 217 ioasicir &= ioasicimr; 218 219 /* clear the interrupts/errors we found. */ 220 *(volatile u_int32_t *)TC_3000_300_IR = tcir; 221 /* XXX can't clear TC option slot interrupts here? */ 222 tc_wmb(); 223 224 ifound = 0; 225 226 #ifdef EVCNT_COUNTERS 227 /* No interrupt counting via evcnt counters */ 228 XXX BREAK HERE XXX 229 #else /* !EVCNT_COUNTERS */ 230 #define INCRINTRCNT(slot) intrcnt[INTRCNT_KN16 + slot]++ 231 #endif /* EVCNT_COUNTERS */ 232 233 #define CHECKINTR(slot, flag) \ 234 if (flag) { \ 235 ifound = 1; \ 236 INCRINTRCNT(slot); \ 237 (*tc_3000_300_intr[slot].tci_func) \ 238 (tc_3000_300_intr[slot].tci_arg); \ 239 } 240 /* Do them in order of priority; highest slot # first. */ 241 CHECKINTR(TC_3000_300_DEV_CXTURBO, 242 tcir & TC_3000_300_IR_CXTURBO); 243 CHECKINTR(TC_3000_300_DEV_IOASIC, 244 (tcir & TC_3000_300_IR_IOASIC) && 245 (ioasicir & ~(IOASIC_INTR_300_OPT1|IOASIC_INTR_300_OPT0))); 246 CHECKINTR(TC_3000_300_DEV_TCDS, tcir & TC_3000_300_IR_TCDS); 247 CHECKINTR(TC_3000_300_DEV_OPT1, 248 ioasicir & IOASIC_INTR_300_OPT1); 249 CHECKINTR(TC_3000_300_DEV_OPT0, 250 ioasicir & IOASIC_INTR_300_OPT0); 251 #undef CHECKINTR 252 253 #ifdef DIAGNOSTIC 254 #define PRINTINTR(msg, bits) \ 255 if (tcir & bits) \ 256 printf(msg); 257 PRINTINTR("BCache tag parity error\n", 258 TC_3000_300_IR_BCTAGPARITY); 259 PRINTINTR("TC overrun error\n", TC_3000_300_IR_TCOVERRUN); 260 PRINTINTR("TC I/O timeout\n", TC_3000_300_IR_TCTIMEOUT); 261 PRINTINTR("Bcache parity error\n", 262 TC_3000_300_IR_BCACHEPARITY); 263 PRINTINTR("Memory parity error\n", TC_3000_300_IR_MEMPARITY); 264 #undef PRINTINTR 265 #endif 266 } while (ifound); 267 } 268
Indexes created Thu Oct 02 14:10:14 GMT 2025