tc_3000_300.c revision 1.17
1 /* $NetBSD: tc_3000_300.c,v 1.17 1998/10/23 23:49:31 briggs Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 31 32 __KERNEL_RCSID(0, "$NetBSD: tc_3000_300.c,v 1.17 1998/10/23 23:49:31 briggs Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/device.h> 37 38 #include <machine/autoconf.h> 39 #include <machine/pte.h> 40 #ifndef EVCNT_COUNTERS 41 #include <machine/intrcnt.h> 42 #endif 43 44 #include <dev/tc/tcvar.h> 45 #include <alpha/tc/tc_conf.h> 46 #include <alpha/tc/tc_3000_300.h> 47 #include <alpha/tc/ioasicreg.h> 48 49 #include "sfb.h" 50 51 #if NSFB > 0 52 #include <alpha/tc/sfbvar.h> 53 #endif 54 55 int tc_3000_300_intrnull __P((void *)); 56 57 #define C(x) ((void *)(u_long)x) 58 #define KV(x) (ALPHA_PHYS_TO_K0SEG(x)) 59 60 /* 61 * We have to read and modify the IOASIC registers directly, because 62 * the TC option slot interrupt request and mask bits are stored there, 63 * and the ioasic code isn't initted when we need to frob some interrupt 64 * bits. 65 */ 66 #define DEC_3000_300_IOASIC_ADDR KV(0x1a0000000) 67 68 struct tc_slotdesc tc_3000_300_slots[] = { 69 { KV(0x100000000), C(TC_3000_300_DEV_OPT0), }, /* 0 - opt slot 0 */ 70 { KV(0x120000000), C(TC_3000_300_DEV_OPT1), }, /* 1 - opt slot 1 */ 71 { KV(0x180000000), C(TC_3000_300_DEV_BOGUS), }, /* 2 - TCDS ASIC */ 72 { KV(0x1a0000000), C(TC_3000_300_DEV_BOGUS), }, /* 3 - IOCTL ASIC */ 73 { KV(0x1c0000000), C(TC_3000_300_DEV_CXTURBO), }, /* 4 - CXTurbo */ 74 }; 75 int tc_3000_300_nslots = 76 sizeof(tc_3000_300_slots) / sizeof(tc_3000_300_slots[0]); 77 78 struct tc_builtin tc_3000_300_builtins[] = { 79 { "PMAGB-BA", 4, 0x02000000, C(TC_3000_300_DEV_CXTURBO), }, 80 { "FLAMG-IO", 3, 0x00000000, C(TC_3000_300_DEV_IOASIC), }, 81 { "PMAZ-DS ", 2, 0x00000000, C(TC_3000_300_DEV_TCDS), }, 82 }; 83 int tc_3000_300_nbuiltins = 84 sizeof(tc_3000_300_builtins) / sizeof(tc_3000_300_builtins[0]); 85 86 struct tcintr { 87 int (*tci_func) __P((void *)); 88 void *tci_arg; 89 } tc_3000_300_intr[TC_3000_300_NCOOKIES]; 90 91 void 92 tc_3000_300_intr_setup() 93 { 94 volatile u_int32_t *imskp; 95 u_long i; 96 97 /* 98 * Disable all interrupts that we can (can't disable builtins). 99 */ 100 imskp = (volatile u_int32_t *)IOASIC_REG_IMSK(DEC_3000_300_IOASIC_ADDR); 101 *imskp &= ~(IOASIC_INTR_300_OPT0 | IOASIC_INTR_300_OPT1); 102 103 /* 104 * Set up interrupt handlers. 105 */ 106 for (i = 0; i < TC_3000_300_NCOOKIES; i++) { 107 tc_3000_300_intr[i].tci_func = tc_3000_300_intrnull; 108 tc_3000_300_intr[i].tci_arg = (void *)i; 109 } 110 } 111 112 void 113 tc_3000_300_intr_establish(tcadev, cookie, level, func, arg) 114 struct device *tcadev; 115 void *cookie, *arg; 116 tc_intrlevel_t level; 117 int (*func) __P((void *)); 118 { 119 volatile u_int32_t *imskp; 120 u_long dev = (u_long)cookie; 121 122 #ifdef DIAGNOSTIC 123 /* XXX bounds-check cookie. */ 124 #endif 125 126 if (tc_3000_300_intr[dev].tci_func != tc_3000_300_intrnull) 127 panic("tc_3000_300_intr_establish: cookie %d twice", dev); 128 129 tc_3000_300_intr[dev].tci_func = func; 130 tc_3000_300_intr[dev].tci_arg = arg; 131 132 imskp = (volatile u_int32_t *)IOASIC_REG_IMSK(DEC_3000_300_IOASIC_ADDR); 133 switch (dev) { 134 case TC_3000_300_DEV_OPT0: 135 *imskp |= IOASIC_INTR_300_OPT0; 136 break; 137 case TC_3000_300_DEV_OPT1: 138 *imskp |= IOASIC_INTR_300_OPT1; 139 break; 140 default: 141 /* interrupts for builtins always enabled */ 142 break; 143 } 144 } 145 146 void 147 tc_3000_300_intr_disestablish(tcadev, cookie) 148 struct device *tcadev; 149 void *cookie; 150 { 151 volatile u_int32_t *imskp; 152 u_long dev = (u_long)cookie; 153 154 #ifdef DIAGNOSTIC 155 /* XXX bounds-check cookie. */ 156 #endif 157 158 if (tc_3000_300_intr[dev].tci_func == tc_3000_300_intrnull) 159 panic("tc_3000_300_intr_disestablish: cookie %d bad intr", 160 dev); 161 162 imskp = (volatile u_int32_t *)IOASIC_REG_IMSK(DEC_3000_300_IOASIC_ADDR); 163 switch (dev) { 164 case TC_3000_300_DEV_OPT0: 165 *imskp &= ~IOASIC_INTR_300_OPT0; 166 break; 167 case TC_3000_300_DEV_OPT1: 168 *imskp &= ~IOASIC_INTR_300_OPT1; 169 break; 170 default: 171 /* interrupts for builtins always enabled */ 172 break; 173 } 174 175 tc_3000_300_intr[dev].tci_func = tc_3000_300_intrnull; 176 tc_3000_300_intr[dev].tci_arg = (void *)dev; 177 } 178 179 int 180 tc_3000_300_intrnull(val) 181 void *val; 182 { 183 184 panic("tc_3000_300_intrnull: uncaught TC intr for cookie %ld\n", 185 (u_long)val); 186 } 187 188 void 189 tc_3000_300_iointr(framep, vec) 190 void *framep; 191 unsigned long vec; 192 { 193 u_int32_t tcir, ioasicir, ioasicimr; 194 int ifound; 195 196 #ifdef DIAGNOSTIC 197 int s; 198 if (vec != 0x800) 199 panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec); 200 s = splhigh(); 201 if (s != ALPHA_PSL_IPL_IO) 202 panic("INVALID ASSUMPTION: IPL %d, not %d", s, 203 ALPHA_PSL_IPL_IO); 204 splx(s); 205 #endif 206 207 do { 208 tc_syncbus(); 209 210 /* find out what interrupts/errors occurred */ 211 tcir = *(volatile u_int32_t *)TC_3000_300_IR; 212 ioasicir = *(volatile u_int32_t *) 213 IOASIC_REG_INTR(DEC_3000_300_IOASIC_ADDR); 214 ioasicimr = *(volatile u_int32_t *) 215 IOASIC_REG_IMSK(DEC_3000_300_IOASIC_ADDR); 216 tc_mb(); 217 218 /* Ignore interrupts that aren't enabled out. */ 219 ioasicir &= ioasicimr; 220 221 /* clear the interrupts/errors we found. */ 222 *(volatile u_int32_t *)TC_3000_300_IR = tcir; 223 /* XXX can't clear TC option slot interrupts here? */ 224 tc_wmb(); 225 226 ifound = 0; 227 228 #ifdef EVCNT_COUNTERS 229 /* No interrupt counting via evcnt counters */ 230 XXX BREAK HERE XXX 231 #else /* !EVCNT_COUNTERS */ 232 #define INCRINTRCNT(slot) intrcnt[INTRCNT_KN16 + slot]++ 233 #endif /* EVCNT_COUNTERS */ 234 235 #define CHECKINTR(slot, flag) \ 236 if (flag) { \ 237 ifound = 1; \ 238 INCRINTRCNT(slot); \ 239 (*tc_3000_300_intr[slot].tci_func) \ 240 (tc_3000_300_intr[slot].tci_arg); \ 241 } 242 /* Do them in order of priority; highest slot # first. */ 243 CHECKINTR(TC_3000_300_DEV_CXTURBO, 244 tcir & TC_3000_300_IR_CXTURBO); 245 CHECKINTR(TC_3000_300_DEV_IOASIC, 246 (tcir & TC_3000_300_IR_IOASIC) && 247 (ioasicir & ~(IOASIC_INTR_300_OPT1|IOASIC_INTR_300_OPT0))); 248 CHECKINTR(TC_3000_300_DEV_TCDS, tcir & TC_3000_300_IR_TCDS); 249 CHECKINTR(TC_3000_300_DEV_OPT1, 250 ioasicir & IOASIC_INTR_300_OPT1); 251 CHECKINTR(TC_3000_300_DEV_OPT0, 252 ioasicir & IOASIC_INTR_300_OPT0); 253 #undef CHECKINTR 254 255 #ifdef DIAGNOSTIC 256 #define PRINTINTR(msg, bits) \ 257 if (tcir & bits) \ 258 printf(msg); 259 PRINTINTR("BCache tag parity error\n", 260 TC_3000_300_IR_BCTAGPARITY); 261 PRINTINTR("TC overrun error\n", TC_3000_300_IR_TCOVERRUN); 262 PRINTINTR("TC I/O timeout\n", TC_3000_300_IR_TCTIMEOUT); 263 PRINTINTR("Bcache parity error\n", 264 TC_3000_300_IR_BCACHEPARITY); 265 PRINTINTR("Memory parity error\n", TC_3000_300_IR_MEMPARITY); 266 #undef PRINTINTR 267 #endif 268 } while (ifound); 269 } 270 271 /* 272 * tc_3000_300_fb_cnattach -- 273 * Attempt to map the CTB output device to a slot and attach the 274 * framebuffer as the output side of the console. 275 */ 276 int 277 tc_3000_300_fb_cnattach(turbo_slot) 278 u_int64_t turbo_slot; 279 { 280 u_int32_t output_slot; 281 282 output_slot = turbo_slot & 0xffffffff; 283 284 if (output_slot >= tc_3000_300_nslots) { 285 return 0; 286 } 287 288 if (output_slot == 0) { 289 #if NSFB > 0 290 sfb_cnattach(KV(0x1c0000000) + 0x02000000); 291 return 1; 292 #else 293 return 0; 294 #endif 295 } 296 297 return tc_fb_cnattach(tc_3000_300_slots[output_slot-1].tcs_addr); 298 } 299
Indexes created Thu Oct 02 14:10:14 GMT 2025