tc_3000_300.c revision 1.23
1 /* $NetBSD: tc_3000_300.c,v 1.23 2000/03/26 10:32:52 nisimura Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 31 32 __KERNEL_RCSID(0, "$NetBSD: tc_3000_300.c,v 1.23 2000/03/26 10:32:52 nisimura Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/device.h> 37 38 #include <machine/autoconf.h> 39 #include <machine/pte.h> 40 #ifndef EVCNT_COUNTERS 41 #include <machine/intrcnt.h> 42 #endif 43 44 #include <dev/tc/tcvar.h> 45 #include <dev/tc/ioasicreg.h> 46 #include <alpha/tc/tc_conf.h> 47 #include <alpha/tc/tc_3000_300.h> 48 49 #include "wsdisplay.h" 50 #include "sfb.h" 51 52 #if NSFB > 0 53 extern int sfb_cnattach __P((tc_addr_t)); 54 #endif 55 56 int tc_3000_300_intrnull __P((void *)); 57 58 #define C(x) ((void *)(u_long)x) 59 #define KV(x) (ALPHA_PHYS_TO_K0SEG(x)) 60 61 /* 62 * We have to read and modify the IOASIC registers directly, because 63 * the TC option slot interrupt request and mask bits are stored there, 64 * and the ioasic code isn't initted when we need to frob some interrupt 65 * bits. 66 */ 67 #define DEC_3000_300_IOASIC_ADDR KV(0x1a0000000) 68 69 struct tc_slotdesc tc_3000_300_slots[] = { 70 { KV(0x100000000), C(TC_3000_300_DEV_OPT0), }, /* 0 - opt slot 0 */ 71 { KV(0x120000000), C(TC_3000_300_DEV_OPT1), }, /* 1 - opt slot 1 */ 72 { KV(0x140000000), C(TC_3000_300_DEV_BOGUS), }, /* 2 - unused */ 73 { KV(0x160000000), C(TC_3000_300_DEV_BOGUS), }, /* 3 - unused */ 74 { KV(0x180000000), C(TC_3000_300_DEV_BOGUS), }, /* 4 - TCDS ASIC */ 75 { KV(0x1a0000000), C(TC_3000_300_DEV_BOGUS), }, /* 5 - IOCTL ASIC */ 76 { KV(0x1c0000000), C(TC_3000_300_DEV_BOGUS), }, /* 6 - CXTurbo */ 77 }; 78 int tc_3000_300_nslots = 79 sizeof(tc_3000_300_slots) / sizeof(tc_3000_300_slots[0]); 80 81 struct tc_builtin tc_3000_300_builtins[] = { 82 { "PMAGB-BA", 6, 0x02000000, C(TC_3000_300_DEV_CXTURBO), }, 83 { "FLAMG-IO", 5, 0x00000000, C(TC_3000_300_DEV_IOASIC), }, 84 { "PMAZ-DS ", 4, 0x00000000, C(TC_3000_300_DEV_TCDS), }, 85 }; 86 int tc_3000_300_nbuiltins = 87 sizeof(tc_3000_300_builtins) / sizeof(tc_3000_300_builtins[0]); 88 89 struct tcintr { 90 int (*tci_func) __P((void *)); 91 void *tci_arg; 92 } tc_3000_300_intr[TC_3000_300_NCOOKIES]; 93 94 void 95 tc_3000_300_intr_setup() 96 { 97 volatile u_int32_t *imskp; 98 u_long i; 99 100 /* 101 * Disable all interrupts that we can (can't disable builtins). 102 */ 103 imskp = (volatile u_int32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 104 *imskp &= ~(IOASIC_INTR_300_OPT0 | IOASIC_INTR_300_OPT1); 105 106 /* 107 * Set up interrupt handlers. 108 */ 109 for (i = 0; i < TC_3000_300_NCOOKIES; i++) { 110 tc_3000_300_intr[i].tci_func = tc_3000_300_intrnull; 111 tc_3000_300_intr[i].tci_arg = (void *)i; 112 } 113 } 114 115 void 116 tc_3000_300_intr_establish(tcadev, cookie, level, func, arg) 117 struct device *tcadev; 118 void *cookie, *arg; 119 tc_intrlevel_t level; 120 int (*func) __P((void *)); 121 { 122 volatile u_int32_t *imskp; 123 u_long dev = (u_long)cookie; 124 125 #ifdef DIAGNOSTIC 126 /* XXX bounds-check cookie. */ 127 #endif 128 129 if (tc_3000_300_intr[dev].tci_func != tc_3000_300_intrnull) 130 panic("tc_3000_300_intr_establish: cookie %lu twice", dev); 131 132 tc_3000_300_intr[dev].tci_func = func; 133 tc_3000_300_intr[dev].tci_arg = arg; 134 135 imskp = (volatile u_int32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 136 switch (dev) { 137 case TC_3000_300_DEV_OPT0: 138 *imskp |= IOASIC_INTR_300_OPT0; 139 break; 140 case TC_3000_300_DEV_OPT1: 141 *imskp |= IOASIC_INTR_300_OPT1; 142 break; 143 default: 144 /* interrupts for builtins always enabled */ 145 break; 146 } 147 } 148 149 void 150 tc_3000_300_intr_disestablish(tcadev, cookie) 151 struct device *tcadev; 152 void *cookie; 153 { 154 volatile u_int32_t *imskp; 155 u_long dev = (u_long)cookie; 156 157 #ifdef DIAGNOSTIC 158 /* XXX bounds-check cookie. */ 159 #endif 160 161 if (tc_3000_300_intr[dev].tci_func == tc_3000_300_intrnull) 162 panic("tc_3000_300_intr_disestablish: cookie %lu bad intr", 163 dev); 164 165 imskp = (volatile u_int32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 166 switch (dev) { 167 case TC_3000_300_DEV_OPT0: 168 *imskp &= ~IOASIC_INTR_300_OPT0; 169 break; 170 case TC_3000_300_DEV_OPT1: 171 *imskp &= ~IOASIC_INTR_300_OPT1; 172 break; 173 default: 174 /* interrupts for builtins always enabled */ 175 break; 176 } 177 178 tc_3000_300_intr[dev].tci_func = tc_3000_300_intrnull; 179 tc_3000_300_intr[dev].tci_arg = (void *)dev; 180 } 181 182 int 183 tc_3000_300_intrnull(val) 184 void *val; 185 { 186 187 panic("tc_3000_300_intrnull: uncaught TC intr for cookie %ld\n", 188 (u_long)val); 189 } 190 191 void 192 tc_3000_300_iointr(framep, vec) 193 void *framep; 194 unsigned long vec; 195 { 196 u_int32_t tcir, ioasicir, ioasicimr; 197 int ifound; 198 199 #ifdef DIAGNOSTIC 200 int s; 201 if (vec != 0x800) 202 panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec); 203 s = splhigh(); 204 if (s != ALPHA_PSL_IPL_IO) 205 panic("INVALID ASSUMPTION: IPL %d, not %d", s, 206 ALPHA_PSL_IPL_IO); 207 splx(s); 208 #endif 209 210 do { 211 tc_syncbus(); 212 213 /* find out what interrupts/errors occurred */ 214 tcir = *(volatile u_int32_t *)TC_3000_300_IR; 215 ioasicir = *(volatile u_int32_t *) 216 (DEC_3000_300_IOASIC_ADDR + IOASIC_INTR); 217 ioasicimr = *(volatile u_int32_t *) 218 (DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 219 tc_mb(); 220 221 /* Ignore interrupts that aren't enabled out. */ 222 ioasicir &= ioasicimr; 223 224 /* clear the interrupts/errors we found. */ 225 *(volatile u_int32_t *)TC_3000_300_IR = tcir; 226 /* XXX can't clear TC option slot interrupts here? */ 227 tc_wmb(); 228 229 ifound = 0; 230 231 #ifdef EVCNT_COUNTERS 232 /* No interrupt counting via evcnt counters */ 233 XXX BREAK HERE XXX 234 #else /* !EVCNT_COUNTERS */ 235 #define INCRINTRCNT(slot) intrcnt[INTRCNT_KN16 + slot]++ 236 #endif /* EVCNT_COUNTERS */ 237 238 #define CHECKINTR(slot, flag) \ 239 if (flag) { \ 240 ifound = 1; \ 241 INCRINTRCNT(slot); \ 242 (*tc_3000_300_intr[slot].tci_func) \ 243 (tc_3000_300_intr[slot].tci_arg); \ 244 } 245 /* Do them in order of priority; highest slot # first. */ 246 CHECKINTR(TC_3000_300_DEV_CXTURBO, 247 tcir & TC_3000_300_IR_CXTURBO); 248 CHECKINTR(TC_3000_300_DEV_IOASIC, 249 (tcir & TC_3000_300_IR_IOASIC) && 250 (ioasicir & ~(IOASIC_INTR_300_OPT1|IOASIC_INTR_300_OPT0))); 251 CHECKINTR(TC_3000_300_DEV_TCDS, tcir & TC_3000_300_IR_TCDS); 252 CHECKINTR(TC_3000_300_DEV_OPT1, 253 ioasicir & IOASIC_INTR_300_OPT1); 254 CHECKINTR(TC_3000_300_DEV_OPT0, 255 ioasicir & IOASIC_INTR_300_OPT0); 256 #undef CHECKINTR 257 258 #ifdef DIAGNOSTIC 259 #define PRINTINTR(msg, bits) \ 260 if (tcir & bits) \ 261 printf(msg); 262 PRINTINTR("BCache tag parity error\n", 263 TC_3000_300_IR_BCTAGPARITY); 264 PRINTINTR("TC overrun error\n", TC_3000_300_IR_TCOVERRUN); 265 PRINTINTR("TC I/O timeout\n", TC_3000_300_IR_TCTIMEOUT); 266 PRINTINTR("Bcache parity error\n", 267 TC_3000_300_IR_BCACHEPARITY); 268 PRINTINTR("Memory parity error\n", TC_3000_300_IR_MEMPARITY); 269 #undef PRINTINTR 270 #endif 271 } while (ifound); 272 } 273 274 #if NWSDISPLAY > 0 275 /* 276 * tc_3000_300_fb_cnattach -- 277 * Attempt to map the CTB output device to a slot and attach the 278 * framebuffer as the output side of the console. 279 */ 280 int 281 tc_3000_300_fb_cnattach(turbo_slot) 282 u_int64_t turbo_slot; 283 { 284 u_int32_t output_slot; 285 286 output_slot = turbo_slot & 0xffffffff; 287 288 if (output_slot >= tc_3000_300_nslots) { 289 return EINVAL; 290 } 291 292 if (output_slot == 0) { 293 #if NSFB > 0 294 sfb_cnattach(KV(0x1c0000000) + 0x02000000); 295 return 0; 296 #else 297 return ENXIO; 298 #endif 299 } 300 301 return tc_fb_cnattach(tc_3000_300_slots[output_slot-1].tcs_addr); 302 } 303 #endif /* NWSDISPLAY */ 304
Indexes created Thu Oct 02 14:10:14 GMT 2025