tc_3000_300.c revision 1.27
1 /* $NetBSD: tc_3000_300.c,v 1.27 2002/09/27 15:35:39 provos Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 31 32 __KERNEL_RCSID(0, "$NetBSD: tc_3000_300.c,v 1.27 2002/09/27 15:35:39 provos Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/device.h> 37 #include <sys/malloc.h> 38 39 #include <machine/autoconf.h> 40 #include <machine/pte.h> 41 42 #include <dev/tc/tcvar.h> 43 #include <dev/tc/ioasicreg.h> 44 #include <alpha/tc/tc_conf.h> 45 #include <alpha/tc/tc_3000_300.h> 46 47 #include "wsdisplay.h" 48 #include "sfb.h" 49 50 #if NSFB > 0 51 extern int sfb_cnattach __P((tc_addr_t)); 52 #endif 53 54 int tc_3000_300_intrnull __P((void *)); 55 56 #define C(x) ((void *)(u_long)x) 57 #define KV(x) (ALPHA_PHYS_TO_K0SEG(x)) 58 59 /* 60 * We have to read and modify the IOASIC registers directly, because 61 * the TC option slot interrupt request and mask bits are stored there, 62 * and the ioasic code isn't initted when we need to frob some interrupt 63 * bits. 64 */ 65 #define DEC_3000_300_IOASIC_ADDR KV(0x1a0000000) 66 67 struct tc_slotdesc tc_3000_300_slots[] = { 68 { KV(0x100000000), C(TC_3000_300_DEV_OPT0), }, /* 0 - opt slot 0 */ 69 { KV(0x120000000), C(TC_3000_300_DEV_OPT1), }, /* 1 - opt slot 1 */ 70 { KV(0x140000000), C(TC_3000_300_DEV_BOGUS), }, /* 2 - unused */ 71 { KV(0x160000000), C(TC_3000_300_DEV_BOGUS), }, /* 3 - unused */ 72 { KV(0x180000000), C(TC_3000_300_DEV_BOGUS), }, /* 4 - TCDS ASIC */ 73 { KV(0x1a0000000), C(TC_3000_300_DEV_BOGUS), }, /* 5 - IOCTL ASIC */ 74 { KV(0x1c0000000), C(TC_3000_300_DEV_BOGUS), }, /* 6 - CXTurbo */ 75 }; 76 int tc_3000_300_nslots = 77 sizeof(tc_3000_300_slots) / sizeof(tc_3000_300_slots[0]); 78 79 struct tc_builtin tc_3000_300_builtins[] = { 80 { "PMAGB-BA", 6, 0x02000000, C(TC_3000_300_DEV_CXTURBO), }, 81 { "FLAMG-IO", 5, 0x00000000, C(TC_3000_300_DEV_IOASIC), }, 82 { "PMAZ-DS ", 4, 0x00000000, C(TC_3000_300_DEV_TCDS), }, 83 }; 84 int tc_3000_300_nbuiltins = 85 sizeof(tc_3000_300_builtins) / sizeof(tc_3000_300_builtins[0]); 86 87 struct tcintr { 88 int (*tci_func) __P((void *)); 89 void *tci_arg; 90 struct evcnt tci_evcnt; 91 } tc_3000_300_intr[TC_3000_300_NCOOKIES]; 92 93 void 94 tc_3000_300_intr_setup() 95 { 96 volatile u_int32_t *imskp; 97 char *cp; 98 u_long i; 99 100 /* 101 * Disable all interrupts that we can (can't disable builtins). 102 */ 103 imskp = (volatile u_int32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 104 *imskp &= ~(IOASIC_INTR_300_OPT0 | IOASIC_INTR_300_OPT1); 105 106 /* 107 * Set up interrupt handlers. 108 */ 109 for (i = 0; i < TC_3000_300_NCOOKIES; i++) { 110 tc_3000_300_intr[i].tci_func = tc_3000_300_intrnull; 111 tc_3000_300_intr[i].tci_arg = (void *)i; 112 113 cp = malloc(12, M_DEVBUF, M_NOWAIT); 114 if (cp == NULL) 115 panic("tc_3000_300_intr_setup"); 116 sprintf(cp, "slot %lu", i); 117 evcnt_attach_dynamic(&tc_3000_300_intr[i].tci_evcnt, 118 EVCNT_TYPE_INTR, NULL, "tc", cp); 119 } 120 } 121 122 const struct evcnt * 123 tc_3000_300_intr_evcnt(tcadev, cookie) 124 struct device *tcadev; 125 void *cookie; 126 { 127 u_long dev = (u_long)cookie; 128 129 #ifdef DIAGNOSTIC 130 /* XXX bounds-check cookie. */ 131 #endif 132 133 return (&tc_3000_300_intr[dev].tci_evcnt); 134 } 135 136 void 137 tc_3000_300_intr_establish(tcadev, cookie, level, func, arg) 138 struct device *tcadev; 139 void *cookie, *arg; 140 tc_intrlevel_t level; 141 int (*func) __P((void *)); 142 { 143 volatile u_int32_t *imskp; 144 u_long dev = (u_long)cookie; 145 146 #ifdef DIAGNOSTIC 147 /* XXX bounds-check cookie. */ 148 #endif 149 150 if (tc_3000_300_intr[dev].tci_func != tc_3000_300_intrnull) 151 panic("tc_3000_300_intr_establish: cookie %lu twice", dev); 152 153 tc_3000_300_intr[dev].tci_func = func; 154 tc_3000_300_intr[dev].tci_arg = arg; 155 156 imskp = (volatile u_int32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 157 switch (dev) { 158 case TC_3000_300_DEV_OPT0: 159 *imskp |= IOASIC_INTR_300_OPT0; 160 break; 161 case TC_3000_300_DEV_OPT1: 162 *imskp |= IOASIC_INTR_300_OPT1; 163 break; 164 default: 165 /* interrupts for builtins always enabled */ 166 break; 167 } 168 } 169 170 void 171 tc_3000_300_intr_disestablish(tcadev, cookie) 172 struct device *tcadev; 173 void *cookie; 174 { 175 volatile u_int32_t *imskp; 176 u_long dev = (u_long)cookie; 177 178 #ifdef DIAGNOSTIC 179 /* XXX bounds-check cookie. */ 180 #endif 181 182 if (tc_3000_300_intr[dev].tci_func == tc_3000_300_intrnull) 183 panic("tc_3000_300_intr_disestablish: cookie %lu bad intr", 184 dev); 185 186 imskp = (volatile u_int32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 187 switch (dev) { 188 case TC_3000_300_DEV_OPT0: 189 *imskp &= ~IOASIC_INTR_300_OPT0; 190 break; 191 case TC_3000_300_DEV_OPT1: 192 *imskp &= ~IOASIC_INTR_300_OPT1; 193 break; 194 default: 195 /* interrupts for builtins always enabled */ 196 break; 197 } 198 199 tc_3000_300_intr[dev].tci_func = tc_3000_300_intrnull; 200 tc_3000_300_intr[dev].tci_arg = (void *)dev; 201 } 202 203 int 204 tc_3000_300_intrnull(val) 205 void *val; 206 { 207 208 panic("tc_3000_300_intrnull: uncaught TC intr for cookie %ld", 209 (u_long)val); 210 } 211 212 void 213 tc_3000_300_iointr(arg, vec) 214 void *arg; 215 unsigned long vec; 216 { 217 u_int32_t tcir, ioasicir, ioasicimr; 218 int ifound; 219 220 #ifdef DIAGNOSTIC 221 int s; 222 if (vec != 0x800) 223 panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec); 224 s = splhigh(); 225 if (s != ALPHA_PSL_IPL_IO) 226 panic("INVALID ASSUMPTION: IPL %d, not %d", s, 227 ALPHA_PSL_IPL_IO); 228 splx(s); 229 #endif 230 231 do { 232 tc_syncbus(); 233 234 /* find out what interrupts/errors occurred */ 235 tcir = *(volatile u_int32_t *)TC_3000_300_IR; 236 ioasicir = *(volatile u_int32_t *) 237 (DEC_3000_300_IOASIC_ADDR + IOASIC_INTR); 238 ioasicimr = *(volatile u_int32_t *) 239 (DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 240 tc_mb(); 241 242 /* Ignore interrupts that aren't enabled out. */ 243 ioasicir &= ioasicimr; 244 245 /* clear the interrupts/errors we found. */ 246 *(volatile u_int32_t *)TC_3000_300_IR = tcir; 247 /* XXX can't clear TC option slot interrupts here? */ 248 tc_wmb(); 249 250 ifound = 0; 251 252 #define INCRINTRCNT(slot) tc_3000_300_intr[slot].tci_evcnt.ev_count++ 253 254 #define CHECKINTR(slot, flag) \ 255 if (flag) { \ 256 ifound = 1; \ 257 INCRINTRCNT(slot); \ 258 (*tc_3000_300_intr[slot].tci_func) \ 259 (tc_3000_300_intr[slot].tci_arg); \ 260 } 261 /* Do them in order of priority; highest slot # first. */ 262 CHECKINTR(TC_3000_300_DEV_CXTURBO, 263 tcir & TC_3000_300_IR_CXTURBO); 264 CHECKINTR(TC_3000_300_DEV_IOASIC, 265 (tcir & TC_3000_300_IR_IOASIC) && 266 (ioasicir & ~(IOASIC_INTR_300_OPT1|IOASIC_INTR_300_OPT0))); 267 CHECKINTR(TC_3000_300_DEV_TCDS, tcir & TC_3000_300_IR_TCDS); 268 CHECKINTR(TC_3000_300_DEV_OPT1, 269 ioasicir & IOASIC_INTR_300_OPT1); 270 CHECKINTR(TC_3000_300_DEV_OPT0, 271 ioasicir & IOASIC_INTR_300_OPT0); 272 #undef CHECKINTR 273 274 #ifdef DIAGNOSTIC 275 #define PRINTINTR(msg, bits) \ 276 if (tcir & bits) \ 277 printf(msg); 278 PRINTINTR("BCache tag parity error\n", 279 TC_3000_300_IR_BCTAGPARITY); 280 PRINTINTR("TC overrun error\n", TC_3000_300_IR_TCOVERRUN); 281 PRINTINTR("TC I/O timeout\n", TC_3000_300_IR_TCTIMEOUT); 282 PRINTINTR("Bcache parity error\n", 283 TC_3000_300_IR_BCACHEPARITY); 284 PRINTINTR("Memory parity error\n", TC_3000_300_IR_MEMPARITY); 285 #undef PRINTINTR 286 #endif 287 } while (ifound); 288 } 289 290 #if NWSDISPLAY > 0 291 /* 292 * tc_3000_300_fb_cnattach -- 293 * Attempt to map the CTB output device to a slot and attach the 294 * framebuffer as the output side of the console. 295 */ 296 int 297 tc_3000_300_fb_cnattach(turbo_slot) 298 u_int64_t turbo_slot; 299 { 300 u_int32_t output_slot; 301 302 output_slot = turbo_slot & 0xffffffff; 303 304 if (output_slot >= tc_3000_300_nslots) { 305 return EINVAL; 306 } 307 308 if (output_slot == 0) { 309 #if NSFB > 0 310 sfb_cnattach(KV(0x1c0000000) + 0x02000000); 311 return 0; 312 #else 313 return ENXIO; 314 #endif 315 } 316 317 return tc_fb_cnattach(tc_3000_300_slots[output_slot-1].tcs_addr); 318 } 319 #endif /* NWSDISPLAY */ 320
Indexes created Thu Oct 02 14:10:14 GMT 2025