tc_3000_300.c revision 1.31.2.2
1 /* $NetBSD: tc_3000_300.c,v 1.31.2.2 2014/05/22 11:39:27 yamt Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 31 32 __KERNEL_RCSID(0, "$NetBSD: tc_3000_300.c,v 1.31.2.2 2014/05/22 11:39:27 yamt Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/device.h> 37 #include <sys/malloc.h> 38 39 #include <machine/autoconf.h> 40 #include <machine/pte.h> 41 42 #include <dev/tc/tcvar.h> 43 #include <dev/tc/ioasicreg.h> 44 #include <alpha/tc/tc_conf.h> 45 #include <alpha/tc/tc_3000_300.h> 46 47 #include "wsdisplay.h" 48 #include "sfb.h" 49 50 #if NSFB > 0 51 extern int sfb_cnattach(tc_addr_t); 52 #endif 53 54 int tc_3000_300_intrnull(void *); 55 56 #define C(x) ((void *)(u_long)x) 57 #define KV(x) (ALPHA_PHYS_TO_K0SEG(x)) 58 59 /* 60 * We have to read and modify the IOASIC registers directly, because 61 * the TC option slot interrupt request and mask bits are stored there, 62 * and the ioasic code isn't initted when we need to frob some interrupt 63 * bits. 64 */ 65 #define DEC_3000_300_IOASIC_ADDR KV(0x1a0000000) 66 67 struct tc_slotdesc tc_3000_300_slots[] = { 68 { KV(0x100000000), C(TC_3000_300_DEV_OPT0), }, /* 0 - opt slot 0 */ 69 { KV(0x120000000), C(TC_3000_300_DEV_OPT1), }, /* 1 - opt slot 1 */ 70 { KV(0x140000000), C(TC_3000_300_DEV_BOGUS), }, /* 2 - unused */ 71 { KV(0x160000000), C(TC_3000_300_DEV_BOGUS), }, /* 3 - unused */ 72 { KV(0x180000000), C(TC_3000_300_DEV_BOGUS), }, /* 4 - TCDS ASIC */ 73 { KV(0x1a0000000), C(TC_3000_300_DEV_BOGUS), }, /* 5 - IOCTL ASIC */ 74 { KV(0x1c0000000), C(TC_3000_300_DEV_BOGUS), }, /* 6 - CXTurbo */ 75 }; 76 int tc_3000_300_nslots = 77 sizeof(tc_3000_300_slots) / sizeof(tc_3000_300_slots[0]); 78 79 struct tc_builtin tc_3000_300_builtins[] = { 80 { "PMAGB-BA", 6, 0x02000000, C(TC_3000_300_DEV_CXTURBO), }, 81 { "FLAMG-IO", 5, 0x00000000, C(TC_3000_300_DEV_IOASIC), }, 82 { "PMAZ-DS ", 4, 0x00000000, C(TC_3000_300_DEV_TCDS), }, 83 }; 84 int tc_3000_300_nbuiltins = 85 sizeof(tc_3000_300_builtins) / sizeof(tc_3000_300_builtins[0]); 86 87 struct tcintr { 88 int (*tci_func)(void *); 89 void *tci_arg; 90 struct evcnt tci_evcnt; 91 } tc_3000_300_intr[TC_3000_300_NCOOKIES]; 92 93 void 94 tc_3000_300_intr_setup(void) 95 { 96 volatile uint32_t *imskp; 97 char *cp; 98 u_long i; 99 100 /* 101 * Disable all interrupts that we can (can't disable builtins). 102 */ 103 imskp = (volatile uint32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 104 *imskp &= ~(IOASIC_INTR_300_OPT0 | IOASIC_INTR_300_OPT1); 105 106 /* 107 * Set up interrupt handlers. 108 */ 109 for (i = 0; i < TC_3000_300_NCOOKIES; i++) { 110 static const size_t len = 12; 111 tc_3000_300_intr[i].tci_func = tc_3000_300_intrnull; 112 tc_3000_300_intr[i].tci_arg = (void *)i; 113 114 cp = malloc(len, M_DEVBUF, M_NOWAIT); 115 if (cp == NULL) 116 panic("tc_3000_300_intr_setup"); 117 snprintf(cp, len, "slot %lu", i); 118 evcnt_attach_dynamic(&tc_3000_300_intr[i].tci_evcnt, 119 EVCNT_TYPE_INTR, NULL, "tc", cp); 120 } 121 } 122 123 const struct evcnt * 124 tc_3000_300_intr_evcnt(device_t tcadev, void *cookie) 125 { 126 u_long dev = (u_long)cookie; 127 128 #ifdef DIAGNOSTIC 129 /* XXX bounds-check cookie. */ 130 #endif 131 132 return (&tc_3000_300_intr[dev].tci_evcnt); 133 } 134 135 void 136 tc_3000_300_intr_establish(device_t tcadev, void *cookie, tc_intrlevel_t level, int (*func)(void *), void *arg) 137 { 138 volatile uint32_t *imskp; 139 u_long dev = (u_long)cookie; 140 141 #ifdef DIAGNOSTIC 142 /* XXX bounds-check cookie. */ 143 #endif 144 145 if (tc_3000_300_intr[dev].tci_func != tc_3000_300_intrnull) 146 panic("tc_3000_300_intr_establish: cookie %lu twice", dev); 147 148 tc_3000_300_intr[dev].tci_func = func; 149 tc_3000_300_intr[dev].tci_arg = arg; 150 151 imskp = (volatile uint32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 152 switch (dev) { 153 case TC_3000_300_DEV_OPT0: 154 *imskp |= IOASIC_INTR_300_OPT0; 155 break; 156 case TC_3000_300_DEV_OPT1: 157 *imskp |= IOASIC_INTR_300_OPT1; 158 break; 159 default: 160 /* interrupts for builtins always enabled */ 161 break; 162 } 163 } 164 165 void 166 tc_3000_300_intr_disestablish(device_t tcadev, void *cookie) 167 { 168 volatile uint32_t *imskp; 169 u_long dev = (u_long)cookie; 170 171 #ifdef DIAGNOSTIC 172 /* XXX bounds-check cookie. */ 173 #endif 174 175 if (tc_3000_300_intr[dev].tci_func == tc_3000_300_intrnull) 176 panic("tc_3000_300_intr_disestablish: cookie %lu bad intr", 177 dev); 178 179 imskp = (volatile uint32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 180 switch (dev) { 181 case TC_3000_300_DEV_OPT0: 182 *imskp &= ~IOASIC_INTR_300_OPT0; 183 break; 184 case TC_3000_300_DEV_OPT1: 185 *imskp &= ~IOASIC_INTR_300_OPT1; 186 break; 187 default: 188 /* interrupts for builtins always enabled */ 189 break; 190 } 191 192 tc_3000_300_intr[dev].tci_func = tc_3000_300_intrnull; 193 tc_3000_300_intr[dev].tci_arg = (void *)dev; 194 } 195 196 int 197 tc_3000_300_intrnull(void *val) 198 { 199 200 panic("tc_3000_300_intrnull: uncaught TC intr for cookie %ld", 201 (u_long)val); 202 } 203 204 void 205 tc_3000_300_iointr(void *arg, unsigned long vec) 206 { 207 uint32_t tcir, ioasicir, ioasicimr; 208 int ifound; 209 210 #ifdef DIAGNOSTIC 211 int s; 212 if (vec != 0x800) 213 panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec); 214 s = splhigh(); 215 if (s != ALPHA_PSL_IPL_IO) 216 panic("INVALID ASSUMPTION: IPL %d, not %d", s, 217 ALPHA_PSL_IPL_IO); 218 splx(s); 219 #endif 220 221 do { 222 tc_syncbus(); 223 224 /* find out what interrupts/errors occurred */ 225 tcir = *(volatile uint32_t *)TC_3000_300_IR; 226 ioasicir = *(volatile uint32_t *) 227 (DEC_3000_300_IOASIC_ADDR + IOASIC_INTR); 228 ioasicimr = *(volatile uint32_t *) 229 (DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 230 tc_mb(); 231 232 /* Ignore interrupts that aren't enabled out. */ 233 ioasicir &= ioasicimr; 234 235 /* clear the interrupts/errors we found. */ 236 *(volatile uint32_t *)TC_3000_300_IR = tcir; 237 /* XXX can't clear TC option slot interrupts here? */ 238 tc_wmb(); 239 240 ifound = 0; 241 242 #define INCRINTRCNT(slot) tc_3000_300_intr[slot].tci_evcnt.ev_count++ 243 244 #define CHECKINTR(slot, flag) \ 245 if (flag) { \ 246 ifound = 1; \ 247 INCRINTRCNT(slot); \ 248 (*tc_3000_300_intr[slot].tci_func) \ 249 (tc_3000_300_intr[slot].tci_arg); \ 250 } 251 /* Do them in order of priority; highest slot # first. */ 252 CHECKINTR(TC_3000_300_DEV_CXTURBO, 253 tcir & TC_3000_300_IR_CXTURBO); 254 CHECKINTR(TC_3000_300_DEV_IOASIC, 255 (tcir & TC_3000_300_IR_IOASIC) && 256 (ioasicir & ~(IOASIC_INTR_300_OPT1|IOASIC_INTR_300_OPT0))); 257 CHECKINTR(TC_3000_300_DEV_TCDS, tcir & TC_3000_300_IR_TCDS); 258 CHECKINTR(TC_3000_300_DEV_OPT1, 259 ioasicir & IOASIC_INTR_300_OPT1); 260 CHECKINTR(TC_3000_300_DEV_OPT0, 261 ioasicir & IOASIC_INTR_300_OPT0); 262 #undef CHECKINTR 263 264 #ifdef DIAGNOSTIC 265 #define PRINTINTR(msg, bits) \ 266 if (tcir & bits) \ 267 printf(msg); 268 PRINTINTR("BCache tag parity error\n", 269 TC_3000_300_IR_BCTAGPARITY); 270 PRINTINTR("TC overrun error\n", TC_3000_300_IR_TCOVERRUN); 271 PRINTINTR("TC I/O timeout\n", TC_3000_300_IR_TCTIMEOUT); 272 PRINTINTR("Bcache parity error\n", 273 TC_3000_300_IR_BCACHEPARITY); 274 PRINTINTR("Memory parity error\n", TC_3000_300_IR_MEMPARITY); 275 #undef PRINTINTR 276 #endif 277 } while (ifound); 278 } 279 280 #if NWSDISPLAY > 0 281 /* 282 * tc_3000_300_fb_cnattach -- 283 * Attempt to map the CTB output device to a slot and attach the 284 * framebuffer as the output side of the console. 285 */ 286 int 287 tc_3000_300_fb_cnattach(uint64_t turbo_slot) 288 { 289 uint32_t output_slot; 290 291 output_slot = turbo_slot & 0xffffffff; 292 293 if (output_slot >= tc_3000_300_nslots) { 294 return EINVAL; 295 } 296 297 if (output_slot == 0) { 298 #if NSFB > 0 299 sfb_cnattach(KV(0x1c0000000) + 0x02000000); 300 return 0; 301 #else 302 return ENXIO; 303 #endif 304 } 305 306 return tc_fb_cnattach(tc_3000_300_slots[output_slot-1].tcs_addr); 307 } 308 #endif /* NWSDISPLAY */ 309
Indexes created Thu Oct 23 22:10:10 GMT 2025