tc_3000_300.c revision 1.38
1 /* $NetBSD: tc_3000_300.c,v 1.38 2020/11/18 02:04:30 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 31 32 __KERNEL_RCSID(0, "$NetBSD: tc_3000_300.c,v 1.38 2020/11/18 02:04:30 thorpej Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/device.h> 37 #include <sys/kmem.h> 38 #include <sys/cpu.h> 39 40 #include <machine/autoconf.h> 41 #include <machine/pte.h> 42 43 #include <dev/tc/tcvar.h> 44 #include <dev/tc/ioasicreg.h> 45 #include <alpha/tc/tc_conf.h> 46 #include <alpha/tc/tc_3000_300.h> 47 48 #include "wsdisplay.h" 49 #include "sfb.h" 50 51 #if NSFB > 0 52 extern int sfb_cnattach(tc_addr_t); 53 #endif 54 55 int tc_3000_300_intrnull(void *); 56 57 #define C(x) ((void *)(u_long)x) 58 #define KV(x) (ALPHA_PHYS_TO_K0SEG(x)) 59 60 /* 61 * We have to read and modify the IOASIC registers directly, because 62 * the TC option slot interrupt request and mask bits are stored there, 63 * and the ioasic code isn't initted when we need to frob some interrupt 64 * bits. 65 */ 66 #define DEC_3000_300_IOASIC_ADDR KV(0x1a0000000) 67 68 struct tc_slotdesc tc_3000_300_slots[] = { 69 { KV(0x100000000), C(TC_3000_300_DEV_OPT0), }, /* 0 - opt slot 0 */ 70 { KV(0x120000000), C(TC_3000_300_DEV_OPT1), }, /* 1 - opt slot 1 */ 71 { KV(0x140000000), C(TC_3000_300_DEV_BOGUS), }, /* 2 - unused */ 72 { KV(0x160000000), C(TC_3000_300_DEV_BOGUS), }, /* 3 - unused */ 73 { KV(0x180000000), C(TC_3000_300_DEV_BOGUS), }, /* 4 - TCDS ASIC */ 74 { KV(0x1a0000000), C(TC_3000_300_DEV_BOGUS), }, /* 5 - IOCTL ASIC */ 75 { KV(0x1c0000000), C(TC_3000_300_DEV_BOGUS), }, /* 6 - CXTurbo */ 76 }; 77 int tc_3000_300_nslots = 78 sizeof(tc_3000_300_slots) / sizeof(tc_3000_300_slots[0]); 79 80 struct tc_builtin tc_3000_300_builtins[] = { 81 { "PMAGB-BA", 6, 0x02000000, C(TC_3000_300_DEV_CXTURBO), }, 82 { "FLAMG-IO", 5, 0x00000000, C(TC_3000_300_DEV_IOASIC), }, 83 { "PMAZ-DS ", 4, 0x00000000, C(TC_3000_300_DEV_TCDS), }, 84 }; 85 int tc_3000_300_nbuiltins = 86 sizeof(tc_3000_300_builtins) / sizeof(tc_3000_300_builtins[0]); 87 88 struct tcintr { 89 int (*tci_func)(void *); 90 void *tci_arg; 91 struct evcnt tci_evcnt; 92 } tc_3000_300_intr[TC_3000_300_NCOOKIES]; 93 94 void 95 tc_3000_300_intr_setup(void) 96 { 97 volatile uint32_t *imskp; 98 char *cp; 99 u_long i; 100 101 /* 102 * Disable all interrupts that we can (can't disable builtins). 103 */ 104 imskp = (volatile uint32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 105 *imskp &= ~(IOASIC_INTR_300_OPT0 | IOASIC_INTR_300_OPT1); 106 107 /* 108 * Set up interrupt handlers. 109 */ 110 for (i = 0; i < TC_3000_300_NCOOKIES; i++) { 111 tc_3000_300_intr[i].tci_func = tc_3000_300_intrnull; 112 tc_3000_300_intr[i].tci_arg = (void *)i; 113 114 cp = kmem_asprintf("slot %lu", i); 115 evcnt_attach_dynamic(&tc_3000_300_intr[i].tci_evcnt, 116 EVCNT_TYPE_INTR, NULL, "tc", cp); 117 } 118 } 119 120 const struct evcnt * 121 tc_3000_300_intr_evcnt(device_t tcadev, void *cookie) 122 { 123 u_long dev = (u_long)cookie; 124 125 #ifdef DIAGNOSTIC 126 /* XXX bounds-check cookie. */ 127 #endif 128 129 return (&tc_3000_300_intr[dev].tci_evcnt); 130 } 131 132 void 133 tc_3000_300_intr_establish(device_t tcadev, void *cookie, tc_intrlevel_t level, int (*func)(void *), void *arg) 134 { 135 volatile uint32_t *imskp; 136 u_long dev = (u_long)cookie; 137 138 #ifdef DIAGNOSTIC 139 /* XXX bounds-check cookie. */ 140 #endif 141 142 if (tc_3000_300_intr[dev].tci_func != tc_3000_300_intrnull) 143 panic("tc_3000_300_intr_establish: cookie %lu twice", dev); 144 145 const int s = splhigh(); 146 147 /* All TC systems are uniprocessors. */ 148 KASSERT(CPU_IS_PRIMARY(curcpu())); 149 KASSERT(ncpu == 1); 150 curcpu()->ci_nintrhand++; 151 152 tc_3000_300_intr[dev].tci_func = func; 153 tc_3000_300_intr[dev].tci_arg = arg; 154 155 splx(s); 156 157 imskp = (volatile uint32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 158 switch (dev) { 159 case TC_3000_300_DEV_OPT0: 160 *imskp |= IOASIC_INTR_300_OPT0; 161 break; 162 case TC_3000_300_DEV_OPT1: 163 *imskp |= IOASIC_INTR_300_OPT1; 164 break; 165 default: 166 /* interrupts for builtins always enabled */ 167 break; 168 } 169 } 170 171 void 172 tc_3000_300_intr_disestablish(device_t tcadev, void *cookie) 173 { 174 volatile uint32_t *imskp; 175 u_long dev = (u_long)cookie; 176 177 #ifdef DIAGNOSTIC 178 /* XXX bounds-check cookie. */ 179 #endif 180 181 if (tc_3000_300_intr[dev].tci_func == tc_3000_300_intrnull) 182 panic("tc_3000_300_intr_disestablish: cookie %lu bad intr", 183 dev); 184 185 imskp = (volatile uint32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 186 switch (dev) { 187 case TC_3000_300_DEV_OPT0: 188 *imskp &= ~IOASIC_INTR_300_OPT0; 189 break; 190 case TC_3000_300_DEV_OPT1: 191 *imskp &= ~IOASIC_INTR_300_OPT1; 192 break; 193 default: 194 /* interrupts for builtins always enabled */ 195 break; 196 } 197 198 const int s = splhigh(); 199 200 curcpu()->ci_nintrhand--; 201 202 tc_3000_300_intr[dev].tci_func = tc_3000_300_intrnull; 203 tc_3000_300_intr[dev].tci_arg = (void *)dev; 204 205 splx(s); 206 } 207 208 int 209 tc_3000_300_intrnull(void *val) 210 { 211 212 panic("tc_3000_300_intrnull: uncaught TC intr for cookie %ld", 213 (u_long)val); 214 } 215 216 void 217 tc_3000_300_iointr(void *arg, unsigned long vec) 218 { 219 uint32_t tcir, ioasicir, ioasicimr; 220 int ifound; 221 222 KERNEL_LOCK(1, NULL); 223 224 #ifdef DIAGNOSTIC 225 int s; 226 if (vec != 0x800) 227 panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec); 228 s = splhigh(); 229 if (s != ALPHA_PSL_IPL_IO_HI) 230 panic("INVALID ASSUMPTION: IPL %d, not %d", s, 231 ALPHA_PSL_IPL_IO_HI); 232 splx(s); 233 #endif 234 235 do { 236 tc_syncbus(); 237 238 /* find out what interrupts/errors occurred */ 239 tcir = *(volatile uint32_t *)TC_3000_300_IR; 240 ioasicir = *(volatile uint32_t *) 241 (DEC_3000_300_IOASIC_ADDR + IOASIC_INTR); 242 ioasicimr = *(volatile uint32_t *) 243 (DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 244 tc_mb(); 245 246 /* Ignore interrupts that aren't enabled out. */ 247 ioasicir &= ioasicimr; 248 249 /* clear the interrupts/errors we found. */ 250 *(volatile uint32_t *)TC_3000_300_IR = tcir; 251 /* XXX can't clear TC option slot interrupts here? */ 252 tc_wmb(); 253 254 ifound = 0; 255 256 #define INCRINTRCNT(slot) tc_3000_300_intr[slot].tci_evcnt.ev_count++ 257 258 #define CHECKINTR(slot, flag) \ 259 if (flag) { \ 260 ifound = 1; \ 261 INCRINTRCNT(slot); \ 262 (*tc_3000_300_intr[slot].tci_func) \ 263 (tc_3000_300_intr[slot].tci_arg); \ 264 } 265 /* Do them in order of priority; highest slot # first. */ 266 CHECKINTR(TC_3000_300_DEV_CXTURBO, 267 tcir & TC_3000_300_IR_CXTURBO); 268 CHECKINTR(TC_3000_300_DEV_IOASIC, 269 (tcir & TC_3000_300_IR_IOASIC) && 270 (ioasicir & ~(IOASIC_INTR_300_OPT1|IOASIC_INTR_300_OPT0))); 271 CHECKINTR(TC_3000_300_DEV_TCDS, tcir & TC_3000_300_IR_TCDS); 272 CHECKINTR(TC_3000_300_DEV_OPT1, 273 ioasicir & IOASIC_INTR_300_OPT1); 274 CHECKINTR(TC_3000_300_DEV_OPT0, 275 ioasicir & IOASIC_INTR_300_OPT0); 276 #undef CHECKINTR 277 278 #ifdef DIAGNOSTIC 279 #define PRINTINTR(msg, bits) \ 280 if (tcir & bits) \ 281 printf(msg); 282 PRINTINTR("BCache tag parity error\n", 283 TC_3000_300_IR_BCTAGPARITY); 284 PRINTINTR("TC overrun error\n", TC_3000_300_IR_TCOVERRUN); 285 PRINTINTR("TC I/O timeout\n", TC_3000_300_IR_TCTIMEOUT); 286 PRINTINTR("Bcache parity error\n", 287 TC_3000_300_IR_BCACHEPARITY); 288 PRINTINTR("Memory parity error\n", TC_3000_300_IR_MEMPARITY); 289 #undef PRINTINTR 290 #endif 291 } while (ifound); 292 293 KERNEL_UNLOCK_ONE(NULL); 294 } 295 296 #if NWSDISPLAY > 0 297 /* 298 * tc_3000_300_fb_cnattach -- 299 * Attempt to map the CTB output device to a slot and attach the 300 * framebuffer as the output side of the console. 301 */ 302 int 303 tc_3000_300_fb_cnattach(uint64_t turbo_slot) 304 { 305 uint32_t output_slot; 306 307 output_slot = turbo_slot & 0xffffffff; 308 309 if (output_slot >= tc_3000_300_nslots) { 310 return EINVAL; 311 } 312 313 if (output_slot == 0) { 314 #if NSFB > 0 315 sfb_cnattach(KV(0x1c0000000) + 0x02000000); 316 return 0; 317 #else 318 return ENXIO; 319 #endif 320 } 321 322 return tc_fb_cnattach(tc_3000_300_slots[output_slot-1].tcs_addr); 323 } 324 #endif /* NWSDISPLAY */ 325
Indexes created Fri Oct 03 02:09:57 GMT 2025