tc_3000_300.c revision 1.4
1 /* $NetBSD: tc_3000_300.c,v 1.4 1995/12/20 00:43:27 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/param.h> 31 #include <sys/device.h> 32 33 #include <machine/autoconf.h> 34 #include <machine/pte.h> 35 36 #include <dev/tc/tcvar.h> 37 #include <alpha/tc/tc_conf.h> 38 #include <alpha/tc/tc_3000_300.h> 39 40 void tc_3000_300_intr_setup __P((void)); 41 void tc_3000_300_intr_establish __P((struct device *, void *, 42 tc_intrlevel_t, int (*)(void *), void *)); 43 void tc_3000_300_intr_disestablish __P((struct device *, void *)); 44 void tc_3000_300_iointr __P((void *, int)); 45 46 int tc_3000_300_intrnull __P((void *)); 47 48 #define C(x) ((void *)(u_long)x) 49 #define KV(x) (phystok0seg(x)) 50 51 struct tc_slotdesc tc_3000_300_slots[] = { 52 { KV(0x100000000), C(TC_3000_300_DEV_OPT0), }, /* 0 - opt slot 0 */ 53 { KV(0x120000000), C(TC_3000_300_DEV_OPT1), }, /* 1 - opt slot 1 */ 54 { KV(0x180000000), C(TC_3000_300_DEV_BOGUS), }, /* 2 - TCDS ASIC */ 55 { KV(0x1a0000000), C(TC_3000_300_DEV_BOGUS), }, /* 3 - IOCTL ASIC */ 56 { KV(0x1c0000000), C(TC_3000_300_DEV_CXTURBO), }, /* 4 - CXTurbo */ 57 }; 58 int tc_3000_300_nslots = 59 sizeof(tc_3000_300_slots) / sizeof(tc_3000_300_slots[0]); 60 61 struct tc_builtin tc_3000_300_builtins[] = { 62 { "PMAGB-BA", 4, 0x02000000, C(TC_3000_300_DEV_CXTURBO), }, 63 { "FLAMG-IO", 3, 0x00000000, C(TC_3000_300_DEV_IOASIC), }, 64 { "PMAZ-DS ", 2, 0x00000000, C(TC_3000_300_DEV_TCDS), }, 65 }; 66 int tc_3000_300_nbuiltins = 67 sizeof(tc_3000_300_builtins) / sizeof(tc_3000_300_builtins[0]); 68 69 struct tcintr { 70 int (*tci_func) __P((void *)); 71 void *tci_arg; 72 } tc_3000_300_intr[TC_3000_300_NCOOKIES]; 73 74 /* XXX */ 75 void ioasic_intr_300_opt0_enable __P((int)); 76 void ioasic_intr_300_opt1_enable __P((int)); 77 void ioasic_300_opts_isintr __P((int *, int *)); 78 79 void 80 tc_3000_300_intr_setup() 81 { 82 u_long i; 83 84 /* 85 * Sisable all interrupts that we can (can't disable builtins). 86 */ 87 ioasic_intr_300_opt0_enable(0); 88 ioasic_intr_300_opt1_enable(0); 89 90 /* 91 * Set up interrupt handlers. 92 */ 93 for (i = 0; i < TC_3000_300_NCOOKIES; i++) { 94 tc_3000_300_intr[i].tci_func = tc_3000_300_intrnull; 95 tc_3000_300_intr[i].tci_arg = (void *)i; 96 } 97 } 98 99 void 100 tc_3000_300_intr_establish(tcadev, cookie, level, func, arg) 101 struct device *tcadev; 102 void *cookie, *arg; 103 tc_intrlevel_t level; 104 int (*func) __P((void *)); 105 { 106 u_long dev = (u_long)cookie; 107 108 #ifdef DIAGNOSTIC 109 /* XXX bounds-check cookie. */ 110 #endif 111 112 if (tc_3000_300_intr[dev].tci_func != tc_3000_300_intrnull) 113 panic("tc_3000_300_intr_establish: cookie %d twice", dev); 114 115 tc_3000_300_intr[dev].tci_func = func; 116 tc_3000_300_intr[dev].tci_arg = arg; 117 118 switch (dev) { 119 case TC_3000_300_DEV_OPT0: 120 ioasic_intr_300_opt0_enable(1); 121 break; 122 case TC_3000_300_DEV_OPT1: 123 ioasic_intr_300_opt1_enable(1); 124 break; 125 default: 126 /* interrupts for builtins always enabled */ 127 break; 128 } 129 } 130 131 void 132 tc_3000_300_intr_disestablish(tcadev, cookie) 133 struct device *tcadev; 134 void *cookie; 135 { 136 u_long dev = (u_long)cookie; 137 138 #ifdef DIAGNOSTIC 139 /* XXX bounds-check cookie. */ 140 #endif 141 142 if (tc_3000_300_intr[dev].tci_func == tc_3000_300_intrnull) 143 panic("tc_3000_300_intr_disestablish: cookie %d bad intr", 144 dev); 145 146 switch (dev) { 147 case TC_3000_300_DEV_OPT0: 148 ioasic_intr_300_opt0_enable(0); 149 break; 150 case TC_3000_300_DEV_OPT1: 151 ioasic_intr_300_opt1_enable(0); 152 break; 153 default: 154 /* interrupts for builtins always enabled */ 155 break; 156 } 157 158 tc_3000_300_intr[dev].tci_func = tc_3000_300_intrnull; 159 tc_3000_300_intr[dev].tci_arg = (void *)dev; 160 } 161 162 int 163 tc_3000_300_intrnull(val) 164 void *val; 165 { 166 167 panic("tc_3000_300_intrnull: uncaught TC intr for cookie %ld\n", 168 (u_long)val); 169 } 170 171 void 172 tc_3000_300_iointr(framep, vec) 173 void *framep; 174 int vec; 175 { 176 u_int32_t ir; 177 int opt0intr, opt1intr, ifound; 178 179 #ifdef DIAGNOSTIC 180 int s; 181 if (vec != 0x800) 182 panic("INVALID ASSUMPTION: vec %x, not 0x800", vec); 183 s = splhigh(); 184 if (s != PSL_IPL_IO) 185 panic("INVALID ASSUMPTION: IPL %d, not %d", s, PSL_IPL_IO); 186 splx(s); 187 #endif 188 189 do { 190 tc_syncbus(); 191 192 /* find out what interrupts/errors occurred */ 193 ir = *(volatile u_int32_t *)TC_3000_300_IR; 194 ioasic_300_opts_isintr(&opt0intr, &opt1intr); 195 tc_mb(); 196 197 /* clear the interrupts/errors we found. */ 198 *(volatile u_int32_t *)TC_3000_300_IR = ir; 199 /* XXX can't clear TC option slot interrupts here? */ 200 tc_wmb(); 201 202 ifound = 0; 203 #define CHECKINTR(slot, flag) \ 204 if (flag) { \ 205 ifound = 1; \ 206 (*tc_3000_300_intr[slot].tci_func) \ 207 (tc_3000_300_intr[slot].tci_arg); \ 208 } 209 /* Do them in order of priority; highest slot # first. */ 210 CHECKINTR(TC_3000_300_DEV_CXTURBO, ir & TC_3000_300_IR_CXTURBO); 211 CHECKINTR(TC_3000_300_DEV_IOASIC, ir & TC_3000_300_IR_IOASIC); 212 CHECKINTR(TC_3000_300_DEV_TCDS, ir & TC_3000_300_IR_TCDS); 213 CHECKINTR(TC_3000_300_DEV_OPT1, opt1intr); 214 CHECKINTR(TC_3000_300_DEV_OPT0, opt0intr); 215 #undef CHECKINTR 216 217 #ifdef DIAGNOSTIC 218 #define PRINTINTR(msg, bits) \ 219 if (ir & bits) \ 220 printf(msg); 221 PRINTINTR("BCache tag parity error\n", 222 TC_3000_300_IR_BCTAGPARITY); 223 PRINTINTR("TC overrun error\n", TC_3000_300_IR_TCOVERRUN); 224 PRINTINTR("TC I/O timeout\n", TC_3000_300_IR_TCTIMEOUT); 225 PRINTINTR("Bcache parity error\n", 226 TC_3000_300_IR_BCACHEPARITY); 227 PRINTINTR("Memory parity error\n", TC_3000_300_IR_MEMPARITY); 228 #undef PRINTINTR 229 #endif 230 } while (ifound); 231 } 232
Indexes created Thu Oct 02 14:10:14 GMT 2025