1 1.7 flxd /* $NetBSD: tc_3000_300.h,v 1.7 2017/06/22 16:46:52 flxd Exp $ */ 2 1.1 cgd 3 1.1 cgd /* 4 1.1 cgd * Copyright (c) 1994, 1995 Carnegie-Mellon University. 5 1.1 cgd * All rights reserved. 6 1.1 cgd * 7 1.1 cgd * Author: Chris G. Demetriou 8 1.6 matt * 9 1.1 cgd * Permission to use, copy, modify and distribute this software and 10 1.1 cgd * its documentation is hereby granted, provided that both the copyright 11 1.1 cgd * notice and this permission notice appear in all copies of the 12 1.1 cgd * software, derivative works or modified versions, and any portions 13 1.1 cgd * thereof, and that both notices appear in supporting documentation. 14 1.6 matt * 15 1.6 matt * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 1.6 matt * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 1.6 matt * 19 1.1 cgd * Carnegie Mellon requests users of this software to return to 20 1.1 cgd * 21 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 1.1 cgd * School of Computer Science 23 1.1 cgd * Carnegie Mellon University 24 1.1 cgd * Pittsburgh PA 15213-3890 25 1.1 cgd * 26 1.1 cgd * any improvements or extensions that they make and grant Carnegie the 27 1.1 cgd * rights to redistribute these changes. 28 1.1 cgd */ 29 1.1 cgd 30 1.1 cgd /* 31 1.7 flxd * TURBOchannel-specific functions and structures for 3000_500. 32 1.1 cgd */ 33 1.1 cgd 34 1.1 cgd /* 35 1.1 cgd * TURBOchannel Interface Registers. 36 1.1 cgd */ 37 1.1 cgd #define TC_3000_300_IR KV(0x00000001e0000000) /* Dense */ 38 1.1 cgd #define TC_3000_300_CSR KV(0x00000001e0000008) /* Dense */ 39 1.1 cgd #define TC_3000_300_MCR KV(0x00000001e0000010) /* Dense */ 40 1.1 cgd #define TC_3000_300_LED KV(0x00000001e0000018) /* Dense */ 41 1.1 cgd 42 1.1 cgd /* Interrupt bits. */ 43 1.1 cgd #define TC_3000_300_IR_CXTURBO 0x00000004 /* TC CXTURBO */ 44 1.1 cgd #define TC_3000_300_IR_TCDS 0x00000008 /* TC Dual SCSI */ 45 1.2 cgd #define TC_3000_300_IR_IOASIC 0x00000010 /* TC IOASIC */ 46 1.1 cgd #define TC_3000_300_IR_BCTAGPARITY 0x08000000 /* BC tag par. err. */ 47 1.1 cgd #define TC_3000_300_IR_TCOVERRUN 0x10000000 /* TC overrun */ 48 1.1 cgd #define TC_3000_300_IR_TCTIMEOUT 0x20000000 /* TC timeout on I/O */ 49 1.1 cgd #define TC_3000_300_IR_BCACHEPARITY 0x40000000 /* Bcache par. err. */ 50 1.1 cgd #define TC_3000_300_IR_MEMPARITY 0x80000000 /* Memory par. err. */ 51 1.2 cgd 52 1.2 cgd /* Device number "cookies." */ 53 1.2 cgd #define TC_3000_300_DEV_OPT0 0 54 1.2 cgd #define TC_3000_300_DEV_OPT1 1 55 1.2 cgd #define TC_3000_300_DEV_TCDS 2 56 1.2 cgd #define TC_3000_300_DEV_IOASIC 3 57 1.2 cgd #define TC_3000_300_DEV_CXTURBO 4 58 1.2 cgd 59 1.2 cgd #define TC_3000_300_DEV_BOGUS -1 60 1.2 cgd 61 1.2 cgd #define TC_3000_300_NCOOKIES 5 62 1.4 briggs 63 1.6 matt extern int tc_3000_300_fb_cnattach(uint64_t); 64