tc_3000_500.c revision 1.32 1 1.32 christos /* $NetBSD: tc_3000_500.c,v 1.32 2014/03/26 08:09:06 christos Exp $ */
2 1.1 cgd
3 1.1 cgd /*
4 1.7 cgd * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
5 1.1 cgd * All rights reserved.
6 1.1 cgd *
7 1.1 cgd * Author: Chris G. Demetriou
8 1.31 matt *
9 1.1 cgd * Permission to use, copy, modify and distribute this software and
10 1.1 cgd * its documentation is hereby granted, provided that both the copyright
11 1.1 cgd * notice and this permission notice appear in all copies of the
12 1.1 cgd * software, derivative works or modified versions, and any portions
13 1.1 cgd * thereof, and that both notices appear in supporting documentation.
14 1.31 matt *
15 1.31 matt * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 1.31 matt * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 1.31 matt *
19 1.1 cgd * Carnegie Mellon requests users of this software to return to
20 1.1 cgd *
21 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 1.1 cgd * School of Computer Science
23 1.1 cgd * Carnegie Mellon University
24 1.1 cgd * Pittsburgh PA 15213-3890
25 1.1 cgd *
26 1.1 cgd * any improvements or extensions that they make and grant Carnegie the
27 1.1 cgd * rights to redistribute these changes.
28 1.1 cgd */
29 1.13 cgd
30 1.14 cgd #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
31 1.14 cgd
32 1.32 christos __KERNEL_RCSID(0, "$NetBSD: tc_3000_500.c,v 1.32 2014/03/26 08:09:06 christos Exp $");
33 1.1 cgd
34 1.1 cgd #include <sys/param.h>
35 1.8 cgd #include <sys/systm.h>
36 1.1 cgd #include <sys/device.h>
37 1.23 thorpej #include <sys/malloc.h>
38 1.1 cgd
39 1.1 cgd #include <machine/autoconf.h>
40 1.1 cgd #include <machine/pte.h>
41 1.16 briggs #include <machine/rpb.h>
42 1.1 cgd
43 1.3 cgd #include <dev/tc/tcvar.h>
44 1.3 cgd #include <alpha/tc/tc_conf.h>
45 1.1 cgd #include <alpha/tc/tc_3000_500.h>
46 1.17 briggs
47 1.19 drochner #include "wsdisplay.h"
48 1.17 briggs #include "sfb.h"
49 1.17 briggs
50 1.17 briggs #if NSFB > 0
51 1.26 dsl extern int sfb_cnattach(tc_addr_t);
52 1.17 briggs #endif
53 1.1 cgd
54 1.26 dsl void tc_3000_500_intr_setup(void);
55 1.30 matt void tc_3000_500_intr_establish(device_t, void *,
56 1.26 dsl tc_intrlevel_t, int (*)(void *), void *);
57 1.30 matt void tc_3000_500_intr_disestablish(device_t, void *);
58 1.26 dsl void tc_3000_500_iointr(void *, unsigned long);
59 1.1 cgd
60 1.26 dsl int tc_3000_500_intrnull(void *);
61 1.31 matt int tc_3000_500_fb_cnattach(uint64_t);
62 1.3 cgd
63 1.3 cgd #define C(x) ((void *)(u_long)x)
64 1.8 cgd #define KV(x) (ALPHA_PHYS_TO_K0SEG(x))
65 1.3 cgd
66 1.3 cgd struct tc_slotdesc tc_3000_500_slots[] = {
67 1.3 cgd { KV(0x100000000), C(TC_3000_500_DEV_OPT0), }, /* 0 - opt slot 0 */
68 1.3 cgd { KV(0x120000000), C(TC_3000_500_DEV_OPT1), }, /* 1 - opt slot 1 */
69 1.3 cgd { KV(0x140000000), C(TC_3000_500_DEV_OPT2), }, /* 2 - opt slot 2 */
70 1.3 cgd { KV(0x160000000), C(TC_3000_500_DEV_OPT3), }, /* 3 - opt slot 3 */
71 1.3 cgd { KV(0x180000000), C(TC_3000_500_DEV_OPT4), }, /* 4 - opt slot 4 */
72 1.3 cgd { KV(0x1a0000000), C(TC_3000_500_DEV_OPT5), }, /* 5 - opt slot 5 */
73 1.3 cgd { KV(0x1c0000000), C(TC_3000_500_DEV_BOGUS), }, /* 6 - TCDS ASIC */
74 1.3 cgd { KV(0x1e0000000), C(TC_3000_500_DEV_BOGUS), }, /* 7 - IOCTL ASIC */
75 1.1 cgd };
76 1.3 cgd int tc_3000_500_nslots =
77 1.3 cgd sizeof(tc_3000_500_slots) / sizeof(tc_3000_500_slots[0]);
78 1.1 cgd
79 1.12 cgd struct tc_builtin tc_3000_500_graphics_builtins[] = {
80 1.3 cgd { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), },
81 1.3 cgd { "PMAGB-BA", 7, 0x02000000, C(TC_3000_500_DEV_CXTURBO), },
82 1.3 cgd { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), },
83 1.1 cgd };
84 1.12 cgd int tc_3000_500_graphics_nbuiltins = sizeof(tc_3000_500_graphics_builtins) /
85 1.12 cgd sizeof(tc_3000_500_graphics_builtins[0]);
86 1.12 cgd
87 1.12 cgd struct tc_builtin tc_3000_500_nographics_builtins[] = {
88 1.12 cgd { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), },
89 1.12 cgd { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), },
90 1.12 cgd };
91 1.12 cgd int tc_3000_500_nographics_nbuiltins = sizeof(tc_3000_500_nographics_builtins) /
92 1.12 cgd sizeof(tc_3000_500_nographics_builtins[0]);
93 1.1 cgd
94 1.31 matt uint32_t tc_3000_500_intrbits[TC_3000_500_NCOOKIES] = {
95 1.3 cgd TC_3000_500_IR_OPT0,
96 1.3 cgd TC_3000_500_IR_OPT1,
97 1.3 cgd TC_3000_500_IR_OPT2,
98 1.3 cgd TC_3000_500_IR_OPT3,
99 1.3 cgd TC_3000_500_IR_OPT4,
100 1.3 cgd TC_3000_500_IR_OPT5,
101 1.3 cgd TC_3000_500_IR_TCDS,
102 1.3 cgd TC_3000_500_IR_IOASIC,
103 1.3 cgd TC_3000_500_IR_CXTURBO,
104 1.1 cgd };
105 1.1 cgd
106 1.3 cgd struct tcintr {
107 1.26 dsl int (*tci_func)(void *);
108 1.3 cgd void *tci_arg;
109 1.23 thorpej struct evcnt tci_evcnt;
110 1.3 cgd } tc_3000_500_intr[TC_3000_500_NCOOKIES];
111 1.1 cgd
112 1.31 matt uint32_t tc_3000_500_imask; /* intrs we want to ignore; mirrors IMR. */
113 1.5 cgd
114 1.1 cgd void
115 1.31 matt tc_3000_500_intr_setup(void)
116 1.1 cgd {
117 1.23 thorpej char *cp;
118 1.3 cgd u_long i;
119 1.1 cgd
120 1.3 cgd /*
121 1.4 cgd * Disable all slot interrupts. Note that this cannot
122 1.4 cgd * actually disable CXTurbo, TCDS, and IOASIC interrupts.
123 1.3 cgd */
124 1.31 matt tc_3000_500_imask = *(volatile uint32_t *)TC_3000_500_IMR_READ;
125 1.3 cgd for (i = 0; i < TC_3000_500_NCOOKIES; i++)
126 1.5 cgd tc_3000_500_imask |= tc_3000_500_intrbits[i];
127 1.31 matt *(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask;
128 1.3 cgd tc_mb();
129 1.1 cgd
130 1.31 matt /*
131 1.3 cgd * Set up interrupt handlers.
132 1.1 cgd */
133 1.31 matt for (i = 0; i < TC_3000_500_NCOOKIES; i++) {
134 1.32 christos static const size_t len = 12;
135 1.3 cgd tc_3000_500_intr[i].tci_func = tc_3000_500_intrnull;
136 1.3 cgd tc_3000_500_intr[i].tci_arg = (void *)i;
137 1.23 thorpej
138 1.32 christos cp = malloc(len, M_DEVBUF, M_NOWAIT);
139 1.23 thorpej if (cp == NULL)
140 1.23 thorpej panic("tc_3000_500_intr_setup");
141 1.32 christos snprintf(cp, len, "slot %lu", i);
142 1.23 thorpej evcnt_attach_dynamic(&tc_3000_500_intr[i].tci_evcnt,
143 1.23 thorpej EVCNT_TYPE_INTR, NULL, "tc", cp);
144 1.31 matt }
145 1.22 cgd }
146 1.22 cgd
147 1.22 cgd const struct evcnt *
148 1.30 matt tc_3000_500_intr_evcnt(device_t tcadev, void *cookie)
149 1.22 cgd {
150 1.23 thorpej u_long dev = (u_long)cookie;
151 1.23 thorpej
152 1.23 thorpej #ifdef DIAGNOSTIC
153 1.23 thorpej /* XXX bounds-check cookie. */
154 1.23 thorpej #endif
155 1.22 cgd
156 1.23 thorpej return (&tc_3000_500_intr[dev].tci_evcnt);
157 1.1 cgd }
158 1.1 cgd
159 1.1 cgd void
160 1.30 matt tc_3000_500_intr_establish(device_t tcadev, void *cookie, tc_intrlevel_t level, int (*func)(void *), void *arg)
161 1.1 cgd {
162 1.3 cgd u_long dev = (u_long)cookie;
163 1.1 cgd
164 1.1 cgd #ifdef DIAGNOSTIC
165 1.3 cgd /* XXX bounds-check cookie. */
166 1.1 cgd #endif
167 1.1 cgd
168 1.3 cgd if (tc_3000_500_intr[dev].tci_func != tc_3000_500_intrnull)
169 1.18 thorpej panic("tc_3000_500_intr_establish: cookie %lu twice", dev);
170 1.1 cgd
171 1.3 cgd tc_3000_500_intr[dev].tci_func = func;
172 1.3 cgd tc_3000_500_intr[dev].tci_arg = arg;
173 1.1 cgd
174 1.5 cgd tc_3000_500_imask &= ~tc_3000_500_intrbits[dev];
175 1.31 matt *(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask;
176 1.3 cgd tc_mb();
177 1.1 cgd }
178 1.1 cgd
179 1.1 cgd void
180 1.30 matt tc_3000_500_intr_disestablish(device_t tcadev, void *cookie)
181 1.1 cgd {
182 1.3 cgd u_long dev = (u_long)cookie;
183 1.1 cgd
184 1.1 cgd #ifdef DIAGNOSTIC
185 1.3 cgd /* XXX bounds-check cookie. */
186 1.1 cgd #endif
187 1.1 cgd
188 1.3 cgd if (tc_3000_500_intr[dev].tci_func == tc_3000_500_intrnull)
189 1.18 thorpej panic("tc_3000_500_intr_disestablish: cookie %lu bad intr",
190 1.1 cgd dev);
191 1.1 cgd
192 1.5 cgd tc_3000_500_imask |= tc_3000_500_intrbits[dev];
193 1.31 matt *(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask;
194 1.3 cgd tc_mb();
195 1.3 cgd
196 1.3 cgd tc_3000_500_intr[dev].tci_func = tc_3000_500_intrnull;
197 1.3 cgd tc_3000_500_intr[dev].tci_arg = (void *)dev;
198 1.3 cgd }
199 1.3 cgd
200 1.3 cgd int
201 1.27 dsl tc_3000_500_intrnull(void *val)
202 1.3 cgd {
203 1.1 cgd
204 1.25 provos panic("tc_3000_500_intrnull: uncaught TC intr for cookie %ld",
205 1.3 cgd (u_long)val);
206 1.1 cgd }
207 1.1 cgd
208 1.1 cgd void
209 1.27 dsl tc_3000_500_iointr(void *arg, unsigned long vec)
210 1.1 cgd {
211 1.31 matt uint32_t ir;
212 1.1 cgd int ifound;
213 1.1 cgd
214 1.1 cgd #ifdef DIAGNOSTIC
215 1.1 cgd int s;
216 1.1 cgd if (vec != 0x800)
217 1.9 cgd panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec);
218 1.1 cgd s = splhigh();
219 1.8 cgd if (s != ALPHA_PSL_IPL_IO)
220 1.8 cgd panic("INVALID ASSUMPTION: IPL %d, not %d", s,
221 1.8 cgd ALPHA_PSL_IPL_IO);
222 1.1 cgd splx(s);
223 1.1 cgd #endif
224 1.1 cgd
225 1.1 cgd do {
226 1.3 cgd tc_syncbus();
227 1.31 matt ir = *(volatile uint32_t *)TC_3000_500_IR_CLEAR;
228 1.4 cgd
229 1.4 cgd /* Ignore interrupts that we haven't enabled. */
230 1.5 cgd ir &= ~(tc_3000_500_imask & 0x1ff);
231 1.1 cgd
232 1.1 cgd ifound = 0;
233 1.6 cgd
234 1.23 thorpej #define INCRINTRCNT(slot) tc_3000_500_intr[slot].tci_evcnt.ev_count++
235 1.6 cgd
236 1.3 cgd #define CHECKINTR(slot) \
237 1.3 cgd if (ir & tc_3000_500_intrbits[slot]) { \
238 1.1 cgd ifound = 1; \
239 1.6 cgd INCRINTRCNT(slot); \
240 1.3 cgd (*tc_3000_500_intr[slot].tci_func) \
241 1.3 cgd (tc_3000_500_intr[slot].tci_arg); \
242 1.1 cgd }
243 1.1 cgd /* Do them in order of priority; highest slot # first. */
244 1.3 cgd CHECKINTR(TC_3000_500_DEV_CXTURBO);
245 1.3 cgd CHECKINTR(TC_3000_500_DEV_IOASIC);
246 1.3 cgd CHECKINTR(TC_3000_500_DEV_TCDS);
247 1.3 cgd CHECKINTR(TC_3000_500_DEV_OPT5);
248 1.3 cgd CHECKINTR(TC_3000_500_DEV_OPT4);
249 1.3 cgd CHECKINTR(TC_3000_500_DEV_OPT3);
250 1.3 cgd CHECKINTR(TC_3000_500_DEV_OPT2);
251 1.3 cgd CHECKINTR(TC_3000_500_DEV_OPT1);
252 1.3 cgd CHECKINTR(TC_3000_500_DEV_OPT0);
253 1.1 cgd #undef CHECKINTR
254 1.1 cgd
255 1.1 cgd #ifdef DIAGNOSTIC
256 1.1 cgd #define PRINTINTR(msg, bits) \
257 1.1 cgd if (ir & bits) \
258 1.11 christos printf(msg);
259 1.1 cgd PRINTINTR("Second error occurred\n", TC_3000_500_IR_ERR2);
260 1.1 cgd PRINTINTR("DMA buffer error\n", TC_3000_500_IR_DMABE);
261 1.1 cgd PRINTINTR("DMA cross 2K boundary\n", TC_3000_500_IR_DMA2K);
262 1.1 cgd PRINTINTR("TC reset in progress\n", TC_3000_500_IR_TCRESET);
263 1.1 cgd PRINTINTR("TC parity error\n", TC_3000_500_IR_TCPAR);
264 1.1 cgd PRINTINTR("DMA tag error\n", TC_3000_500_IR_DMATAG);
265 1.1 cgd PRINTINTR("Single-bit error\n", TC_3000_500_IR_DMASBE);
266 1.1 cgd PRINTINTR("Double-bit error\n", TC_3000_500_IR_DMADBE);
267 1.1 cgd PRINTINTR("TC I/O timeout\n", TC_3000_500_IR_TCTIMEOUT);
268 1.1 cgd PRINTINTR("DMA block too long\n", TC_3000_500_IR_DMABLOCK);
269 1.1 cgd PRINTINTR("Invalid I/O address\n", TC_3000_500_IR_IOADDR);
270 1.1 cgd PRINTINTR("DMA scatter/gather invalid\n", TC_3000_500_IR_DMASG);
271 1.1 cgd PRINTINTR("Scatter/gather parity error\n",
272 1.1 cgd TC_3000_500_IR_SGPAR);
273 1.1 cgd #undef PRINTINTR
274 1.1 cgd #endif
275 1.1 cgd } while (ifound);
276 1.16 briggs }
277 1.16 briggs
278 1.19 drochner #if NWSDISPLAY > 0
279 1.16 briggs /*
280 1.16 briggs * tc_3000_500_fb_cnattach --
281 1.16 briggs * Attempt to map the CTB output device to a slot and attach the
282 1.16 briggs * framebuffer as the output side of the console.
283 1.16 briggs */
284 1.16 briggs int
285 1.31 matt tc_3000_500_fb_cnattach(uint64_t turbo_slot)
286 1.16 briggs {
287 1.31 matt uint32_t output_slot;
288 1.16 briggs
289 1.16 briggs output_slot = turbo_slot & 0xffffffff;
290 1.16 briggs
291 1.16 briggs if (output_slot >= tc_3000_500_nslots) {
292 1.20 drochner return EINVAL;
293 1.16 briggs }
294 1.16 briggs
295 1.16 briggs if (hwrpb->rpb_variation & SV_GRAPHICS) {
296 1.16 briggs if (output_slot == 0) {
297 1.17 briggs #if NSFB > 0
298 1.16 briggs sfb_cnattach(KV(0x1e0000000) + 0x02000000);
299 1.20 drochner return 0;
300 1.17 briggs #else
301 1.20 drochner return ENXIO;
302 1.17 briggs #endif
303 1.16 briggs }
304 1.16 briggs } else {
305 1.16 briggs /*
306 1.16 briggs * Slots 0-2 in the tc_3000_500_slots array are only
307 1.16 briggs * on the 500 models that also have the CXTurbo
308 1.16 briggs * (500/800/900) and a total of 6 TC slots. For the
309 1.16 briggs * 400/600/700, slots 0-2 are in table locations 3-5, so
310 1.16 briggs * offset the CTB slot by 3 to get the address in our table.
311 1.16 briggs */
312 1.16 briggs output_slot += 3;
313 1.16 briggs }
314 1.16 briggs return tc_fb_cnattach(tc_3000_500_slots[output_slot-1].tcs_addr);
315 1.1 cgd }
316 1.19 drochner #endif /* NWSDISPLAY */
317 1.1 cgd
318 1.8 cgd #if 0
319 1.1 cgd /*
320 1.1 cgd * tc_3000_500_ioslot --
321 1.1 cgd * Set the PBS bits for devices on the TC.
322 1.1 cgd */
323 1.1 cgd void
324 1.31 matt tc_3000_500_ioslot(uint32_t slot, uint32_t flags, int set)
325 1.1 cgd {
326 1.31 matt volatile uint32_t *iosp;
327 1.31 matt uint32_t ios;
328 1.1 cgd int s;
329 1.1 cgd
330 1.31 matt iosp = (volatile uint32_t *)TC_3000_500_IOSLOT;
331 1.1 cgd ios = *iosp;
332 1.1 cgd flags <<= (slot * 3);
333 1.1 cgd if (set)
334 1.1 cgd ios |= flags;
335 1.1 cgd else
336 1.1 cgd ios &= ~flags;
337 1.1 cgd s = splhigh();
338 1.1 cgd *iosp = ios;
339 1.3 cgd tc_mb();
340 1.1 cgd splx(s);
341 1.1 cgd }
342 1.8 cgd #endif
343