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tc_3000_500.c revision 1.33
      1  1.33       chs /* $NetBSD: tc_3000_500.c,v 1.33 2019/11/10 21:16:22 chs Exp $ */
      2   1.1       cgd 
      3   1.1       cgd /*
      4   1.7       cgd  * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
      5   1.1       cgd  * All rights reserved.
      6   1.1       cgd  *
      7   1.1       cgd  * Author: Chris G. Demetriou
      8  1.31      matt  *
      9   1.1       cgd  * Permission to use, copy, modify and distribute this software and
     10   1.1       cgd  * its documentation is hereby granted, provided that both the copyright
     11   1.1       cgd  * notice and this permission notice appear in all copies of the
     12   1.1       cgd  * software, derivative works or modified versions, and any portions
     13   1.1       cgd  * thereof, and that both notices appear in supporting documentation.
     14  1.31      matt  *
     15  1.31      matt  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  1.31      matt  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17   1.1       cgd  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  1.31      matt  *
     19   1.1       cgd  * Carnegie Mellon requests users of this software to return to
     20   1.1       cgd  *
     21   1.1       cgd  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22   1.1       cgd  *  School of Computer Science
     23   1.1       cgd  *  Carnegie Mellon University
     24   1.1       cgd  *  Pittsburgh PA 15213-3890
     25   1.1       cgd  *
     26   1.1       cgd  * any improvements or extensions that they make and grant Carnegie the
     27   1.1       cgd  * rights to redistribute these changes.
     28   1.1       cgd  */
     29  1.13       cgd 
     30  1.14       cgd #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     31  1.14       cgd 
     32  1.33       chs __KERNEL_RCSID(0, "$NetBSD: tc_3000_500.c,v 1.33 2019/11/10 21:16:22 chs Exp $");
     33   1.1       cgd 
     34   1.1       cgd #include <sys/param.h>
     35   1.8       cgd #include <sys/systm.h>
     36   1.1       cgd #include <sys/device.h>
     37  1.23   thorpej #include <sys/malloc.h>
     38   1.1       cgd 
     39   1.1       cgd #include <machine/autoconf.h>
     40   1.1       cgd #include <machine/pte.h>
     41  1.16    briggs #include <machine/rpb.h>
     42   1.1       cgd 
     43   1.3       cgd #include <dev/tc/tcvar.h>
     44   1.3       cgd #include <alpha/tc/tc_conf.h>
     45   1.1       cgd #include <alpha/tc/tc_3000_500.h>
     46  1.17    briggs 
     47  1.19  drochner #include "wsdisplay.h"
     48  1.17    briggs #include "sfb.h"
     49  1.17    briggs 
     50  1.17    briggs #if NSFB > 0
     51  1.26       dsl extern int	sfb_cnattach(tc_addr_t);
     52  1.17    briggs #endif
     53   1.1       cgd 
     54  1.26       dsl void	tc_3000_500_intr_setup(void);
     55  1.30      matt void	tc_3000_500_intr_establish(device_t, void *,
     56  1.26       dsl 	    tc_intrlevel_t, int (*)(void *), void *);
     57  1.30      matt void	tc_3000_500_intr_disestablish(device_t, void *);
     58  1.26       dsl void	tc_3000_500_iointr(void *, unsigned long);
     59   1.1       cgd 
     60  1.26       dsl int	tc_3000_500_intrnull(void *);
     61  1.31      matt int	tc_3000_500_fb_cnattach(uint64_t);
     62   1.3       cgd 
     63   1.3       cgd #define C(x)	((void *)(u_long)x)
     64   1.8       cgd #define	KV(x)	(ALPHA_PHYS_TO_K0SEG(x))
     65   1.3       cgd 
     66   1.3       cgd struct tc_slotdesc tc_3000_500_slots[] = {
     67   1.3       cgd 	{ KV(0x100000000), C(TC_3000_500_DEV_OPT0), },	/* 0 - opt slot 0 */
     68   1.3       cgd 	{ KV(0x120000000), C(TC_3000_500_DEV_OPT1), },	/* 1 - opt slot 1 */
     69   1.3       cgd 	{ KV(0x140000000), C(TC_3000_500_DEV_OPT2), },	/* 2 - opt slot 2 */
     70   1.3       cgd 	{ KV(0x160000000), C(TC_3000_500_DEV_OPT3), },	/* 3 - opt slot 3 */
     71   1.3       cgd 	{ KV(0x180000000), C(TC_3000_500_DEV_OPT4), },	/* 4 - opt slot 4 */
     72   1.3       cgd 	{ KV(0x1a0000000), C(TC_3000_500_DEV_OPT5), },	/* 5 - opt slot 5 */
     73   1.3       cgd 	{ KV(0x1c0000000), C(TC_3000_500_DEV_BOGUS), },	/* 6 - TCDS ASIC */
     74   1.3       cgd 	{ KV(0x1e0000000), C(TC_3000_500_DEV_BOGUS), },	/* 7 - IOCTL ASIC */
     75   1.1       cgd };
     76   1.3       cgd int tc_3000_500_nslots =
     77   1.3       cgd     sizeof(tc_3000_500_slots) / sizeof(tc_3000_500_slots[0]);
     78   1.1       cgd 
     79  1.12       cgd struct tc_builtin tc_3000_500_graphics_builtins[] = {
     80   1.3       cgd 	{ "FLAMG-IO",	7, 0x00000000, C(TC_3000_500_DEV_IOASIC),	},
     81   1.3       cgd 	{ "PMAGB-BA",	7, 0x02000000, C(TC_3000_500_DEV_CXTURBO),	},
     82   1.3       cgd 	{ "PMAZ-DS ",	6, 0x00000000, C(TC_3000_500_DEV_TCDS),		},
     83   1.1       cgd };
     84  1.12       cgd int tc_3000_500_graphics_nbuiltins = sizeof(tc_3000_500_graphics_builtins) /
     85  1.12       cgd     sizeof(tc_3000_500_graphics_builtins[0]);
     86  1.12       cgd 
     87  1.12       cgd struct tc_builtin tc_3000_500_nographics_builtins[] = {
     88  1.12       cgd 	{ "FLAMG-IO",	7, 0x00000000, C(TC_3000_500_DEV_IOASIC),	},
     89  1.12       cgd 	{ "PMAZ-DS ",	6, 0x00000000, C(TC_3000_500_DEV_TCDS),		},
     90  1.12       cgd };
     91  1.12       cgd int tc_3000_500_nographics_nbuiltins = sizeof(tc_3000_500_nographics_builtins) /
     92  1.12       cgd     sizeof(tc_3000_500_nographics_builtins[0]);
     93   1.1       cgd 
     94  1.31      matt uint32_t tc_3000_500_intrbits[TC_3000_500_NCOOKIES] = {
     95   1.3       cgd 	TC_3000_500_IR_OPT0,
     96   1.3       cgd 	TC_3000_500_IR_OPT1,
     97   1.3       cgd 	TC_3000_500_IR_OPT2,
     98   1.3       cgd 	TC_3000_500_IR_OPT3,
     99   1.3       cgd 	TC_3000_500_IR_OPT4,
    100   1.3       cgd 	TC_3000_500_IR_OPT5,
    101   1.3       cgd 	TC_3000_500_IR_TCDS,
    102   1.3       cgd 	TC_3000_500_IR_IOASIC,
    103   1.3       cgd 	TC_3000_500_IR_CXTURBO,
    104   1.1       cgd };
    105   1.1       cgd 
    106   1.3       cgd struct tcintr {
    107  1.26       dsl 	int	(*tci_func)(void *);
    108   1.3       cgd 	void	*tci_arg;
    109  1.23   thorpej 	struct evcnt tci_evcnt;
    110   1.3       cgd } tc_3000_500_intr[TC_3000_500_NCOOKIES];
    111   1.1       cgd 
    112  1.31      matt uint32_t tc_3000_500_imask;	/* intrs we want to ignore; mirrors IMR. */
    113   1.5       cgd 
    114   1.1       cgd void
    115  1.31      matt tc_3000_500_intr_setup(void)
    116   1.1       cgd {
    117  1.23   thorpej 	char *cp;
    118   1.3       cgd 	u_long i;
    119   1.1       cgd 
    120   1.3       cgd 	/*
    121   1.4       cgd 	 * Disable all slot interrupts.  Note that this cannot
    122   1.4       cgd 	 * actually disable CXTurbo, TCDS, and IOASIC interrupts.
    123   1.3       cgd 	 */
    124  1.31      matt 	tc_3000_500_imask = *(volatile uint32_t *)TC_3000_500_IMR_READ;
    125   1.3       cgd 	for (i = 0; i < TC_3000_500_NCOOKIES; i++)
    126   1.5       cgd 		tc_3000_500_imask |= tc_3000_500_intrbits[i];
    127  1.31      matt 	*(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask;
    128   1.3       cgd 	tc_mb();
    129   1.1       cgd 
    130  1.31      matt 	/*
    131   1.3       cgd 	 * Set up interrupt handlers.
    132   1.1       cgd 	 */
    133  1.31      matt 	for (i = 0; i < TC_3000_500_NCOOKIES; i++) {
    134  1.32  christos 		static const size_t len = 12;
    135   1.3       cgd 		tc_3000_500_intr[i].tci_func = tc_3000_500_intrnull;
    136   1.3       cgd 		tc_3000_500_intr[i].tci_arg = (void *)i;
    137  1.23   thorpej 
    138  1.33       chs 		cp = malloc(len, M_DEVBUF, M_WAITOK);
    139  1.32  christos 		snprintf(cp, len, "slot %lu", i);
    140  1.23   thorpej 		evcnt_attach_dynamic(&tc_3000_500_intr[i].tci_evcnt,
    141  1.23   thorpej 		    EVCNT_TYPE_INTR, NULL, "tc", cp);
    142  1.31      matt 	}
    143  1.22       cgd }
    144  1.22       cgd 
    145  1.22       cgd const struct evcnt *
    146  1.30      matt tc_3000_500_intr_evcnt(device_t tcadev, void *cookie)
    147  1.22       cgd {
    148  1.23   thorpej 	u_long dev = (u_long)cookie;
    149  1.23   thorpej 
    150  1.23   thorpej #ifdef DIAGNOSTIC
    151  1.23   thorpej 	/* XXX bounds-check cookie. */
    152  1.23   thorpej #endif
    153  1.22       cgd 
    154  1.23   thorpej 	return (&tc_3000_500_intr[dev].tci_evcnt);
    155   1.1       cgd }
    156   1.1       cgd 
    157   1.1       cgd void
    158  1.30      matt tc_3000_500_intr_establish(device_t tcadev, void *cookie, tc_intrlevel_t level, int (*func)(void *), void *arg)
    159   1.1       cgd {
    160   1.3       cgd 	u_long dev = (u_long)cookie;
    161   1.1       cgd 
    162   1.1       cgd #ifdef DIAGNOSTIC
    163   1.3       cgd 	/* XXX bounds-check cookie. */
    164   1.1       cgd #endif
    165   1.1       cgd 
    166   1.3       cgd 	if (tc_3000_500_intr[dev].tci_func != tc_3000_500_intrnull)
    167  1.18   thorpej 		panic("tc_3000_500_intr_establish: cookie %lu twice", dev);
    168   1.1       cgd 
    169   1.3       cgd 	tc_3000_500_intr[dev].tci_func = func;
    170   1.3       cgd 	tc_3000_500_intr[dev].tci_arg = arg;
    171   1.1       cgd 
    172   1.5       cgd 	tc_3000_500_imask &= ~tc_3000_500_intrbits[dev];
    173  1.31      matt 	*(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask;
    174   1.3       cgd 	tc_mb();
    175   1.1       cgd }
    176   1.1       cgd 
    177   1.1       cgd void
    178  1.30      matt tc_3000_500_intr_disestablish(device_t tcadev, void *cookie)
    179   1.1       cgd {
    180   1.3       cgd 	u_long dev = (u_long)cookie;
    181   1.1       cgd 
    182   1.1       cgd #ifdef DIAGNOSTIC
    183   1.3       cgd 	/* XXX bounds-check cookie. */
    184   1.1       cgd #endif
    185   1.1       cgd 
    186   1.3       cgd 	if (tc_3000_500_intr[dev].tci_func == tc_3000_500_intrnull)
    187  1.18   thorpej 		panic("tc_3000_500_intr_disestablish: cookie %lu bad intr",
    188   1.1       cgd 		    dev);
    189   1.1       cgd 
    190   1.5       cgd 	tc_3000_500_imask |= tc_3000_500_intrbits[dev];
    191  1.31      matt 	*(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask;
    192   1.3       cgd 	tc_mb();
    193   1.3       cgd 
    194   1.3       cgd 	tc_3000_500_intr[dev].tci_func = tc_3000_500_intrnull;
    195   1.3       cgd 	tc_3000_500_intr[dev].tci_arg = (void *)dev;
    196   1.3       cgd }
    197   1.3       cgd 
    198   1.3       cgd int
    199  1.27       dsl tc_3000_500_intrnull(void *val)
    200   1.3       cgd {
    201   1.1       cgd 
    202  1.25    provos 	panic("tc_3000_500_intrnull: uncaught TC intr for cookie %ld",
    203   1.3       cgd 	    (u_long)val);
    204   1.1       cgd }
    205   1.1       cgd 
    206   1.1       cgd void
    207  1.27       dsl tc_3000_500_iointr(void *arg, unsigned long vec)
    208   1.1       cgd {
    209  1.31      matt 	uint32_t ir;
    210   1.1       cgd 	int ifound;
    211   1.1       cgd 
    212   1.1       cgd #ifdef DIAGNOSTIC
    213   1.1       cgd 	int s;
    214   1.1       cgd 	if (vec != 0x800)
    215   1.9       cgd 		panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec);
    216   1.1       cgd 	s = splhigh();
    217   1.8       cgd 	if (s != ALPHA_PSL_IPL_IO)
    218   1.8       cgd 		panic("INVALID ASSUMPTION: IPL %d, not %d", s,
    219   1.8       cgd 		    ALPHA_PSL_IPL_IO);
    220   1.1       cgd 	splx(s);
    221   1.1       cgd #endif
    222   1.1       cgd 
    223   1.1       cgd 	do {
    224   1.3       cgd 		tc_syncbus();
    225  1.31      matt 		ir = *(volatile uint32_t *)TC_3000_500_IR_CLEAR;
    226   1.4       cgd 
    227   1.4       cgd 		/* Ignore interrupts that we haven't enabled. */
    228   1.5       cgd 		ir &= ~(tc_3000_500_imask & 0x1ff);
    229   1.1       cgd 
    230   1.1       cgd 		ifound = 0;
    231   1.6       cgd 
    232  1.23   thorpej #define	INCRINTRCNT(slot)	tc_3000_500_intr[slot].tci_evcnt.ev_count++
    233   1.6       cgd 
    234   1.3       cgd #define	CHECKINTR(slot)							\
    235   1.3       cgd 		if (ir & tc_3000_500_intrbits[slot]) {			\
    236   1.1       cgd 			ifound = 1;					\
    237   1.6       cgd 			INCRINTRCNT(slot);				\
    238   1.3       cgd 			(*tc_3000_500_intr[slot].tci_func)		\
    239   1.3       cgd 			    (tc_3000_500_intr[slot].tci_arg);		\
    240   1.1       cgd 		}
    241   1.1       cgd 		/* Do them in order of priority; highest slot # first. */
    242   1.3       cgd 		CHECKINTR(TC_3000_500_DEV_CXTURBO);
    243   1.3       cgd 		CHECKINTR(TC_3000_500_DEV_IOASIC);
    244   1.3       cgd 		CHECKINTR(TC_3000_500_DEV_TCDS);
    245   1.3       cgd 		CHECKINTR(TC_3000_500_DEV_OPT5);
    246   1.3       cgd 		CHECKINTR(TC_3000_500_DEV_OPT4);
    247   1.3       cgd 		CHECKINTR(TC_3000_500_DEV_OPT3);
    248   1.3       cgd 		CHECKINTR(TC_3000_500_DEV_OPT2);
    249   1.3       cgd 		CHECKINTR(TC_3000_500_DEV_OPT1);
    250   1.3       cgd 		CHECKINTR(TC_3000_500_DEV_OPT0);
    251   1.1       cgd #undef CHECKINTR
    252   1.1       cgd 
    253   1.1       cgd #ifdef DIAGNOSTIC
    254   1.1       cgd #define PRINTINTR(msg, bits)						\
    255   1.1       cgd 	if (ir & bits)							\
    256  1.11  christos 		printf(msg);
    257   1.1       cgd 		PRINTINTR("Second error occurred\n", TC_3000_500_IR_ERR2);
    258   1.1       cgd 		PRINTINTR("DMA buffer error\n", TC_3000_500_IR_DMABE);
    259   1.1       cgd 		PRINTINTR("DMA cross 2K boundary\n", TC_3000_500_IR_DMA2K);
    260   1.1       cgd 		PRINTINTR("TC reset in progress\n", TC_3000_500_IR_TCRESET);
    261   1.1       cgd 		PRINTINTR("TC parity error\n", TC_3000_500_IR_TCPAR);
    262   1.1       cgd 		PRINTINTR("DMA tag error\n", TC_3000_500_IR_DMATAG);
    263   1.1       cgd 		PRINTINTR("Single-bit error\n", TC_3000_500_IR_DMASBE);
    264   1.1       cgd 		PRINTINTR("Double-bit error\n", TC_3000_500_IR_DMADBE);
    265   1.1       cgd 		PRINTINTR("TC I/O timeout\n", TC_3000_500_IR_TCTIMEOUT);
    266   1.1       cgd 		PRINTINTR("DMA block too long\n", TC_3000_500_IR_DMABLOCK);
    267   1.1       cgd 		PRINTINTR("Invalid I/O address\n", TC_3000_500_IR_IOADDR);
    268   1.1       cgd 		PRINTINTR("DMA scatter/gather invalid\n", TC_3000_500_IR_DMASG);
    269   1.1       cgd 		PRINTINTR("Scatter/gather parity error\n",
    270   1.1       cgd 		    TC_3000_500_IR_SGPAR);
    271   1.1       cgd #undef PRINTINTR
    272   1.1       cgd #endif
    273   1.1       cgd 	} while (ifound);
    274  1.16    briggs }
    275  1.16    briggs 
    276  1.19  drochner #if NWSDISPLAY > 0
    277  1.16    briggs /*
    278  1.16    briggs  * tc_3000_500_fb_cnattach --
    279  1.16    briggs  *	Attempt to map the CTB output device to a slot and attach the
    280  1.16    briggs  * framebuffer as the output side of the console.
    281  1.16    briggs  */
    282  1.16    briggs int
    283  1.31      matt tc_3000_500_fb_cnattach(uint64_t turbo_slot)
    284  1.16    briggs {
    285  1.31      matt 	uint32_t output_slot;
    286  1.16    briggs 
    287  1.16    briggs 	output_slot = turbo_slot & 0xffffffff;
    288  1.16    briggs 
    289  1.16    briggs 	if (output_slot >= tc_3000_500_nslots) {
    290  1.20  drochner 		return EINVAL;
    291  1.16    briggs 	}
    292  1.16    briggs 
    293  1.16    briggs 	if (hwrpb->rpb_variation & SV_GRAPHICS) {
    294  1.16    briggs 		if (output_slot == 0) {
    295  1.17    briggs #if NSFB > 0
    296  1.16    briggs 			sfb_cnattach(KV(0x1e0000000) + 0x02000000);
    297  1.20  drochner 			return 0;
    298  1.17    briggs #else
    299  1.20  drochner 			return ENXIO;
    300  1.17    briggs #endif
    301  1.16    briggs 		}
    302  1.16    briggs 	} else {
    303  1.16    briggs 		/*
    304  1.16    briggs 		 * Slots 0-2 in the tc_3000_500_slots array are only
    305  1.16    briggs 		 * on the 500 models that also have the CXTurbo
    306  1.16    briggs 		 * (500/800/900) and a total of 6 TC slots.  For the
    307  1.16    briggs 		 * 400/600/700, slots 0-2 are in table locations 3-5, so
    308  1.16    briggs 		 * offset the CTB slot by 3 to get the address in our table.
    309  1.16    briggs 		 */
    310  1.16    briggs 		output_slot += 3;
    311  1.16    briggs 	}
    312  1.16    briggs 	return tc_fb_cnattach(tc_3000_500_slots[output_slot-1].tcs_addr);
    313   1.1       cgd }
    314  1.19  drochner #endif /* NWSDISPLAY */
    315   1.1       cgd 
    316   1.8       cgd #if 0
    317   1.1       cgd /*
    318   1.1       cgd  * tc_3000_500_ioslot --
    319   1.1       cgd  *	Set the PBS bits for devices on the TC.
    320   1.1       cgd  */
    321   1.1       cgd void
    322  1.31      matt tc_3000_500_ioslot(uint32_t slot, uint32_t flags, int set)
    323   1.1       cgd {
    324  1.31      matt 	volatile uint32_t *iosp;
    325  1.31      matt 	uint32_t ios;
    326   1.1       cgd 	int s;
    327   1.1       cgd 
    328  1.31      matt 	iosp = (volatile uint32_t *)TC_3000_500_IOSLOT;
    329   1.1       cgd 	ios = *iosp;
    330   1.1       cgd 	flags <<= (slot * 3);
    331   1.1       cgd 	if (set)
    332   1.1       cgd 		ios |= flags;
    333   1.1       cgd 	else
    334   1.1       cgd 		ios &= ~flags;
    335   1.1       cgd 	s = splhigh();
    336   1.1       cgd 	*iosp = ios;
    337   1.3       cgd 	tc_mb();
    338   1.1       cgd 	splx(s);
    339   1.1       cgd }
    340   1.8       cgd #endif
    341