tc_3000_500.c revision 1.12
1 /* $NetBSD: tc_3000_500.c,v 1.12 1996/11/15 23:59:00 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/device.h> 33 34 #include <machine/autoconf.h> 35 #include <machine/pte.h> 36 #ifndef EVCNT_COUNTERS 37 #include <machine/intrcnt.h> 38 #endif 39 40 #include <dev/tc/tcvar.h> 41 #include <alpha/tc/tc_conf.h> 42 #include <alpha/tc/tc_3000_500.h> 43 44 void tc_3000_500_intr_setup __P((void)); 45 void tc_3000_500_intr_establish __P((struct device *, void *, 46 tc_intrlevel_t, int (*)(void *), void *)); 47 void tc_3000_500_intr_disestablish __P((struct device *, void *)); 48 void tc_3000_500_iointr __P((void *, unsigned long)); 49 50 int tc_3000_500_intrnull __P((void *)); 51 52 #define C(x) ((void *)(u_long)x) 53 #define KV(x) (ALPHA_PHYS_TO_K0SEG(x)) 54 55 struct tc_slotdesc tc_3000_500_slots[] = { 56 { KV(0x100000000), C(TC_3000_500_DEV_OPT0), }, /* 0 - opt slot 0 */ 57 { KV(0x120000000), C(TC_3000_500_DEV_OPT1), }, /* 1 - opt slot 1 */ 58 { KV(0x140000000), C(TC_3000_500_DEV_OPT2), }, /* 2 - opt slot 2 */ 59 { KV(0x160000000), C(TC_3000_500_DEV_OPT3), }, /* 3 - opt slot 3 */ 60 { KV(0x180000000), C(TC_3000_500_DEV_OPT4), }, /* 4 - opt slot 4 */ 61 { KV(0x1a0000000), C(TC_3000_500_DEV_OPT5), }, /* 5 - opt slot 5 */ 62 { KV(0x1c0000000), C(TC_3000_500_DEV_BOGUS), }, /* 6 - TCDS ASIC */ 63 { KV(0x1e0000000), C(TC_3000_500_DEV_BOGUS), }, /* 7 - IOCTL ASIC */ 64 }; 65 int tc_3000_500_nslots = 66 sizeof(tc_3000_500_slots) / sizeof(tc_3000_500_slots[0]); 67 68 struct tc_builtin tc_3000_500_graphics_builtins[] = { 69 { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), }, 70 { "PMAGB-BA", 7, 0x02000000, C(TC_3000_500_DEV_CXTURBO), }, 71 { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), }, 72 }; 73 int tc_3000_500_graphics_nbuiltins = sizeof(tc_3000_500_graphics_builtins) / 74 sizeof(tc_3000_500_graphics_builtins[0]); 75 76 struct tc_builtin tc_3000_500_nographics_builtins[] = { 77 { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), }, 78 { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), }, 79 }; 80 int tc_3000_500_nographics_nbuiltins = sizeof(tc_3000_500_nographics_builtins) / 81 sizeof(tc_3000_500_nographics_builtins[0]); 82 83 u_int32_t tc_3000_500_intrbits[TC_3000_500_NCOOKIES] = { 84 TC_3000_500_IR_OPT0, 85 TC_3000_500_IR_OPT1, 86 TC_3000_500_IR_OPT2, 87 TC_3000_500_IR_OPT3, 88 TC_3000_500_IR_OPT4, 89 TC_3000_500_IR_OPT5, 90 TC_3000_500_IR_TCDS, 91 TC_3000_500_IR_IOASIC, 92 TC_3000_500_IR_CXTURBO, 93 }; 94 95 struct tcintr { 96 int (*tci_func) __P((void *)); 97 void *tci_arg; 98 } tc_3000_500_intr[TC_3000_500_NCOOKIES]; 99 100 u_int32_t tc_3000_500_imask; /* intrs we want to ignore; mirrors IMR. */ 101 102 void 103 tc_3000_500_intr_setup() 104 { 105 u_long i; 106 107 /* 108 * Disable all slot interrupts. Note that this cannot 109 * actually disable CXTurbo, TCDS, and IOASIC interrupts. 110 */ 111 tc_3000_500_imask = *(volatile u_int32_t *)TC_3000_500_IMR_READ; 112 for (i = 0; i < TC_3000_500_NCOOKIES; i++) 113 tc_3000_500_imask |= tc_3000_500_intrbits[i]; 114 *(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 115 tc_mb(); 116 117 /* 118 * Set up interrupt handlers. 119 */ 120 for (i = 0; i < TC_3000_500_NCOOKIES; i++) { 121 tc_3000_500_intr[i].tci_func = tc_3000_500_intrnull; 122 tc_3000_500_intr[i].tci_arg = (void *)i; 123 } 124 } 125 126 void 127 tc_3000_500_intr_establish(tcadev, cookie, level, func, arg) 128 struct device *tcadev; 129 void *cookie, *arg; 130 tc_intrlevel_t level; 131 int (*func) __P((void *)); 132 { 133 u_long dev = (u_long)cookie; 134 135 #ifdef DIAGNOSTIC 136 /* XXX bounds-check cookie. */ 137 #endif 138 139 if (tc_3000_500_intr[dev].tci_func != tc_3000_500_intrnull) 140 panic("tc_3000_500_intr_establish: cookie %d twice", dev); 141 142 tc_3000_500_intr[dev].tci_func = func; 143 tc_3000_500_intr[dev].tci_arg = arg; 144 145 tc_3000_500_imask &= ~tc_3000_500_intrbits[dev]; 146 *(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 147 tc_mb(); 148 } 149 150 void 151 tc_3000_500_intr_disestablish(tcadev, cookie) 152 struct device *tcadev; 153 void *cookie; 154 { 155 u_long dev = (u_long)cookie; 156 157 #ifdef DIAGNOSTIC 158 /* XXX bounds-check cookie. */ 159 #endif 160 161 if (tc_3000_500_intr[dev].tci_func == tc_3000_500_intrnull) 162 panic("tc_3000_500_intr_disestablish: cookie %d bad intr", 163 dev); 164 165 tc_3000_500_imask |= tc_3000_500_intrbits[dev]; 166 *(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 167 tc_mb(); 168 169 tc_3000_500_intr[dev].tci_func = tc_3000_500_intrnull; 170 tc_3000_500_intr[dev].tci_arg = (void *)dev; 171 } 172 173 int 174 tc_3000_500_intrnull(val) 175 void *val; 176 { 177 178 panic("tc_3000_500_intrnull: uncaught TC intr for cookie %ld\n", 179 (u_long)val); 180 } 181 182 void 183 tc_3000_500_iointr(framep, vec) 184 void *framep; 185 unsigned long vec; 186 { 187 u_int32_t ir; 188 int ifound; 189 190 #ifdef DIAGNOSTIC 191 int s; 192 if (vec != 0x800) 193 panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec); 194 s = splhigh(); 195 if (s != ALPHA_PSL_IPL_IO) 196 panic("INVALID ASSUMPTION: IPL %d, not %d", s, 197 ALPHA_PSL_IPL_IO); 198 splx(s); 199 #endif 200 201 do { 202 tc_syncbus(); 203 ir = *(volatile u_int32_t *)TC_3000_500_IR_CLEAR; 204 205 /* Ignore interrupts that we haven't enabled. */ 206 ir &= ~(tc_3000_500_imask & 0x1ff); 207 208 ifound = 0; 209 210 #ifdef EVCNT_COUNTERS 211 /* No interrupt counting via evcnt counters */ 212 XXX BREAK HERE XXX 213 #else /* !EVCNT_COUNTERS */ 214 #define INCRINTRCNT(slot) intrcnt[INTRCNT_KN15 + slot]++ 215 #endif /* EVCNT_COUNTERS */ 216 217 #define CHECKINTR(slot) \ 218 if (ir & tc_3000_500_intrbits[slot]) { \ 219 ifound = 1; \ 220 INCRINTRCNT(slot); \ 221 (*tc_3000_500_intr[slot].tci_func) \ 222 (tc_3000_500_intr[slot].tci_arg); \ 223 } 224 /* Do them in order of priority; highest slot # first. */ 225 CHECKINTR(TC_3000_500_DEV_CXTURBO); 226 CHECKINTR(TC_3000_500_DEV_IOASIC); 227 CHECKINTR(TC_3000_500_DEV_TCDS); 228 CHECKINTR(TC_3000_500_DEV_OPT5); 229 CHECKINTR(TC_3000_500_DEV_OPT4); 230 CHECKINTR(TC_3000_500_DEV_OPT3); 231 CHECKINTR(TC_3000_500_DEV_OPT2); 232 CHECKINTR(TC_3000_500_DEV_OPT1); 233 CHECKINTR(TC_3000_500_DEV_OPT0); 234 #undef CHECKINTR 235 236 #ifdef DIAGNOSTIC 237 #define PRINTINTR(msg, bits) \ 238 if (ir & bits) \ 239 printf(msg); 240 PRINTINTR("Second error occurred\n", TC_3000_500_IR_ERR2); 241 PRINTINTR("DMA buffer error\n", TC_3000_500_IR_DMABE); 242 PRINTINTR("DMA cross 2K boundary\n", TC_3000_500_IR_DMA2K); 243 PRINTINTR("TC reset in progress\n", TC_3000_500_IR_TCRESET); 244 PRINTINTR("TC parity error\n", TC_3000_500_IR_TCPAR); 245 PRINTINTR("DMA tag error\n", TC_3000_500_IR_DMATAG); 246 PRINTINTR("Single-bit error\n", TC_3000_500_IR_DMASBE); 247 PRINTINTR("Double-bit error\n", TC_3000_500_IR_DMADBE); 248 PRINTINTR("TC I/O timeout\n", TC_3000_500_IR_TCTIMEOUT); 249 PRINTINTR("DMA block too long\n", TC_3000_500_IR_DMABLOCK); 250 PRINTINTR("Invalid I/O address\n", TC_3000_500_IR_IOADDR); 251 PRINTINTR("DMA scatter/gather invalid\n", TC_3000_500_IR_DMASG); 252 PRINTINTR("Scatter/gather parity error\n", 253 TC_3000_500_IR_SGPAR); 254 #undef PRINTINTR 255 #endif 256 } while (ifound); 257 } 258 259 #if 0 260 /* 261 * tc_3000_500_ioslot -- 262 * Set the PBS bits for devices on the TC. 263 */ 264 void 265 tc_3000_500_ioslot(slot, flags, set) 266 u_int32_t slot, flags; 267 int set; 268 { 269 volatile u_int32_t *iosp; 270 u_int32_t ios; 271 int s; 272 273 iosp = (volatile u_int32_t *)TC_3000_500_IOSLOT; 274 ios = *iosp; 275 flags <<= (slot * 3); 276 if (set) 277 ios |= flags; 278 else 279 ios &= ~flags; 280 s = splhigh(); 281 *iosp = ios; 282 tc_mb(); 283 splx(s); 284 } 285 #endif 286
Indexes created Thu Oct 02 14:10:14 GMT 2025