tc_3000_500.c revision 1.13
1 /* $NetBSD: tc_3000_500.c,v 1.13 1997/04/06 22:32:02 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <machine/options.h> /* Pull in config options headers */ 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/device.h> 35 36 #include <machine/autoconf.h> 37 #include <machine/pte.h> 38 #ifndef EVCNT_COUNTERS 39 #include <machine/intrcnt.h> 40 #endif 41 42 #include <dev/tc/tcvar.h> 43 #include <alpha/tc/tc_conf.h> 44 #include <alpha/tc/tc_3000_500.h> 45 46 void tc_3000_500_intr_setup __P((void)); 47 void tc_3000_500_intr_establish __P((struct device *, void *, 48 tc_intrlevel_t, int (*)(void *), void *)); 49 void tc_3000_500_intr_disestablish __P((struct device *, void *)); 50 void tc_3000_500_iointr __P((void *, unsigned long)); 51 52 int tc_3000_500_intrnull __P((void *)); 53 54 #define C(x) ((void *)(u_long)x) 55 #define KV(x) (ALPHA_PHYS_TO_K0SEG(x)) 56 57 struct tc_slotdesc tc_3000_500_slots[] = { 58 { KV(0x100000000), C(TC_3000_500_DEV_OPT0), }, /* 0 - opt slot 0 */ 59 { KV(0x120000000), C(TC_3000_500_DEV_OPT1), }, /* 1 - opt slot 1 */ 60 { KV(0x140000000), C(TC_3000_500_DEV_OPT2), }, /* 2 - opt slot 2 */ 61 { KV(0x160000000), C(TC_3000_500_DEV_OPT3), }, /* 3 - opt slot 3 */ 62 { KV(0x180000000), C(TC_3000_500_DEV_OPT4), }, /* 4 - opt slot 4 */ 63 { KV(0x1a0000000), C(TC_3000_500_DEV_OPT5), }, /* 5 - opt slot 5 */ 64 { KV(0x1c0000000), C(TC_3000_500_DEV_BOGUS), }, /* 6 - TCDS ASIC */ 65 { KV(0x1e0000000), C(TC_3000_500_DEV_BOGUS), }, /* 7 - IOCTL ASIC */ 66 }; 67 int tc_3000_500_nslots = 68 sizeof(tc_3000_500_slots) / sizeof(tc_3000_500_slots[0]); 69 70 struct tc_builtin tc_3000_500_graphics_builtins[] = { 71 { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), }, 72 { "PMAGB-BA", 7, 0x02000000, C(TC_3000_500_DEV_CXTURBO), }, 73 { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), }, 74 }; 75 int tc_3000_500_graphics_nbuiltins = sizeof(tc_3000_500_graphics_builtins) / 76 sizeof(tc_3000_500_graphics_builtins[0]); 77 78 struct tc_builtin tc_3000_500_nographics_builtins[] = { 79 { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), }, 80 { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), }, 81 }; 82 int tc_3000_500_nographics_nbuiltins = sizeof(tc_3000_500_nographics_builtins) / 83 sizeof(tc_3000_500_nographics_builtins[0]); 84 85 u_int32_t tc_3000_500_intrbits[TC_3000_500_NCOOKIES] = { 86 TC_3000_500_IR_OPT0, 87 TC_3000_500_IR_OPT1, 88 TC_3000_500_IR_OPT2, 89 TC_3000_500_IR_OPT3, 90 TC_3000_500_IR_OPT4, 91 TC_3000_500_IR_OPT5, 92 TC_3000_500_IR_TCDS, 93 TC_3000_500_IR_IOASIC, 94 TC_3000_500_IR_CXTURBO, 95 }; 96 97 struct tcintr { 98 int (*tci_func) __P((void *)); 99 void *tci_arg; 100 } tc_3000_500_intr[TC_3000_500_NCOOKIES]; 101 102 u_int32_t tc_3000_500_imask; /* intrs we want to ignore; mirrors IMR. */ 103 104 void 105 tc_3000_500_intr_setup() 106 { 107 u_long i; 108 109 /* 110 * Disable all slot interrupts. Note that this cannot 111 * actually disable CXTurbo, TCDS, and IOASIC interrupts. 112 */ 113 tc_3000_500_imask = *(volatile u_int32_t *)TC_3000_500_IMR_READ; 114 for (i = 0; i < TC_3000_500_NCOOKIES; i++) 115 tc_3000_500_imask |= tc_3000_500_intrbits[i]; 116 *(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 117 tc_mb(); 118 119 /* 120 * Set up interrupt handlers. 121 */ 122 for (i = 0; i < TC_3000_500_NCOOKIES; i++) { 123 tc_3000_500_intr[i].tci_func = tc_3000_500_intrnull; 124 tc_3000_500_intr[i].tci_arg = (void *)i; 125 } 126 } 127 128 void 129 tc_3000_500_intr_establish(tcadev, cookie, level, func, arg) 130 struct device *tcadev; 131 void *cookie, *arg; 132 tc_intrlevel_t level; 133 int (*func) __P((void *)); 134 { 135 u_long dev = (u_long)cookie; 136 137 #ifdef DIAGNOSTIC 138 /* XXX bounds-check cookie. */ 139 #endif 140 141 if (tc_3000_500_intr[dev].tci_func != tc_3000_500_intrnull) 142 panic("tc_3000_500_intr_establish: cookie %d twice", dev); 143 144 tc_3000_500_intr[dev].tci_func = func; 145 tc_3000_500_intr[dev].tci_arg = arg; 146 147 tc_3000_500_imask &= ~tc_3000_500_intrbits[dev]; 148 *(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 149 tc_mb(); 150 } 151 152 void 153 tc_3000_500_intr_disestablish(tcadev, cookie) 154 struct device *tcadev; 155 void *cookie; 156 { 157 u_long dev = (u_long)cookie; 158 159 #ifdef DIAGNOSTIC 160 /* XXX bounds-check cookie. */ 161 #endif 162 163 if (tc_3000_500_intr[dev].tci_func == tc_3000_500_intrnull) 164 panic("tc_3000_500_intr_disestablish: cookie %d bad intr", 165 dev); 166 167 tc_3000_500_imask |= tc_3000_500_intrbits[dev]; 168 *(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 169 tc_mb(); 170 171 tc_3000_500_intr[dev].tci_func = tc_3000_500_intrnull; 172 tc_3000_500_intr[dev].tci_arg = (void *)dev; 173 } 174 175 int 176 tc_3000_500_intrnull(val) 177 void *val; 178 { 179 180 panic("tc_3000_500_intrnull: uncaught TC intr for cookie %ld\n", 181 (u_long)val); 182 } 183 184 void 185 tc_3000_500_iointr(framep, vec) 186 void *framep; 187 unsigned long vec; 188 { 189 u_int32_t ir; 190 int ifound; 191 192 #ifdef DIAGNOSTIC 193 int s; 194 if (vec != 0x800) 195 panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec); 196 s = splhigh(); 197 if (s != ALPHA_PSL_IPL_IO) 198 panic("INVALID ASSUMPTION: IPL %d, not %d", s, 199 ALPHA_PSL_IPL_IO); 200 splx(s); 201 #endif 202 203 do { 204 tc_syncbus(); 205 ir = *(volatile u_int32_t *)TC_3000_500_IR_CLEAR; 206 207 /* Ignore interrupts that we haven't enabled. */ 208 ir &= ~(tc_3000_500_imask & 0x1ff); 209 210 ifound = 0; 211 212 #ifdef EVCNT_COUNTERS 213 /* No interrupt counting via evcnt counters */ 214 XXX BREAK HERE XXX 215 #else /* !EVCNT_COUNTERS */ 216 #define INCRINTRCNT(slot) intrcnt[INTRCNT_KN15 + slot]++ 217 #endif /* EVCNT_COUNTERS */ 218 219 #define CHECKINTR(slot) \ 220 if (ir & tc_3000_500_intrbits[slot]) { \ 221 ifound = 1; \ 222 INCRINTRCNT(slot); \ 223 (*tc_3000_500_intr[slot].tci_func) \ 224 (tc_3000_500_intr[slot].tci_arg); \ 225 } 226 /* Do them in order of priority; highest slot # first. */ 227 CHECKINTR(TC_3000_500_DEV_CXTURBO); 228 CHECKINTR(TC_3000_500_DEV_IOASIC); 229 CHECKINTR(TC_3000_500_DEV_TCDS); 230 CHECKINTR(TC_3000_500_DEV_OPT5); 231 CHECKINTR(TC_3000_500_DEV_OPT4); 232 CHECKINTR(TC_3000_500_DEV_OPT3); 233 CHECKINTR(TC_3000_500_DEV_OPT2); 234 CHECKINTR(TC_3000_500_DEV_OPT1); 235 CHECKINTR(TC_3000_500_DEV_OPT0); 236 #undef CHECKINTR 237 238 #ifdef DIAGNOSTIC 239 #define PRINTINTR(msg, bits) \ 240 if (ir & bits) \ 241 printf(msg); 242 PRINTINTR("Second error occurred\n", TC_3000_500_IR_ERR2); 243 PRINTINTR("DMA buffer error\n", TC_3000_500_IR_DMABE); 244 PRINTINTR("DMA cross 2K boundary\n", TC_3000_500_IR_DMA2K); 245 PRINTINTR("TC reset in progress\n", TC_3000_500_IR_TCRESET); 246 PRINTINTR("TC parity error\n", TC_3000_500_IR_TCPAR); 247 PRINTINTR("DMA tag error\n", TC_3000_500_IR_DMATAG); 248 PRINTINTR("Single-bit error\n", TC_3000_500_IR_DMASBE); 249 PRINTINTR("Double-bit error\n", TC_3000_500_IR_DMADBE); 250 PRINTINTR("TC I/O timeout\n", TC_3000_500_IR_TCTIMEOUT); 251 PRINTINTR("DMA block too long\n", TC_3000_500_IR_DMABLOCK); 252 PRINTINTR("Invalid I/O address\n", TC_3000_500_IR_IOADDR); 253 PRINTINTR("DMA scatter/gather invalid\n", TC_3000_500_IR_DMASG); 254 PRINTINTR("Scatter/gather parity error\n", 255 TC_3000_500_IR_SGPAR); 256 #undef PRINTINTR 257 #endif 258 } while (ifound); 259 } 260 261 #if 0 262 /* 263 * tc_3000_500_ioslot -- 264 * Set the PBS bits for devices on the TC. 265 */ 266 void 267 tc_3000_500_ioslot(slot, flags, set) 268 u_int32_t slot, flags; 269 int set; 270 { 271 volatile u_int32_t *iosp; 272 u_int32_t ios; 273 int s; 274 275 iosp = (volatile u_int32_t *)TC_3000_500_IOSLOT; 276 ios = *iosp; 277 flags <<= (slot * 3); 278 if (set) 279 ios |= flags; 280 else 281 ios &= ~flags; 282 s = splhigh(); 283 *iosp = ios; 284 tc_mb(); 285 splx(s); 286 } 287 #endif 288
Indexes created Thu Oct 02 10:09:58 GMT 2025