tc_3000_500.c revision 1.14
1 /* $NetBSD: tc_3000_500.c,v 1.14 1997/04/07 23:40:58 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <machine/options.h> /* Config options headers */ 31 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 32 33 __KERNEL_RCSID(0, "$NetBSD: tc_3000_500.c,v 1.14 1997/04/07 23:40:58 cgd Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/device.h> 38 39 #include <machine/autoconf.h> 40 #include <machine/pte.h> 41 #ifndef EVCNT_COUNTERS 42 #include <machine/intrcnt.h> 43 #endif 44 45 #include <dev/tc/tcvar.h> 46 #include <alpha/tc/tc_conf.h> 47 #include <alpha/tc/tc_3000_500.h> 48 49 void tc_3000_500_intr_setup __P((void)); 50 void tc_3000_500_intr_establish __P((struct device *, void *, 51 tc_intrlevel_t, int (*)(void *), void *)); 52 void tc_3000_500_intr_disestablish __P((struct device *, void *)); 53 void tc_3000_500_iointr __P((void *, unsigned long)); 54 55 int tc_3000_500_intrnull __P((void *)); 56 57 #define C(x) ((void *)(u_long)x) 58 #define KV(x) (ALPHA_PHYS_TO_K0SEG(x)) 59 60 struct tc_slotdesc tc_3000_500_slots[] = { 61 { KV(0x100000000), C(TC_3000_500_DEV_OPT0), }, /* 0 - opt slot 0 */ 62 { KV(0x120000000), C(TC_3000_500_DEV_OPT1), }, /* 1 - opt slot 1 */ 63 { KV(0x140000000), C(TC_3000_500_DEV_OPT2), }, /* 2 - opt slot 2 */ 64 { KV(0x160000000), C(TC_3000_500_DEV_OPT3), }, /* 3 - opt slot 3 */ 65 { KV(0x180000000), C(TC_3000_500_DEV_OPT4), }, /* 4 - opt slot 4 */ 66 { KV(0x1a0000000), C(TC_3000_500_DEV_OPT5), }, /* 5 - opt slot 5 */ 67 { KV(0x1c0000000), C(TC_3000_500_DEV_BOGUS), }, /* 6 - TCDS ASIC */ 68 { KV(0x1e0000000), C(TC_3000_500_DEV_BOGUS), }, /* 7 - IOCTL ASIC */ 69 }; 70 int tc_3000_500_nslots = 71 sizeof(tc_3000_500_slots) / sizeof(tc_3000_500_slots[0]); 72 73 struct tc_builtin tc_3000_500_graphics_builtins[] = { 74 { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), }, 75 { "PMAGB-BA", 7, 0x02000000, C(TC_3000_500_DEV_CXTURBO), }, 76 { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), }, 77 }; 78 int tc_3000_500_graphics_nbuiltins = sizeof(tc_3000_500_graphics_builtins) / 79 sizeof(tc_3000_500_graphics_builtins[0]); 80 81 struct tc_builtin tc_3000_500_nographics_builtins[] = { 82 { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), }, 83 { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), }, 84 }; 85 int tc_3000_500_nographics_nbuiltins = sizeof(tc_3000_500_nographics_builtins) / 86 sizeof(tc_3000_500_nographics_builtins[0]); 87 88 u_int32_t tc_3000_500_intrbits[TC_3000_500_NCOOKIES] = { 89 TC_3000_500_IR_OPT0, 90 TC_3000_500_IR_OPT1, 91 TC_3000_500_IR_OPT2, 92 TC_3000_500_IR_OPT3, 93 TC_3000_500_IR_OPT4, 94 TC_3000_500_IR_OPT5, 95 TC_3000_500_IR_TCDS, 96 TC_3000_500_IR_IOASIC, 97 TC_3000_500_IR_CXTURBO, 98 }; 99 100 struct tcintr { 101 int (*tci_func) __P((void *)); 102 void *tci_arg; 103 } tc_3000_500_intr[TC_3000_500_NCOOKIES]; 104 105 u_int32_t tc_3000_500_imask; /* intrs we want to ignore; mirrors IMR. */ 106 107 void 108 tc_3000_500_intr_setup() 109 { 110 u_long i; 111 112 /* 113 * Disable all slot interrupts. Note that this cannot 114 * actually disable CXTurbo, TCDS, and IOASIC interrupts. 115 */ 116 tc_3000_500_imask = *(volatile u_int32_t *)TC_3000_500_IMR_READ; 117 for (i = 0; i < TC_3000_500_NCOOKIES; i++) 118 tc_3000_500_imask |= tc_3000_500_intrbits[i]; 119 *(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 120 tc_mb(); 121 122 /* 123 * Set up interrupt handlers. 124 */ 125 for (i = 0; i < TC_3000_500_NCOOKIES; i++) { 126 tc_3000_500_intr[i].tci_func = tc_3000_500_intrnull; 127 tc_3000_500_intr[i].tci_arg = (void *)i; 128 } 129 } 130 131 void 132 tc_3000_500_intr_establish(tcadev, cookie, level, func, arg) 133 struct device *tcadev; 134 void *cookie, *arg; 135 tc_intrlevel_t level; 136 int (*func) __P((void *)); 137 { 138 u_long dev = (u_long)cookie; 139 140 #ifdef DIAGNOSTIC 141 /* XXX bounds-check cookie. */ 142 #endif 143 144 if (tc_3000_500_intr[dev].tci_func != tc_3000_500_intrnull) 145 panic("tc_3000_500_intr_establish: cookie %d twice", dev); 146 147 tc_3000_500_intr[dev].tci_func = func; 148 tc_3000_500_intr[dev].tci_arg = arg; 149 150 tc_3000_500_imask &= ~tc_3000_500_intrbits[dev]; 151 *(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 152 tc_mb(); 153 } 154 155 void 156 tc_3000_500_intr_disestablish(tcadev, cookie) 157 struct device *tcadev; 158 void *cookie; 159 { 160 u_long dev = (u_long)cookie; 161 162 #ifdef DIAGNOSTIC 163 /* XXX bounds-check cookie. */ 164 #endif 165 166 if (tc_3000_500_intr[dev].tci_func == tc_3000_500_intrnull) 167 panic("tc_3000_500_intr_disestablish: cookie %d bad intr", 168 dev); 169 170 tc_3000_500_imask |= tc_3000_500_intrbits[dev]; 171 *(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 172 tc_mb(); 173 174 tc_3000_500_intr[dev].tci_func = tc_3000_500_intrnull; 175 tc_3000_500_intr[dev].tci_arg = (void *)dev; 176 } 177 178 int 179 tc_3000_500_intrnull(val) 180 void *val; 181 { 182 183 panic("tc_3000_500_intrnull: uncaught TC intr for cookie %ld\n", 184 (u_long)val); 185 } 186 187 void 188 tc_3000_500_iointr(framep, vec) 189 void *framep; 190 unsigned long vec; 191 { 192 u_int32_t ir; 193 int ifound; 194 195 #ifdef DIAGNOSTIC 196 int s; 197 if (vec != 0x800) 198 panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec); 199 s = splhigh(); 200 if (s != ALPHA_PSL_IPL_IO) 201 panic("INVALID ASSUMPTION: IPL %d, not %d", s, 202 ALPHA_PSL_IPL_IO); 203 splx(s); 204 #endif 205 206 do { 207 tc_syncbus(); 208 ir = *(volatile u_int32_t *)TC_3000_500_IR_CLEAR; 209 210 /* Ignore interrupts that we haven't enabled. */ 211 ir &= ~(tc_3000_500_imask & 0x1ff); 212 213 ifound = 0; 214 215 #ifdef EVCNT_COUNTERS 216 /* No interrupt counting via evcnt counters */ 217 XXX BREAK HERE XXX 218 #else /* !EVCNT_COUNTERS */ 219 #define INCRINTRCNT(slot) intrcnt[INTRCNT_KN15 + slot]++ 220 #endif /* EVCNT_COUNTERS */ 221 222 #define CHECKINTR(slot) \ 223 if (ir & tc_3000_500_intrbits[slot]) { \ 224 ifound = 1; \ 225 INCRINTRCNT(slot); \ 226 (*tc_3000_500_intr[slot].tci_func) \ 227 (tc_3000_500_intr[slot].tci_arg); \ 228 } 229 /* Do them in order of priority; highest slot # first. */ 230 CHECKINTR(TC_3000_500_DEV_CXTURBO); 231 CHECKINTR(TC_3000_500_DEV_IOASIC); 232 CHECKINTR(TC_3000_500_DEV_TCDS); 233 CHECKINTR(TC_3000_500_DEV_OPT5); 234 CHECKINTR(TC_3000_500_DEV_OPT4); 235 CHECKINTR(TC_3000_500_DEV_OPT3); 236 CHECKINTR(TC_3000_500_DEV_OPT2); 237 CHECKINTR(TC_3000_500_DEV_OPT1); 238 CHECKINTR(TC_3000_500_DEV_OPT0); 239 #undef CHECKINTR 240 241 #ifdef DIAGNOSTIC 242 #define PRINTINTR(msg, bits) \ 243 if (ir & bits) \ 244 printf(msg); 245 PRINTINTR("Second error occurred\n", TC_3000_500_IR_ERR2); 246 PRINTINTR("DMA buffer error\n", TC_3000_500_IR_DMABE); 247 PRINTINTR("DMA cross 2K boundary\n", TC_3000_500_IR_DMA2K); 248 PRINTINTR("TC reset in progress\n", TC_3000_500_IR_TCRESET); 249 PRINTINTR("TC parity error\n", TC_3000_500_IR_TCPAR); 250 PRINTINTR("DMA tag error\n", TC_3000_500_IR_DMATAG); 251 PRINTINTR("Single-bit error\n", TC_3000_500_IR_DMASBE); 252 PRINTINTR("Double-bit error\n", TC_3000_500_IR_DMADBE); 253 PRINTINTR("TC I/O timeout\n", TC_3000_500_IR_TCTIMEOUT); 254 PRINTINTR("DMA block too long\n", TC_3000_500_IR_DMABLOCK); 255 PRINTINTR("Invalid I/O address\n", TC_3000_500_IR_IOADDR); 256 PRINTINTR("DMA scatter/gather invalid\n", TC_3000_500_IR_DMASG); 257 PRINTINTR("Scatter/gather parity error\n", 258 TC_3000_500_IR_SGPAR); 259 #undef PRINTINTR 260 #endif 261 } while (ifound); 262 } 263 264 #if 0 265 /* 266 * tc_3000_500_ioslot -- 267 * Set the PBS bits for devices on the TC. 268 */ 269 void 270 tc_3000_500_ioslot(slot, flags, set) 271 u_int32_t slot, flags; 272 int set; 273 { 274 volatile u_int32_t *iosp; 275 u_int32_t ios; 276 int s; 277 278 iosp = (volatile u_int32_t *)TC_3000_500_IOSLOT; 279 ios = *iosp; 280 flags <<= (slot * 3); 281 if (set) 282 ios |= flags; 283 else 284 ios &= ~flags; 285 s = splhigh(); 286 *iosp = ios; 287 tc_mb(); 288 splx(s); 289 } 290 #endif 291
Indexes created Thu Oct 02 10:09:58 GMT 2025