tc_3000_500.c revision 1.27
1 /* $NetBSD: tc_3000_500.c,v 1.27 2009/03/14 15:36:00 dsl Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 31 32 __KERNEL_RCSID(0, "$NetBSD: tc_3000_500.c,v 1.27 2009/03/14 15:36:00 dsl Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/device.h> 37 #include <sys/malloc.h> 38 39 #include <machine/autoconf.h> 40 #include <machine/pte.h> 41 #include <machine/rpb.h> 42 43 #include <dev/tc/tcvar.h> 44 #include <alpha/tc/tc_conf.h> 45 #include <alpha/tc/tc_3000_500.h> 46 47 #include "wsdisplay.h" 48 #include "sfb.h" 49 50 #if NSFB > 0 51 extern int sfb_cnattach(tc_addr_t); 52 #endif 53 54 void tc_3000_500_intr_setup(void); 55 void tc_3000_500_intr_establish(struct device *, void *, 56 tc_intrlevel_t, int (*)(void *), void *); 57 void tc_3000_500_intr_disestablish(struct device *, void *); 58 void tc_3000_500_iointr(void *, unsigned long); 59 60 int tc_3000_500_intrnull(void *); 61 int tc_3000_500_fb_cnattach(u_int64_t); 62 63 #define C(x) ((void *)(u_long)x) 64 #define KV(x) (ALPHA_PHYS_TO_K0SEG(x)) 65 66 struct tc_slotdesc tc_3000_500_slots[] = { 67 { KV(0x100000000), C(TC_3000_500_DEV_OPT0), }, /* 0 - opt slot 0 */ 68 { KV(0x120000000), C(TC_3000_500_DEV_OPT1), }, /* 1 - opt slot 1 */ 69 { KV(0x140000000), C(TC_3000_500_DEV_OPT2), }, /* 2 - opt slot 2 */ 70 { KV(0x160000000), C(TC_3000_500_DEV_OPT3), }, /* 3 - opt slot 3 */ 71 { KV(0x180000000), C(TC_3000_500_DEV_OPT4), }, /* 4 - opt slot 4 */ 72 { KV(0x1a0000000), C(TC_3000_500_DEV_OPT5), }, /* 5 - opt slot 5 */ 73 { KV(0x1c0000000), C(TC_3000_500_DEV_BOGUS), }, /* 6 - TCDS ASIC */ 74 { KV(0x1e0000000), C(TC_3000_500_DEV_BOGUS), }, /* 7 - IOCTL ASIC */ 75 }; 76 int tc_3000_500_nslots = 77 sizeof(tc_3000_500_slots) / sizeof(tc_3000_500_slots[0]); 78 79 struct tc_builtin tc_3000_500_graphics_builtins[] = { 80 { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), }, 81 { "PMAGB-BA", 7, 0x02000000, C(TC_3000_500_DEV_CXTURBO), }, 82 { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), }, 83 }; 84 int tc_3000_500_graphics_nbuiltins = sizeof(tc_3000_500_graphics_builtins) / 85 sizeof(tc_3000_500_graphics_builtins[0]); 86 87 struct tc_builtin tc_3000_500_nographics_builtins[] = { 88 { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), }, 89 { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), }, 90 }; 91 int tc_3000_500_nographics_nbuiltins = sizeof(tc_3000_500_nographics_builtins) / 92 sizeof(tc_3000_500_nographics_builtins[0]); 93 94 u_int32_t tc_3000_500_intrbits[TC_3000_500_NCOOKIES] = { 95 TC_3000_500_IR_OPT0, 96 TC_3000_500_IR_OPT1, 97 TC_3000_500_IR_OPT2, 98 TC_3000_500_IR_OPT3, 99 TC_3000_500_IR_OPT4, 100 TC_3000_500_IR_OPT5, 101 TC_3000_500_IR_TCDS, 102 TC_3000_500_IR_IOASIC, 103 TC_3000_500_IR_CXTURBO, 104 }; 105 106 struct tcintr { 107 int (*tci_func)(void *); 108 void *tci_arg; 109 struct evcnt tci_evcnt; 110 } tc_3000_500_intr[TC_3000_500_NCOOKIES]; 111 112 u_int32_t tc_3000_500_imask; /* intrs we want to ignore; mirrors IMR. */ 113 114 void 115 tc_3000_500_intr_setup() 116 { 117 char *cp; 118 u_long i; 119 120 /* 121 * Disable all slot interrupts. Note that this cannot 122 * actually disable CXTurbo, TCDS, and IOASIC interrupts. 123 */ 124 tc_3000_500_imask = *(volatile u_int32_t *)TC_3000_500_IMR_READ; 125 for (i = 0; i < TC_3000_500_NCOOKIES; i++) 126 tc_3000_500_imask |= tc_3000_500_intrbits[i]; 127 *(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 128 tc_mb(); 129 130 /* 131 * Set up interrupt handlers. 132 */ 133 for (i = 0; i < TC_3000_500_NCOOKIES; i++) { 134 tc_3000_500_intr[i].tci_func = tc_3000_500_intrnull; 135 tc_3000_500_intr[i].tci_arg = (void *)i; 136 137 cp = malloc(12, M_DEVBUF, M_NOWAIT); 138 if (cp == NULL) 139 panic("tc_3000_500_intr_setup"); 140 sprintf(cp, "slot %lu", i); 141 evcnt_attach_dynamic(&tc_3000_500_intr[i].tci_evcnt, 142 EVCNT_TYPE_INTR, NULL, "tc", cp); 143 } 144 } 145 146 const struct evcnt * 147 tc_3000_500_intr_evcnt(struct device *tcadev, void *cookie) 148 { 149 u_long dev = (u_long)cookie; 150 151 #ifdef DIAGNOSTIC 152 /* XXX bounds-check cookie. */ 153 #endif 154 155 return (&tc_3000_500_intr[dev].tci_evcnt); 156 } 157 158 void 159 tc_3000_500_intr_establish(tcadev, cookie, level, func, arg) 160 struct device *tcadev; 161 void *cookie, *arg; 162 tc_intrlevel_t level; 163 int (*func)(void *); 164 { 165 u_long dev = (u_long)cookie; 166 167 #ifdef DIAGNOSTIC 168 /* XXX bounds-check cookie. */ 169 #endif 170 171 if (tc_3000_500_intr[dev].tci_func != tc_3000_500_intrnull) 172 panic("tc_3000_500_intr_establish: cookie %lu twice", dev); 173 174 tc_3000_500_intr[dev].tci_func = func; 175 tc_3000_500_intr[dev].tci_arg = arg; 176 177 tc_3000_500_imask &= ~tc_3000_500_intrbits[dev]; 178 *(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 179 tc_mb(); 180 } 181 182 void 183 tc_3000_500_intr_disestablish(struct device *tcadev, void *cookie) 184 { 185 u_long dev = (u_long)cookie; 186 187 #ifdef DIAGNOSTIC 188 /* XXX bounds-check cookie. */ 189 #endif 190 191 if (tc_3000_500_intr[dev].tci_func == tc_3000_500_intrnull) 192 panic("tc_3000_500_intr_disestablish: cookie %lu bad intr", 193 dev); 194 195 tc_3000_500_imask |= tc_3000_500_intrbits[dev]; 196 *(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 197 tc_mb(); 198 199 tc_3000_500_intr[dev].tci_func = tc_3000_500_intrnull; 200 tc_3000_500_intr[dev].tci_arg = (void *)dev; 201 } 202 203 int 204 tc_3000_500_intrnull(void *val) 205 { 206 207 panic("tc_3000_500_intrnull: uncaught TC intr for cookie %ld", 208 (u_long)val); 209 } 210 211 void 212 tc_3000_500_iointr(void *arg, unsigned long vec) 213 { 214 u_int32_t ir; 215 int ifound; 216 217 #ifdef DIAGNOSTIC 218 int s; 219 if (vec != 0x800) 220 panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec); 221 s = splhigh(); 222 if (s != ALPHA_PSL_IPL_IO) 223 panic("INVALID ASSUMPTION: IPL %d, not %d", s, 224 ALPHA_PSL_IPL_IO); 225 splx(s); 226 #endif 227 228 do { 229 tc_syncbus(); 230 ir = *(volatile u_int32_t *)TC_3000_500_IR_CLEAR; 231 232 /* Ignore interrupts that we haven't enabled. */ 233 ir &= ~(tc_3000_500_imask & 0x1ff); 234 235 ifound = 0; 236 237 #define INCRINTRCNT(slot) tc_3000_500_intr[slot].tci_evcnt.ev_count++ 238 239 #define CHECKINTR(slot) \ 240 if (ir & tc_3000_500_intrbits[slot]) { \ 241 ifound = 1; \ 242 INCRINTRCNT(slot); \ 243 (*tc_3000_500_intr[slot].tci_func) \ 244 (tc_3000_500_intr[slot].tci_arg); \ 245 } 246 /* Do them in order of priority; highest slot # first. */ 247 CHECKINTR(TC_3000_500_DEV_CXTURBO); 248 CHECKINTR(TC_3000_500_DEV_IOASIC); 249 CHECKINTR(TC_3000_500_DEV_TCDS); 250 CHECKINTR(TC_3000_500_DEV_OPT5); 251 CHECKINTR(TC_3000_500_DEV_OPT4); 252 CHECKINTR(TC_3000_500_DEV_OPT3); 253 CHECKINTR(TC_3000_500_DEV_OPT2); 254 CHECKINTR(TC_3000_500_DEV_OPT1); 255 CHECKINTR(TC_3000_500_DEV_OPT0); 256 #undef CHECKINTR 257 258 #ifdef DIAGNOSTIC 259 #define PRINTINTR(msg, bits) \ 260 if (ir & bits) \ 261 printf(msg); 262 PRINTINTR("Second error occurred\n", TC_3000_500_IR_ERR2); 263 PRINTINTR("DMA buffer error\n", TC_3000_500_IR_DMABE); 264 PRINTINTR("DMA cross 2K boundary\n", TC_3000_500_IR_DMA2K); 265 PRINTINTR("TC reset in progress\n", TC_3000_500_IR_TCRESET); 266 PRINTINTR("TC parity error\n", TC_3000_500_IR_TCPAR); 267 PRINTINTR("DMA tag error\n", TC_3000_500_IR_DMATAG); 268 PRINTINTR("Single-bit error\n", TC_3000_500_IR_DMASBE); 269 PRINTINTR("Double-bit error\n", TC_3000_500_IR_DMADBE); 270 PRINTINTR("TC I/O timeout\n", TC_3000_500_IR_TCTIMEOUT); 271 PRINTINTR("DMA block too long\n", TC_3000_500_IR_DMABLOCK); 272 PRINTINTR("Invalid I/O address\n", TC_3000_500_IR_IOADDR); 273 PRINTINTR("DMA scatter/gather invalid\n", TC_3000_500_IR_DMASG); 274 PRINTINTR("Scatter/gather parity error\n", 275 TC_3000_500_IR_SGPAR); 276 #undef PRINTINTR 277 #endif 278 } while (ifound); 279 } 280 281 #if NWSDISPLAY > 0 282 /* 283 * tc_3000_500_fb_cnattach -- 284 * Attempt to map the CTB output device to a slot and attach the 285 * framebuffer as the output side of the console. 286 */ 287 int 288 tc_3000_500_fb_cnattach(u_int64_t turbo_slot) 289 { 290 u_int32_t output_slot; 291 292 output_slot = turbo_slot & 0xffffffff; 293 294 if (output_slot >= tc_3000_500_nslots) { 295 return EINVAL; 296 } 297 298 if (hwrpb->rpb_variation & SV_GRAPHICS) { 299 if (output_slot == 0) { 300 #if NSFB > 0 301 sfb_cnattach(KV(0x1e0000000) + 0x02000000); 302 return 0; 303 #else 304 return ENXIO; 305 #endif 306 } 307 } else { 308 /* 309 * Slots 0-2 in the tc_3000_500_slots array are only 310 * on the 500 models that also have the CXTurbo 311 * (500/800/900) and a total of 6 TC slots. For the 312 * 400/600/700, slots 0-2 are in table locations 3-5, so 313 * offset the CTB slot by 3 to get the address in our table. 314 */ 315 output_slot += 3; 316 } 317 return tc_fb_cnattach(tc_3000_500_slots[output_slot-1].tcs_addr); 318 } 319 #endif /* NWSDISPLAY */ 320 321 #if 0 322 /* 323 * tc_3000_500_ioslot -- 324 * Set the PBS bits for devices on the TC. 325 */ 326 void 327 tc_3000_500_ioslot(slot, flags, set) 328 u_int32_t slot, flags; 329 int set; 330 { 331 volatile u_int32_t *iosp; 332 u_int32_t ios; 333 int s; 334 335 iosp = (volatile u_int32_t *)TC_3000_500_IOSLOT; 336 ios = *iosp; 337 flags <<= (slot * 3); 338 if (set) 339 ios |= flags; 340 else 341 ios &= ~flags; 342 s = splhigh(); 343 *iosp = ios; 344 tc_mb(); 345 splx(s); 346 } 347 #endif 348
Indexes created Thu Oct 02 14:10:14 GMT 2025