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tc_3000_500.c revision 1.31
      1 /* $NetBSD: tc_3000_500.c,v 1.31 2012/02/06 02:14:16 matt Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
      5  * All rights reserved.
      6  *
      7  * Author: Chris G. Demetriou
      8  *
      9  * Permission to use, copy, modify and distribute this software and
     10  * its documentation is hereby granted, provided that both the copyright
     11  * notice and this permission notice appear in all copies of the
     12  * software, derivative works or modified versions, and any portions
     13  * thereof, and that both notices appear in supporting documentation.
     14  *
     15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  *
     19  * Carnegie Mellon requests users of this software to return to
     20  *
     21  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22  *  School of Computer Science
     23  *  Carnegie Mellon University
     24  *  Pittsburgh PA 15213-3890
     25  *
     26  * any improvements or extensions that they make and grant Carnegie the
     27  * rights to redistribute these changes.
     28  */
     29 
     30 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     31 
     32 __KERNEL_RCSID(0, "$NetBSD: tc_3000_500.c,v 1.31 2012/02/06 02:14:16 matt Exp $");
     33 
     34 #include <sys/param.h>
     35 #include <sys/systm.h>
     36 #include <sys/device.h>
     37 #include <sys/malloc.h>
     38 
     39 #include <machine/autoconf.h>
     40 #include <machine/pte.h>
     41 #include <machine/rpb.h>
     42 
     43 #include <dev/tc/tcvar.h>
     44 #include <alpha/tc/tc_conf.h>
     45 #include <alpha/tc/tc_3000_500.h>
     46 
     47 #include "wsdisplay.h"
     48 #include "sfb.h"
     49 
     50 #if NSFB > 0
     51 extern int	sfb_cnattach(tc_addr_t);
     52 #endif
     53 
     54 void	tc_3000_500_intr_setup(void);
     55 void	tc_3000_500_intr_establish(device_t, void *,
     56 	    tc_intrlevel_t, int (*)(void *), void *);
     57 void	tc_3000_500_intr_disestablish(device_t, void *);
     58 void	tc_3000_500_iointr(void *, unsigned long);
     59 
     60 int	tc_3000_500_intrnull(void *);
     61 int	tc_3000_500_fb_cnattach(uint64_t);
     62 
     63 #define C(x)	((void *)(u_long)x)
     64 #define	KV(x)	(ALPHA_PHYS_TO_K0SEG(x))
     65 
     66 struct tc_slotdesc tc_3000_500_slots[] = {
     67 	{ KV(0x100000000), C(TC_3000_500_DEV_OPT0), },	/* 0 - opt slot 0 */
     68 	{ KV(0x120000000), C(TC_3000_500_DEV_OPT1), },	/* 1 - opt slot 1 */
     69 	{ KV(0x140000000), C(TC_3000_500_DEV_OPT2), },	/* 2 - opt slot 2 */
     70 	{ KV(0x160000000), C(TC_3000_500_DEV_OPT3), },	/* 3 - opt slot 3 */
     71 	{ KV(0x180000000), C(TC_3000_500_DEV_OPT4), },	/* 4 - opt slot 4 */
     72 	{ KV(0x1a0000000), C(TC_3000_500_DEV_OPT5), },	/* 5 - opt slot 5 */
     73 	{ KV(0x1c0000000), C(TC_3000_500_DEV_BOGUS), },	/* 6 - TCDS ASIC */
     74 	{ KV(0x1e0000000), C(TC_3000_500_DEV_BOGUS), },	/* 7 - IOCTL ASIC */
     75 };
     76 int tc_3000_500_nslots =
     77     sizeof(tc_3000_500_slots) / sizeof(tc_3000_500_slots[0]);
     78 
     79 struct tc_builtin tc_3000_500_graphics_builtins[] = {
     80 	{ "FLAMG-IO",	7, 0x00000000, C(TC_3000_500_DEV_IOASIC),	},
     81 	{ "PMAGB-BA",	7, 0x02000000, C(TC_3000_500_DEV_CXTURBO),	},
     82 	{ "PMAZ-DS ",	6, 0x00000000, C(TC_3000_500_DEV_TCDS),		},
     83 };
     84 int tc_3000_500_graphics_nbuiltins = sizeof(tc_3000_500_graphics_builtins) /
     85     sizeof(tc_3000_500_graphics_builtins[0]);
     86 
     87 struct tc_builtin tc_3000_500_nographics_builtins[] = {
     88 	{ "FLAMG-IO",	7, 0x00000000, C(TC_3000_500_DEV_IOASIC),	},
     89 	{ "PMAZ-DS ",	6, 0x00000000, C(TC_3000_500_DEV_TCDS),		},
     90 };
     91 int tc_3000_500_nographics_nbuiltins = sizeof(tc_3000_500_nographics_builtins) /
     92     sizeof(tc_3000_500_nographics_builtins[0]);
     93 
     94 uint32_t tc_3000_500_intrbits[TC_3000_500_NCOOKIES] = {
     95 	TC_3000_500_IR_OPT0,
     96 	TC_3000_500_IR_OPT1,
     97 	TC_3000_500_IR_OPT2,
     98 	TC_3000_500_IR_OPT3,
     99 	TC_3000_500_IR_OPT4,
    100 	TC_3000_500_IR_OPT5,
    101 	TC_3000_500_IR_TCDS,
    102 	TC_3000_500_IR_IOASIC,
    103 	TC_3000_500_IR_CXTURBO,
    104 };
    105 
    106 struct tcintr {
    107 	int	(*tci_func)(void *);
    108 	void	*tci_arg;
    109 	struct evcnt tci_evcnt;
    110 } tc_3000_500_intr[TC_3000_500_NCOOKIES];
    111 
    112 uint32_t tc_3000_500_imask;	/* intrs we want to ignore; mirrors IMR. */
    113 
    114 void
    115 tc_3000_500_intr_setup(void)
    116 {
    117 	char *cp;
    118 	u_long i;
    119 
    120 	/*
    121 	 * Disable all slot interrupts.  Note that this cannot
    122 	 * actually disable CXTurbo, TCDS, and IOASIC interrupts.
    123 	 */
    124 	tc_3000_500_imask = *(volatile uint32_t *)TC_3000_500_IMR_READ;
    125 	for (i = 0; i < TC_3000_500_NCOOKIES; i++)
    126 		tc_3000_500_imask |= tc_3000_500_intrbits[i];
    127 	*(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask;
    128 	tc_mb();
    129 
    130 	/*
    131 	 * Set up interrupt handlers.
    132 	 */
    133 	for (i = 0; i < TC_3000_500_NCOOKIES; i++) {
    134 		tc_3000_500_intr[i].tci_func = tc_3000_500_intrnull;
    135 		tc_3000_500_intr[i].tci_arg = (void *)i;
    136 
    137 		cp = malloc(12, M_DEVBUF, M_NOWAIT);
    138 		if (cp == NULL)
    139 			panic("tc_3000_500_intr_setup");
    140 		sprintf(cp, "slot %lu", i);
    141 		evcnt_attach_dynamic(&tc_3000_500_intr[i].tci_evcnt,
    142 		    EVCNT_TYPE_INTR, NULL, "tc", cp);
    143 	}
    144 }
    145 
    146 const struct evcnt *
    147 tc_3000_500_intr_evcnt(device_t tcadev, void *cookie)
    148 {
    149 	u_long dev = (u_long)cookie;
    150 
    151 #ifdef DIAGNOSTIC
    152 	/* XXX bounds-check cookie. */
    153 #endif
    154 
    155 	return (&tc_3000_500_intr[dev].tci_evcnt);
    156 }
    157 
    158 void
    159 tc_3000_500_intr_establish(device_t tcadev, void *cookie, tc_intrlevel_t level, int (*func)(void *), void *arg)
    160 {
    161 	u_long dev = (u_long)cookie;
    162 
    163 #ifdef DIAGNOSTIC
    164 	/* XXX bounds-check cookie. */
    165 #endif
    166 
    167 	if (tc_3000_500_intr[dev].tci_func != tc_3000_500_intrnull)
    168 		panic("tc_3000_500_intr_establish: cookie %lu twice", dev);
    169 
    170 	tc_3000_500_intr[dev].tci_func = func;
    171 	tc_3000_500_intr[dev].tci_arg = arg;
    172 
    173 	tc_3000_500_imask &= ~tc_3000_500_intrbits[dev];
    174 	*(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask;
    175 	tc_mb();
    176 }
    177 
    178 void
    179 tc_3000_500_intr_disestablish(device_t tcadev, void *cookie)
    180 {
    181 	u_long dev = (u_long)cookie;
    182 
    183 #ifdef DIAGNOSTIC
    184 	/* XXX bounds-check cookie. */
    185 #endif
    186 
    187 	if (tc_3000_500_intr[dev].tci_func == tc_3000_500_intrnull)
    188 		panic("tc_3000_500_intr_disestablish: cookie %lu bad intr",
    189 		    dev);
    190 
    191 	tc_3000_500_imask |= tc_3000_500_intrbits[dev];
    192 	*(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask;
    193 	tc_mb();
    194 
    195 	tc_3000_500_intr[dev].tci_func = tc_3000_500_intrnull;
    196 	tc_3000_500_intr[dev].tci_arg = (void *)dev;
    197 }
    198 
    199 int
    200 tc_3000_500_intrnull(void *val)
    201 {
    202 
    203 	panic("tc_3000_500_intrnull: uncaught TC intr for cookie %ld",
    204 	    (u_long)val);
    205 }
    206 
    207 void
    208 tc_3000_500_iointr(void *arg, unsigned long vec)
    209 {
    210 	uint32_t ir;
    211 	int ifound;
    212 
    213 #ifdef DIAGNOSTIC
    214 	int s;
    215 	if (vec != 0x800)
    216 		panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec);
    217 	s = splhigh();
    218 	if (s != ALPHA_PSL_IPL_IO)
    219 		panic("INVALID ASSUMPTION: IPL %d, not %d", s,
    220 		    ALPHA_PSL_IPL_IO);
    221 	splx(s);
    222 #endif
    223 
    224 	do {
    225 		tc_syncbus();
    226 		ir = *(volatile uint32_t *)TC_3000_500_IR_CLEAR;
    227 
    228 		/* Ignore interrupts that we haven't enabled. */
    229 		ir &= ~(tc_3000_500_imask & 0x1ff);
    230 
    231 		ifound = 0;
    232 
    233 #define	INCRINTRCNT(slot)	tc_3000_500_intr[slot].tci_evcnt.ev_count++
    234 
    235 #define	CHECKINTR(slot)							\
    236 		if (ir & tc_3000_500_intrbits[slot]) {			\
    237 			ifound = 1;					\
    238 			INCRINTRCNT(slot);				\
    239 			(*tc_3000_500_intr[slot].tci_func)		\
    240 			    (tc_3000_500_intr[slot].tci_arg);		\
    241 		}
    242 		/* Do them in order of priority; highest slot # first. */
    243 		CHECKINTR(TC_3000_500_DEV_CXTURBO);
    244 		CHECKINTR(TC_3000_500_DEV_IOASIC);
    245 		CHECKINTR(TC_3000_500_DEV_TCDS);
    246 		CHECKINTR(TC_3000_500_DEV_OPT5);
    247 		CHECKINTR(TC_3000_500_DEV_OPT4);
    248 		CHECKINTR(TC_3000_500_DEV_OPT3);
    249 		CHECKINTR(TC_3000_500_DEV_OPT2);
    250 		CHECKINTR(TC_3000_500_DEV_OPT1);
    251 		CHECKINTR(TC_3000_500_DEV_OPT0);
    252 #undef CHECKINTR
    253 
    254 #ifdef DIAGNOSTIC
    255 #define PRINTINTR(msg, bits)						\
    256 	if (ir & bits)							\
    257 		printf(msg);
    258 		PRINTINTR("Second error occurred\n", TC_3000_500_IR_ERR2);
    259 		PRINTINTR("DMA buffer error\n", TC_3000_500_IR_DMABE);
    260 		PRINTINTR("DMA cross 2K boundary\n", TC_3000_500_IR_DMA2K);
    261 		PRINTINTR("TC reset in progress\n", TC_3000_500_IR_TCRESET);
    262 		PRINTINTR("TC parity error\n", TC_3000_500_IR_TCPAR);
    263 		PRINTINTR("DMA tag error\n", TC_3000_500_IR_DMATAG);
    264 		PRINTINTR("Single-bit error\n", TC_3000_500_IR_DMASBE);
    265 		PRINTINTR("Double-bit error\n", TC_3000_500_IR_DMADBE);
    266 		PRINTINTR("TC I/O timeout\n", TC_3000_500_IR_TCTIMEOUT);
    267 		PRINTINTR("DMA block too long\n", TC_3000_500_IR_DMABLOCK);
    268 		PRINTINTR("Invalid I/O address\n", TC_3000_500_IR_IOADDR);
    269 		PRINTINTR("DMA scatter/gather invalid\n", TC_3000_500_IR_DMASG);
    270 		PRINTINTR("Scatter/gather parity error\n",
    271 		    TC_3000_500_IR_SGPAR);
    272 #undef PRINTINTR
    273 #endif
    274 	} while (ifound);
    275 }
    276 
    277 #if NWSDISPLAY > 0
    278 /*
    279  * tc_3000_500_fb_cnattach --
    280  *	Attempt to map the CTB output device to a slot and attach the
    281  * framebuffer as the output side of the console.
    282  */
    283 int
    284 tc_3000_500_fb_cnattach(uint64_t turbo_slot)
    285 {
    286 	uint32_t output_slot;
    287 
    288 	output_slot = turbo_slot & 0xffffffff;
    289 
    290 	if (output_slot >= tc_3000_500_nslots) {
    291 		return EINVAL;
    292 	}
    293 
    294 	if (hwrpb->rpb_variation & SV_GRAPHICS) {
    295 		if (output_slot == 0) {
    296 #if NSFB > 0
    297 			sfb_cnattach(KV(0x1e0000000) + 0x02000000);
    298 			return 0;
    299 #else
    300 			return ENXIO;
    301 #endif
    302 		}
    303 	} else {
    304 		/*
    305 		 * Slots 0-2 in the tc_3000_500_slots array are only
    306 		 * on the 500 models that also have the CXTurbo
    307 		 * (500/800/900) and a total of 6 TC slots.  For the
    308 		 * 400/600/700, slots 0-2 are in table locations 3-5, so
    309 		 * offset the CTB slot by 3 to get the address in our table.
    310 		 */
    311 		output_slot += 3;
    312 	}
    313 	return tc_fb_cnattach(tc_3000_500_slots[output_slot-1].tcs_addr);
    314 }
    315 #endif /* NWSDISPLAY */
    316 
    317 #if 0
    318 /*
    319  * tc_3000_500_ioslot --
    320  *	Set the PBS bits for devices on the TC.
    321  */
    322 void
    323 tc_3000_500_ioslot(uint32_t slot, uint32_t flags, int set)
    324 {
    325 	volatile uint32_t *iosp;
    326 	uint32_t ios;
    327 	int s;
    328 
    329 	iosp = (volatile uint32_t *)TC_3000_500_IOSLOT;
    330 	ios = *iosp;
    331 	flags <<= (slot * 3);
    332 	if (set)
    333 		ios |= flags;
    334 	else
    335 		ios &= ~flags;
    336 	s = splhigh();
    337 	*iosp = ios;
    338 	tc_mb();
    339 	splx(s);
    340 }
    341 #endif
    342