tc_3000_500.c revision 1.33 1 /* $NetBSD: tc_3000_500.c,v 1.33 2019/11/10 21:16:22 chs Exp $ */
2
3 /*
4 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
5 * All rights reserved.
6 *
7 * Author: Chris G. Demetriou
8 *
9 * Permission to use, copy, modify and distribute this software and
10 * its documentation is hereby granted, provided that both the copyright
11 * notice and this permission notice appear in all copies of the
12 * software, derivative works or modified versions, and any portions
13 * thereof, and that both notices appear in supporting documentation.
14 *
15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 *
19 * Carnegie Mellon requests users of this software to return to
20 *
21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 * School of Computer Science
23 * Carnegie Mellon University
24 * Pittsburgh PA 15213-3890
25 *
26 * any improvements or extensions that they make and grant Carnegie the
27 * rights to redistribute these changes.
28 */
29
30 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
31
32 __KERNEL_RCSID(0, "$NetBSD: tc_3000_500.c,v 1.33 2019/11/10 21:16:22 chs Exp $");
33
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/device.h>
37 #include <sys/malloc.h>
38
39 #include <machine/autoconf.h>
40 #include <machine/pte.h>
41 #include <machine/rpb.h>
42
43 #include <dev/tc/tcvar.h>
44 #include <alpha/tc/tc_conf.h>
45 #include <alpha/tc/tc_3000_500.h>
46
47 #include "wsdisplay.h"
48 #include "sfb.h"
49
50 #if NSFB > 0
51 extern int sfb_cnattach(tc_addr_t);
52 #endif
53
54 void tc_3000_500_intr_setup(void);
55 void tc_3000_500_intr_establish(device_t, void *,
56 tc_intrlevel_t, int (*)(void *), void *);
57 void tc_3000_500_intr_disestablish(device_t, void *);
58 void tc_3000_500_iointr(void *, unsigned long);
59
60 int tc_3000_500_intrnull(void *);
61 int tc_3000_500_fb_cnattach(uint64_t);
62
63 #define C(x) ((void *)(u_long)x)
64 #define KV(x) (ALPHA_PHYS_TO_K0SEG(x))
65
66 struct tc_slotdesc tc_3000_500_slots[] = {
67 { KV(0x100000000), C(TC_3000_500_DEV_OPT0), }, /* 0 - opt slot 0 */
68 { KV(0x120000000), C(TC_3000_500_DEV_OPT1), }, /* 1 - opt slot 1 */
69 { KV(0x140000000), C(TC_3000_500_DEV_OPT2), }, /* 2 - opt slot 2 */
70 { KV(0x160000000), C(TC_3000_500_DEV_OPT3), }, /* 3 - opt slot 3 */
71 { KV(0x180000000), C(TC_3000_500_DEV_OPT4), }, /* 4 - opt slot 4 */
72 { KV(0x1a0000000), C(TC_3000_500_DEV_OPT5), }, /* 5 - opt slot 5 */
73 { KV(0x1c0000000), C(TC_3000_500_DEV_BOGUS), }, /* 6 - TCDS ASIC */
74 { KV(0x1e0000000), C(TC_3000_500_DEV_BOGUS), }, /* 7 - IOCTL ASIC */
75 };
76 int tc_3000_500_nslots =
77 sizeof(tc_3000_500_slots) / sizeof(tc_3000_500_slots[0]);
78
79 struct tc_builtin tc_3000_500_graphics_builtins[] = {
80 { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), },
81 { "PMAGB-BA", 7, 0x02000000, C(TC_3000_500_DEV_CXTURBO), },
82 { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), },
83 };
84 int tc_3000_500_graphics_nbuiltins = sizeof(tc_3000_500_graphics_builtins) /
85 sizeof(tc_3000_500_graphics_builtins[0]);
86
87 struct tc_builtin tc_3000_500_nographics_builtins[] = {
88 { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), },
89 { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), },
90 };
91 int tc_3000_500_nographics_nbuiltins = sizeof(tc_3000_500_nographics_builtins) /
92 sizeof(tc_3000_500_nographics_builtins[0]);
93
94 uint32_t tc_3000_500_intrbits[TC_3000_500_NCOOKIES] = {
95 TC_3000_500_IR_OPT0,
96 TC_3000_500_IR_OPT1,
97 TC_3000_500_IR_OPT2,
98 TC_3000_500_IR_OPT3,
99 TC_3000_500_IR_OPT4,
100 TC_3000_500_IR_OPT5,
101 TC_3000_500_IR_TCDS,
102 TC_3000_500_IR_IOASIC,
103 TC_3000_500_IR_CXTURBO,
104 };
105
106 struct tcintr {
107 int (*tci_func)(void *);
108 void *tci_arg;
109 struct evcnt tci_evcnt;
110 } tc_3000_500_intr[TC_3000_500_NCOOKIES];
111
112 uint32_t tc_3000_500_imask; /* intrs we want to ignore; mirrors IMR. */
113
114 void
115 tc_3000_500_intr_setup(void)
116 {
117 char *cp;
118 u_long i;
119
120 /*
121 * Disable all slot interrupts. Note that this cannot
122 * actually disable CXTurbo, TCDS, and IOASIC interrupts.
123 */
124 tc_3000_500_imask = *(volatile uint32_t *)TC_3000_500_IMR_READ;
125 for (i = 0; i < TC_3000_500_NCOOKIES; i++)
126 tc_3000_500_imask |= tc_3000_500_intrbits[i];
127 *(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask;
128 tc_mb();
129
130 /*
131 * Set up interrupt handlers.
132 */
133 for (i = 0; i < TC_3000_500_NCOOKIES; i++) {
134 static const size_t len = 12;
135 tc_3000_500_intr[i].tci_func = tc_3000_500_intrnull;
136 tc_3000_500_intr[i].tci_arg = (void *)i;
137
138 cp = malloc(len, M_DEVBUF, M_WAITOK);
139 snprintf(cp, len, "slot %lu", i);
140 evcnt_attach_dynamic(&tc_3000_500_intr[i].tci_evcnt,
141 EVCNT_TYPE_INTR, NULL, "tc", cp);
142 }
143 }
144
145 const struct evcnt *
146 tc_3000_500_intr_evcnt(device_t tcadev, void *cookie)
147 {
148 u_long dev = (u_long)cookie;
149
150 #ifdef DIAGNOSTIC
151 /* XXX bounds-check cookie. */
152 #endif
153
154 return (&tc_3000_500_intr[dev].tci_evcnt);
155 }
156
157 void
158 tc_3000_500_intr_establish(device_t tcadev, void *cookie, tc_intrlevel_t level, int (*func)(void *), void *arg)
159 {
160 u_long dev = (u_long)cookie;
161
162 #ifdef DIAGNOSTIC
163 /* XXX bounds-check cookie. */
164 #endif
165
166 if (tc_3000_500_intr[dev].tci_func != tc_3000_500_intrnull)
167 panic("tc_3000_500_intr_establish: cookie %lu twice", dev);
168
169 tc_3000_500_intr[dev].tci_func = func;
170 tc_3000_500_intr[dev].tci_arg = arg;
171
172 tc_3000_500_imask &= ~tc_3000_500_intrbits[dev];
173 *(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask;
174 tc_mb();
175 }
176
177 void
178 tc_3000_500_intr_disestablish(device_t tcadev, void *cookie)
179 {
180 u_long dev = (u_long)cookie;
181
182 #ifdef DIAGNOSTIC
183 /* XXX bounds-check cookie. */
184 #endif
185
186 if (tc_3000_500_intr[dev].tci_func == tc_3000_500_intrnull)
187 panic("tc_3000_500_intr_disestablish: cookie %lu bad intr",
188 dev);
189
190 tc_3000_500_imask |= tc_3000_500_intrbits[dev];
191 *(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask;
192 tc_mb();
193
194 tc_3000_500_intr[dev].tci_func = tc_3000_500_intrnull;
195 tc_3000_500_intr[dev].tci_arg = (void *)dev;
196 }
197
198 int
199 tc_3000_500_intrnull(void *val)
200 {
201
202 panic("tc_3000_500_intrnull: uncaught TC intr for cookie %ld",
203 (u_long)val);
204 }
205
206 void
207 tc_3000_500_iointr(void *arg, unsigned long vec)
208 {
209 uint32_t ir;
210 int ifound;
211
212 #ifdef DIAGNOSTIC
213 int s;
214 if (vec != 0x800)
215 panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec);
216 s = splhigh();
217 if (s != ALPHA_PSL_IPL_IO)
218 panic("INVALID ASSUMPTION: IPL %d, not %d", s,
219 ALPHA_PSL_IPL_IO);
220 splx(s);
221 #endif
222
223 do {
224 tc_syncbus();
225 ir = *(volatile uint32_t *)TC_3000_500_IR_CLEAR;
226
227 /* Ignore interrupts that we haven't enabled. */
228 ir &= ~(tc_3000_500_imask & 0x1ff);
229
230 ifound = 0;
231
232 #define INCRINTRCNT(slot) tc_3000_500_intr[slot].tci_evcnt.ev_count++
233
234 #define CHECKINTR(slot) \
235 if (ir & tc_3000_500_intrbits[slot]) { \
236 ifound = 1; \
237 INCRINTRCNT(slot); \
238 (*tc_3000_500_intr[slot].tci_func) \
239 (tc_3000_500_intr[slot].tci_arg); \
240 }
241 /* Do them in order of priority; highest slot # first. */
242 CHECKINTR(TC_3000_500_DEV_CXTURBO);
243 CHECKINTR(TC_3000_500_DEV_IOASIC);
244 CHECKINTR(TC_3000_500_DEV_TCDS);
245 CHECKINTR(TC_3000_500_DEV_OPT5);
246 CHECKINTR(TC_3000_500_DEV_OPT4);
247 CHECKINTR(TC_3000_500_DEV_OPT3);
248 CHECKINTR(TC_3000_500_DEV_OPT2);
249 CHECKINTR(TC_3000_500_DEV_OPT1);
250 CHECKINTR(TC_3000_500_DEV_OPT0);
251 #undef CHECKINTR
252
253 #ifdef DIAGNOSTIC
254 #define PRINTINTR(msg, bits) \
255 if (ir & bits) \
256 printf(msg);
257 PRINTINTR("Second error occurred\n", TC_3000_500_IR_ERR2);
258 PRINTINTR("DMA buffer error\n", TC_3000_500_IR_DMABE);
259 PRINTINTR("DMA cross 2K boundary\n", TC_3000_500_IR_DMA2K);
260 PRINTINTR("TC reset in progress\n", TC_3000_500_IR_TCRESET);
261 PRINTINTR("TC parity error\n", TC_3000_500_IR_TCPAR);
262 PRINTINTR("DMA tag error\n", TC_3000_500_IR_DMATAG);
263 PRINTINTR("Single-bit error\n", TC_3000_500_IR_DMASBE);
264 PRINTINTR("Double-bit error\n", TC_3000_500_IR_DMADBE);
265 PRINTINTR("TC I/O timeout\n", TC_3000_500_IR_TCTIMEOUT);
266 PRINTINTR("DMA block too long\n", TC_3000_500_IR_DMABLOCK);
267 PRINTINTR("Invalid I/O address\n", TC_3000_500_IR_IOADDR);
268 PRINTINTR("DMA scatter/gather invalid\n", TC_3000_500_IR_DMASG);
269 PRINTINTR("Scatter/gather parity error\n",
270 TC_3000_500_IR_SGPAR);
271 #undef PRINTINTR
272 #endif
273 } while (ifound);
274 }
275
276 #if NWSDISPLAY > 0
277 /*
278 * tc_3000_500_fb_cnattach --
279 * Attempt to map the CTB output device to a slot and attach the
280 * framebuffer as the output side of the console.
281 */
282 int
283 tc_3000_500_fb_cnattach(uint64_t turbo_slot)
284 {
285 uint32_t output_slot;
286
287 output_slot = turbo_slot & 0xffffffff;
288
289 if (output_slot >= tc_3000_500_nslots) {
290 return EINVAL;
291 }
292
293 if (hwrpb->rpb_variation & SV_GRAPHICS) {
294 if (output_slot == 0) {
295 #if NSFB > 0
296 sfb_cnattach(KV(0x1e0000000) + 0x02000000);
297 return 0;
298 #else
299 return ENXIO;
300 #endif
301 }
302 } else {
303 /*
304 * Slots 0-2 in the tc_3000_500_slots array are only
305 * on the 500 models that also have the CXTurbo
306 * (500/800/900) and a total of 6 TC slots. For the
307 * 400/600/700, slots 0-2 are in table locations 3-5, so
308 * offset the CTB slot by 3 to get the address in our table.
309 */
310 output_slot += 3;
311 }
312 return tc_fb_cnattach(tc_3000_500_slots[output_slot-1].tcs_addr);
313 }
314 #endif /* NWSDISPLAY */
315
316 #if 0
317 /*
318 * tc_3000_500_ioslot --
319 * Set the PBS bits for devices on the TC.
320 */
321 void
322 tc_3000_500_ioslot(uint32_t slot, uint32_t flags, int set)
323 {
324 volatile uint32_t *iosp;
325 uint32_t ios;
326 int s;
327
328 iosp = (volatile uint32_t *)TC_3000_500_IOSLOT;
329 ios = *iosp;
330 flags <<= (slot * 3);
331 if (set)
332 ios |= flags;
333 else
334 ios &= ~flags;
335 s = splhigh();
336 *iosp = ios;
337 tc_mb();
338 splx(s);
339 }
340 #endif
341