tc_3000_500.c revision 1.36
1 /* $NetBSD: tc_3000_500.c,v 1.36 2020/09/25 03:40:11 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 31 32 __KERNEL_RCSID(0, "$NetBSD: tc_3000_500.c,v 1.36 2020/09/25 03:40:11 thorpej Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/device.h> 37 #include <sys/malloc.h> 38 #include <sys/cpu.h> 39 40 #include <machine/autoconf.h> 41 #include <machine/pte.h> 42 #include <machine/rpb.h> 43 44 #include <dev/tc/tcvar.h> 45 #include <alpha/tc/tc_conf.h> 46 #include <alpha/tc/tc_3000_500.h> 47 48 #include "wsdisplay.h" 49 #include "sfb.h" 50 51 #if NSFB > 0 52 extern int sfb_cnattach(tc_addr_t); 53 #endif 54 55 void tc_3000_500_intr_setup(void); 56 void tc_3000_500_intr_establish(device_t, void *, 57 tc_intrlevel_t, int (*)(void *), void *); 58 void tc_3000_500_intr_disestablish(device_t, void *); 59 void tc_3000_500_iointr(void *, unsigned long); 60 61 int tc_3000_500_intrnull(void *); 62 int tc_3000_500_fb_cnattach(uint64_t); 63 64 #define C(x) ((void *)(u_long)x) 65 #define KV(x) (ALPHA_PHYS_TO_K0SEG(x)) 66 67 struct tc_slotdesc tc_3000_500_slots[] = { 68 { KV(0x100000000), C(TC_3000_500_DEV_OPT0), }, /* 0 - opt slot 0 */ 69 { KV(0x120000000), C(TC_3000_500_DEV_OPT1), }, /* 1 - opt slot 1 */ 70 { KV(0x140000000), C(TC_3000_500_DEV_OPT2), }, /* 2 - opt slot 2 */ 71 { KV(0x160000000), C(TC_3000_500_DEV_OPT3), }, /* 3 - opt slot 3 */ 72 { KV(0x180000000), C(TC_3000_500_DEV_OPT4), }, /* 4 - opt slot 4 */ 73 { KV(0x1a0000000), C(TC_3000_500_DEV_OPT5), }, /* 5 - opt slot 5 */ 74 { KV(0x1c0000000), C(TC_3000_500_DEV_BOGUS), }, /* 6 - TCDS ASIC */ 75 { KV(0x1e0000000), C(TC_3000_500_DEV_BOGUS), }, /* 7 - IOCTL ASIC */ 76 }; 77 int tc_3000_500_nslots = 78 sizeof(tc_3000_500_slots) / sizeof(tc_3000_500_slots[0]); 79 80 struct tc_builtin tc_3000_500_graphics_builtins[] = { 81 { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), }, 82 { "PMAGB-BA", 7, 0x02000000, C(TC_3000_500_DEV_CXTURBO), }, 83 { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), }, 84 }; 85 int tc_3000_500_graphics_nbuiltins = sizeof(tc_3000_500_graphics_builtins) / 86 sizeof(tc_3000_500_graphics_builtins[0]); 87 88 struct tc_builtin tc_3000_500_nographics_builtins[] = { 89 { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), }, 90 { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), }, 91 }; 92 int tc_3000_500_nographics_nbuiltins = sizeof(tc_3000_500_nographics_builtins) / 93 sizeof(tc_3000_500_nographics_builtins[0]); 94 95 uint32_t tc_3000_500_intrbits[TC_3000_500_NCOOKIES] = { 96 TC_3000_500_IR_OPT0, 97 TC_3000_500_IR_OPT1, 98 TC_3000_500_IR_OPT2, 99 TC_3000_500_IR_OPT3, 100 TC_3000_500_IR_OPT4, 101 TC_3000_500_IR_OPT5, 102 TC_3000_500_IR_TCDS, 103 TC_3000_500_IR_IOASIC, 104 TC_3000_500_IR_CXTURBO, 105 }; 106 107 struct tcintr { 108 int (*tci_func)(void *); 109 void *tci_arg; 110 struct evcnt tci_evcnt; 111 } tc_3000_500_intr[TC_3000_500_NCOOKIES]; 112 113 uint32_t tc_3000_500_imask; /* intrs we want to ignore; mirrors IMR. */ 114 115 void 116 tc_3000_500_intr_setup(void) 117 { 118 char *cp; 119 u_long i; 120 121 /* 122 * Disable all slot interrupts. Note that this cannot 123 * actually disable CXTurbo, TCDS, and IOASIC interrupts. 124 */ 125 tc_3000_500_imask = *(volatile uint32_t *)TC_3000_500_IMR_READ; 126 for (i = 0; i < TC_3000_500_NCOOKIES; i++) 127 tc_3000_500_imask |= tc_3000_500_intrbits[i]; 128 *(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 129 tc_mb(); 130 131 /* 132 * Set up interrupt handlers. 133 */ 134 for (i = 0; i < TC_3000_500_NCOOKIES; i++) { 135 static const size_t len = 12; 136 tc_3000_500_intr[i].tci_func = tc_3000_500_intrnull; 137 tc_3000_500_intr[i].tci_arg = (void *)i; 138 139 cp = malloc(len, M_DEVBUF, M_WAITOK); 140 snprintf(cp, len, "slot %lu", i); 141 evcnt_attach_dynamic(&tc_3000_500_intr[i].tci_evcnt, 142 EVCNT_TYPE_INTR, NULL, "tc", cp); 143 } 144 } 145 146 const struct evcnt * 147 tc_3000_500_intr_evcnt(device_t tcadev, void *cookie) 148 { 149 u_long dev = (u_long)cookie; 150 151 #ifdef DIAGNOSTIC 152 /* XXX bounds-check cookie. */ 153 #endif 154 155 return (&tc_3000_500_intr[dev].tci_evcnt); 156 } 157 158 void 159 tc_3000_500_intr_establish(device_t tcadev, void *cookie, tc_intrlevel_t level, int (*func)(void *), void *arg) 160 { 161 u_long dev = (u_long)cookie; 162 163 #ifdef DIAGNOSTIC 164 /* XXX bounds-check cookie. */ 165 #endif 166 167 if (tc_3000_500_intr[dev].tci_func != tc_3000_500_intrnull) 168 panic("tc_3000_500_intr_establish: cookie %lu twice", dev); 169 170 const int s = splhigh(); 171 172 /* All TC systems are uniprocessors. */ 173 KASSERT(CPU_IS_PRIMARY(curcpu())); 174 KASSERT(ncpu == 1); 175 curcpu()->ci_nintrhand++; 176 177 tc_3000_500_intr[dev].tci_func = func; 178 tc_3000_500_intr[dev].tci_arg = arg; 179 180 splx(s); 181 182 tc_3000_500_imask &= ~tc_3000_500_intrbits[dev]; 183 *(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 184 tc_mb(); 185 } 186 187 void 188 tc_3000_500_intr_disestablish(device_t tcadev, void *cookie) 189 { 190 u_long dev = (u_long)cookie; 191 192 #ifdef DIAGNOSTIC 193 /* XXX bounds-check cookie. */ 194 #endif 195 196 if (tc_3000_500_intr[dev].tci_func == tc_3000_500_intrnull) 197 panic("tc_3000_500_intr_disestablish: cookie %lu bad intr", 198 dev); 199 200 tc_3000_500_imask |= tc_3000_500_intrbits[dev]; 201 *(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 202 tc_mb(); 203 204 const int s = splhigh(); 205 206 curcpu()->ci_nintrhand--; 207 208 tc_3000_500_intr[dev].tci_func = tc_3000_500_intrnull; 209 tc_3000_500_intr[dev].tci_arg = (void *)dev; 210 211 splx(s); 212 } 213 214 int 215 tc_3000_500_intrnull(void *val) 216 { 217 218 panic("tc_3000_500_intrnull: uncaught TC intr for cookie %ld", 219 (u_long)val); 220 } 221 222 void 223 tc_3000_500_iointr(void *arg, unsigned long vec) 224 { 225 uint32_t ir; 226 int ifound; 227 228 KERNEL_LOCK(1, NULL); 229 230 #ifdef DIAGNOSTIC 231 int s; 232 if (vec != 0x800) 233 panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec); 234 s = splhigh(); 235 if (s != ALPHA_PSL_IPL_IO_HI) 236 panic("INVALID ASSUMPTION: IPL %d, not %d", s, 237 ALPHA_PSL_IPL_IO_HI); 238 splx(s); 239 #endif 240 241 do { 242 tc_syncbus(); 243 ir = *(volatile uint32_t *)TC_3000_500_IR_CLEAR; 244 245 /* Ignore interrupts that we haven't enabled. */ 246 ir &= ~(tc_3000_500_imask & 0x1ff); 247 248 ifound = 0; 249 250 #define INCRINTRCNT(slot) tc_3000_500_intr[slot].tci_evcnt.ev_count++ 251 252 #define CHECKINTR(slot) \ 253 if (ir & tc_3000_500_intrbits[slot]) { \ 254 ifound = 1; \ 255 INCRINTRCNT(slot); \ 256 (*tc_3000_500_intr[slot].tci_func) \ 257 (tc_3000_500_intr[slot].tci_arg); \ 258 } 259 /* Do them in order of priority; highest slot # first. */ 260 CHECKINTR(TC_3000_500_DEV_CXTURBO); 261 CHECKINTR(TC_3000_500_DEV_IOASIC); 262 CHECKINTR(TC_3000_500_DEV_TCDS); 263 CHECKINTR(TC_3000_500_DEV_OPT5); 264 CHECKINTR(TC_3000_500_DEV_OPT4); 265 CHECKINTR(TC_3000_500_DEV_OPT3); 266 CHECKINTR(TC_3000_500_DEV_OPT2); 267 CHECKINTR(TC_3000_500_DEV_OPT1); 268 CHECKINTR(TC_3000_500_DEV_OPT0); 269 #undef CHECKINTR 270 271 #ifdef DIAGNOSTIC 272 #define PRINTINTR(msg, bits) \ 273 if (ir & bits) \ 274 printf(msg); 275 PRINTINTR("Second error occurred\n", TC_3000_500_IR_ERR2); 276 PRINTINTR("DMA buffer error\n", TC_3000_500_IR_DMABE); 277 PRINTINTR("DMA cross 2K boundary\n", TC_3000_500_IR_DMA2K); 278 PRINTINTR("TC reset in progress\n", TC_3000_500_IR_TCRESET); 279 PRINTINTR("TC parity error\n", TC_3000_500_IR_TCPAR); 280 PRINTINTR("DMA tag error\n", TC_3000_500_IR_DMATAG); 281 PRINTINTR("Single-bit error\n", TC_3000_500_IR_DMASBE); 282 PRINTINTR("Double-bit error\n", TC_3000_500_IR_DMADBE); 283 PRINTINTR("TC I/O timeout\n", TC_3000_500_IR_TCTIMEOUT); 284 PRINTINTR("DMA block too long\n", TC_3000_500_IR_DMABLOCK); 285 PRINTINTR("Invalid I/O address\n", TC_3000_500_IR_IOADDR); 286 PRINTINTR("DMA scatter/gather invalid\n", TC_3000_500_IR_DMASG); 287 PRINTINTR("Scatter/gather parity error\n", 288 TC_3000_500_IR_SGPAR); 289 #undef PRINTINTR 290 #endif 291 } while (ifound); 292 293 KERNEL_UNLOCK_ONE(NULL); 294 } 295 296 #if NWSDISPLAY > 0 297 /* 298 * tc_3000_500_fb_cnattach -- 299 * Attempt to map the CTB output device to a slot and attach the 300 * framebuffer as the output side of the console. 301 */ 302 int 303 tc_3000_500_fb_cnattach(uint64_t turbo_slot) 304 { 305 uint32_t output_slot; 306 307 output_slot = turbo_slot & 0xffffffff; 308 309 if (output_slot >= tc_3000_500_nslots) { 310 return EINVAL; 311 } 312 313 if (hwrpb->rpb_variation & SV_GRAPHICS) { 314 if (output_slot == 0) { 315 #if NSFB > 0 316 sfb_cnattach(KV(0x1e0000000) + 0x02000000); 317 return 0; 318 #else 319 return ENXIO; 320 #endif 321 } 322 } else { 323 /* 324 * Slots 0-2 in the tc_3000_500_slots array are only 325 * on the 500 models that also have the CXTurbo 326 * (500/800/900) and a total of 6 TC slots. For the 327 * 400/600/700, slots 0-2 are in table locations 3-5, so 328 * offset the CTB slot by 3 to get the address in our table. 329 */ 330 output_slot += 3; 331 } 332 return tc_fb_cnattach(tc_3000_500_slots[output_slot-1].tcs_addr); 333 } 334 #endif /* NWSDISPLAY */ 335 336 #if 0 337 /* 338 * tc_3000_500_ioslot -- 339 * Set the PBS bits for devices on the TC. 340 */ 341 void 342 tc_3000_500_ioslot(uint32_t slot, uint32_t flags, int set) 343 { 344 volatile uint32_t *iosp; 345 uint32_t ios; 346 int s; 347 348 iosp = (volatile uint32_t *)TC_3000_500_IOSLOT; 349 ios = *iosp; 350 flags <<= (slot * 3); 351 if (set) 352 ios |= flags; 353 else 354 ios &= ~flags; 355 s = splhigh(); 356 *iosp = ios; 357 tc_mb(); 358 splx(s); 359 } 360 #endif 361
Indexes created Thu Oct 02 14:10:14 GMT 2025