tc_3000_500.c revision 1.37
1 /* $NetBSD: tc_3000_500.c,v 1.37 2020/11/18 02:04:30 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 31 32 __KERNEL_RCSID(0, "$NetBSD: tc_3000_500.c,v 1.37 2020/11/18 02:04:30 thorpej Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/device.h> 37 #include <sys/kmem.h> 38 #include <sys/cpu.h> 39 40 #include <machine/autoconf.h> 41 #include <machine/pte.h> 42 #include <machine/rpb.h> 43 44 #include <dev/tc/tcvar.h> 45 #include <alpha/tc/tc_conf.h> 46 #include <alpha/tc/tc_3000_500.h> 47 48 #include "wsdisplay.h" 49 #include "sfb.h" 50 51 #if NSFB > 0 52 extern int sfb_cnattach(tc_addr_t); 53 #endif 54 55 void tc_3000_500_intr_setup(void); 56 void tc_3000_500_intr_establish(device_t, void *, 57 tc_intrlevel_t, int (*)(void *), void *); 58 void tc_3000_500_intr_disestablish(device_t, void *); 59 void tc_3000_500_iointr(void *, unsigned long); 60 61 int tc_3000_500_intrnull(void *); 62 int tc_3000_500_fb_cnattach(uint64_t); 63 64 #define C(x) ((void *)(u_long)x) 65 #define KV(x) (ALPHA_PHYS_TO_K0SEG(x)) 66 67 struct tc_slotdesc tc_3000_500_slots[] = { 68 { KV(0x100000000), C(TC_3000_500_DEV_OPT0), }, /* 0 - opt slot 0 */ 69 { KV(0x120000000), C(TC_3000_500_DEV_OPT1), }, /* 1 - opt slot 1 */ 70 { KV(0x140000000), C(TC_3000_500_DEV_OPT2), }, /* 2 - opt slot 2 */ 71 { KV(0x160000000), C(TC_3000_500_DEV_OPT3), }, /* 3 - opt slot 3 */ 72 { KV(0x180000000), C(TC_3000_500_DEV_OPT4), }, /* 4 - opt slot 4 */ 73 { KV(0x1a0000000), C(TC_3000_500_DEV_OPT5), }, /* 5 - opt slot 5 */ 74 { KV(0x1c0000000), C(TC_3000_500_DEV_BOGUS), }, /* 6 - TCDS ASIC */ 75 { KV(0x1e0000000), C(TC_3000_500_DEV_BOGUS), }, /* 7 - IOCTL ASIC */ 76 }; 77 int tc_3000_500_nslots = 78 sizeof(tc_3000_500_slots) / sizeof(tc_3000_500_slots[0]); 79 80 struct tc_builtin tc_3000_500_graphics_builtins[] = { 81 { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), }, 82 { "PMAGB-BA", 7, 0x02000000, C(TC_3000_500_DEV_CXTURBO), }, 83 { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), }, 84 }; 85 int tc_3000_500_graphics_nbuiltins = sizeof(tc_3000_500_graphics_builtins) / 86 sizeof(tc_3000_500_graphics_builtins[0]); 87 88 struct tc_builtin tc_3000_500_nographics_builtins[] = { 89 { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), }, 90 { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), }, 91 }; 92 int tc_3000_500_nographics_nbuiltins = sizeof(tc_3000_500_nographics_builtins) / 93 sizeof(tc_3000_500_nographics_builtins[0]); 94 95 uint32_t tc_3000_500_intrbits[TC_3000_500_NCOOKIES] = { 96 TC_3000_500_IR_OPT0, 97 TC_3000_500_IR_OPT1, 98 TC_3000_500_IR_OPT2, 99 TC_3000_500_IR_OPT3, 100 TC_3000_500_IR_OPT4, 101 TC_3000_500_IR_OPT5, 102 TC_3000_500_IR_TCDS, 103 TC_3000_500_IR_IOASIC, 104 TC_3000_500_IR_CXTURBO, 105 }; 106 107 struct tcintr { 108 int (*tci_func)(void *); 109 void *tci_arg; 110 struct evcnt tci_evcnt; 111 } tc_3000_500_intr[TC_3000_500_NCOOKIES]; 112 113 uint32_t tc_3000_500_imask; /* intrs we want to ignore; mirrors IMR. */ 114 115 void 116 tc_3000_500_intr_setup(void) 117 { 118 char *cp; 119 u_long i; 120 121 /* 122 * Disable all slot interrupts. Note that this cannot 123 * actually disable CXTurbo, TCDS, and IOASIC interrupts. 124 */ 125 tc_3000_500_imask = *(volatile uint32_t *)TC_3000_500_IMR_READ; 126 for (i = 0; i < TC_3000_500_NCOOKIES; i++) 127 tc_3000_500_imask |= tc_3000_500_intrbits[i]; 128 *(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 129 tc_mb(); 130 131 /* 132 * Set up interrupt handlers. 133 */ 134 for (i = 0; i < TC_3000_500_NCOOKIES; i++) { 135 tc_3000_500_intr[i].tci_func = tc_3000_500_intrnull; 136 tc_3000_500_intr[i].tci_arg = (void *)i; 137 138 cp = kmem_asprintf("slot %lu", i); 139 evcnt_attach_dynamic(&tc_3000_500_intr[i].tci_evcnt, 140 EVCNT_TYPE_INTR, NULL, "tc", cp); 141 } 142 } 143 144 const struct evcnt * 145 tc_3000_500_intr_evcnt(device_t tcadev, void *cookie) 146 { 147 u_long dev = (u_long)cookie; 148 149 #ifdef DIAGNOSTIC 150 /* XXX bounds-check cookie. */ 151 #endif 152 153 return (&tc_3000_500_intr[dev].tci_evcnt); 154 } 155 156 void 157 tc_3000_500_intr_establish(device_t tcadev, void *cookie, tc_intrlevel_t level, int (*func)(void *), void *arg) 158 { 159 u_long dev = (u_long)cookie; 160 161 #ifdef DIAGNOSTIC 162 /* XXX bounds-check cookie. */ 163 #endif 164 165 if (tc_3000_500_intr[dev].tci_func != tc_3000_500_intrnull) 166 panic("tc_3000_500_intr_establish: cookie %lu twice", dev); 167 168 const int s = splhigh(); 169 170 /* All TC systems are uniprocessors. */ 171 KASSERT(CPU_IS_PRIMARY(curcpu())); 172 KASSERT(ncpu == 1); 173 curcpu()->ci_nintrhand++; 174 175 tc_3000_500_intr[dev].tci_func = func; 176 tc_3000_500_intr[dev].tci_arg = arg; 177 178 splx(s); 179 180 tc_3000_500_imask &= ~tc_3000_500_intrbits[dev]; 181 *(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 182 tc_mb(); 183 } 184 185 void 186 tc_3000_500_intr_disestablish(device_t tcadev, void *cookie) 187 { 188 u_long dev = (u_long)cookie; 189 190 #ifdef DIAGNOSTIC 191 /* XXX bounds-check cookie. */ 192 #endif 193 194 if (tc_3000_500_intr[dev].tci_func == tc_3000_500_intrnull) 195 panic("tc_3000_500_intr_disestablish: cookie %lu bad intr", 196 dev); 197 198 tc_3000_500_imask |= tc_3000_500_intrbits[dev]; 199 *(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 200 tc_mb(); 201 202 const int s = splhigh(); 203 204 curcpu()->ci_nintrhand--; 205 206 tc_3000_500_intr[dev].tci_func = tc_3000_500_intrnull; 207 tc_3000_500_intr[dev].tci_arg = (void *)dev; 208 209 splx(s); 210 } 211 212 int 213 tc_3000_500_intrnull(void *val) 214 { 215 216 panic("tc_3000_500_intrnull: uncaught TC intr for cookie %ld", 217 (u_long)val); 218 } 219 220 void 221 tc_3000_500_iointr(void *arg, unsigned long vec) 222 { 223 uint32_t ir; 224 int ifound; 225 226 KERNEL_LOCK(1, NULL); 227 228 #ifdef DIAGNOSTIC 229 int s; 230 if (vec != 0x800) 231 panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec); 232 s = splhigh(); 233 if (s != ALPHA_PSL_IPL_IO_HI) 234 panic("INVALID ASSUMPTION: IPL %d, not %d", s, 235 ALPHA_PSL_IPL_IO_HI); 236 splx(s); 237 #endif 238 239 do { 240 tc_syncbus(); 241 ir = *(volatile uint32_t *)TC_3000_500_IR_CLEAR; 242 243 /* Ignore interrupts that we haven't enabled. */ 244 ir &= ~(tc_3000_500_imask & 0x1ff); 245 246 ifound = 0; 247 248 #define INCRINTRCNT(slot) tc_3000_500_intr[slot].tci_evcnt.ev_count++ 249 250 #define CHECKINTR(slot) \ 251 if (ir & tc_3000_500_intrbits[slot]) { \ 252 ifound = 1; \ 253 INCRINTRCNT(slot); \ 254 (*tc_3000_500_intr[slot].tci_func) \ 255 (tc_3000_500_intr[slot].tci_arg); \ 256 } 257 /* Do them in order of priority; highest slot # first. */ 258 CHECKINTR(TC_3000_500_DEV_CXTURBO); 259 CHECKINTR(TC_3000_500_DEV_IOASIC); 260 CHECKINTR(TC_3000_500_DEV_TCDS); 261 CHECKINTR(TC_3000_500_DEV_OPT5); 262 CHECKINTR(TC_3000_500_DEV_OPT4); 263 CHECKINTR(TC_3000_500_DEV_OPT3); 264 CHECKINTR(TC_3000_500_DEV_OPT2); 265 CHECKINTR(TC_3000_500_DEV_OPT1); 266 CHECKINTR(TC_3000_500_DEV_OPT0); 267 #undef CHECKINTR 268 269 #ifdef DIAGNOSTIC 270 #define PRINTINTR(msg, bits) \ 271 if (ir & bits) \ 272 printf(msg); 273 PRINTINTR("Second error occurred\n", TC_3000_500_IR_ERR2); 274 PRINTINTR("DMA buffer error\n", TC_3000_500_IR_DMABE); 275 PRINTINTR("DMA cross 2K boundary\n", TC_3000_500_IR_DMA2K); 276 PRINTINTR("TC reset in progress\n", TC_3000_500_IR_TCRESET); 277 PRINTINTR("TC parity error\n", TC_3000_500_IR_TCPAR); 278 PRINTINTR("DMA tag error\n", TC_3000_500_IR_DMATAG); 279 PRINTINTR("Single-bit error\n", TC_3000_500_IR_DMASBE); 280 PRINTINTR("Double-bit error\n", TC_3000_500_IR_DMADBE); 281 PRINTINTR("TC I/O timeout\n", TC_3000_500_IR_TCTIMEOUT); 282 PRINTINTR("DMA block too long\n", TC_3000_500_IR_DMABLOCK); 283 PRINTINTR("Invalid I/O address\n", TC_3000_500_IR_IOADDR); 284 PRINTINTR("DMA scatter/gather invalid\n", TC_3000_500_IR_DMASG); 285 PRINTINTR("Scatter/gather parity error\n", 286 TC_3000_500_IR_SGPAR); 287 #undef PRINTINTR 288 #endif 289 } while (ifound); 290 291 KERNEL_UNLOCK_ONE(NULL); 292 } 293 294 #if NWSDISPLAY > 0 295 /* 296 * tc_3000_500_fb_cnattach -- 297 * Attempt to map the CTB output device to a slot and attach the 298 * framebuffer as the output side of the console. 299 */ 300 int 301 tc_3000_500_fb_cnattach(uint64_t turbo_slot) 302 { 303 uint32_t output_slot; 304 305 output_slot = turbo_slot & 0xffffffff; 306 307 if (output_slot >= tc_3000_500_nslots) { 308 return EINVAL; 309 } 310 311 if (hwrpb->rpb_variation & SV_GRAPHICS) { 312 if (output_slot == 0) { 313 #if NSFB > 0 314 sfb_cnattach(KV(0x1e0000000) + 0x02000000); 315 return 0; 316 #else 317 return ENXIO; 318 #endif 319 } 320 } else { 321 /* 322 * Slots 0-2 in the tc_3000_500_slots array are only 323 * on the 500 models that also have the CXTurbo 324 * (500/800/900) and a total of 6 TC slots. For the 325 * 400/600/700, slots 0-2 are in table locations 3-5, so 326 * offset the CTB slot by 3 to get the address in our table. 327 */ 328 output_slot += 3; 329 } 330 return tc_fb_cnattach(tc_3000_500_slots[output_slot-1].tcs_addr); 331 } 332 #endif /* NWSDISPLAY */ 333 334 #if 0 335 /* 336 * tc_3000_500_ioslot -- 337 * Set the PBS bits for devices on the TC. 338 */ 339 void 340 tc_3000_500_ioslot(uint32_t slot, uint32_t flags, int set) 341 { 342 volatile uint32_t *iosp; 343 uint32_t ios; 344 int s; 345 346 iosp = (volatile uint32_t *)TC_3000_500_IOSLOT; 347 ios = *iosp; 348 flags <<= (slot * 3); 349 if (set) 350 ios |= flags; 351 else 352 ios &= ~flags; 353 s = splhigh(); 354 *iosp = ios; 355 tc_mb(); 356 splx(s); 357 } 358 #endif 359
Indexes created Thu Oct 02 10:09:58 GMT 2025