Home | History | Annotate | Line # | Download | only in tc
tc_3000_500.c revision 1.6
      1 /*	$NetBSD: tc_3000_500.c,v 1.6 1996/06/05 00:30:54 cgd Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1994, 1995 Carnegie-Mellon University.
      5  * All rights reserved.
      6  *
      7  * Author: Chris G. Demetriou
      8  *
      9  * Permission to use, copy, modify and distribute this software and
     10  * its documentation is hereby granted, provided that both the copyright
     11  * notice and this permission notice appear in all copies of the
     12  * software, derivative works or modified versions, and any portions
     13  * thereof, and that both notices appear in supporting documentation.
     14  *
     15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  *
     19  * Carnegie Mellon requests users of this software to return to
     20  *
     21  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22  *  School of Computer Science
     23  *  Carnegie Mellon University
     24  *  Pittsburgh PA 15213-3890
     25  *
     26  * any improvements or extensions that they make and grant Carnegie the
     27  * rights to redistribute these changes.
     28  */
     29 
     30 #include <sys/param.h>
     31 #include <sys/device.h>
     32 
     33 #include <machine/autoconf.h>
     34 #include <machine/pte.h>
     35 #ifndef EVCNT_COUNTERS
     36 #include <machine/intrcnt.h>
     37 #endif
     38 
     39 #include <dev/tc/tcvar.h>
     40 #include <alpha/tc/tc_conf.h>
     41 #include <alpha/tc/tc_3000_500.h>
     42 
     43 void	tc_3000_500_intr_setup __P((void));
     44 void	tc_3000_500_intr_establish __P((struct device *, void *,
     45 	    tc_intrlevel_t, int (*)(void *), void *));
     46 void	tc_3000_500_intr_disestablish __P((struct device *, void *));
     47 void	tc_3000_500_iointr __P((void *, int));
     48 
     49 int	tc_3000_500_intrnull __P((void *));
     50 
     51 #define C(x)	((void *)(u_long)x)
     52 #define	KV(x)	(phystok0seg(x))
     53 
     54 struct tc_slotdesc tc_3000_500_slots[] = {
     55 	{ KV(0x100000000), C(TC_3000_500_DEV_OPT0), },	/* 0 - opt slot 0 */
     56 	{ KV(0x120000000), C(TC_3000_500_DEV_OPT1), },	/* 1 - opt slot 1 */
     57 	{ KV(0x140000000), C(TC_3000_500_DEV_OPT2), },	/* 2 - opt slot 2 */
     58 	{ KV(0x160000000), C(TC_3000_500_DEV_OPT3), },	/* 3 - opt slot 3 */
     59 	{ KV(0x180000000), C(TC_3000_500_DEV_OPT4), },	/* 4 - opt slot 4 */
     60 	{ KV(0x1a0000000), C(TC_3000_500_DEV_OPT5), },	/* 5 - opt slot 5 */
     61 	{ KV(0x1c0000000), C(TC_3000_500_DEV_BOGUS), },	/* 6 - TCDS ASIC */
     62 	{ KV(0x1e0000000), C(TC_3000_500_DEV_BOGUS), },	/* 7 - IOCTL ASIC */
     63 };
     64 int tc_3000_500_nslots =
     65     sizeof(tc_3000_500_slots) / sizeof(tc_3000_500_slots[0]);
     66 
     67 struct tc_builtin tc_3000_500_builtins[] = {
     68 	{ "FLAMG-IO",	7, 0x00000000, C(TC_3000_500_DEV_IOASIC),	},
     69 	{ "PMAGB-BA",	7, 0x02000000, C(TC_3000_500_DEV_CXTURBO),	},
     70 	{ "PMAZ-DS ",	6, 0x00000000, C(TC_3000_500_DEV_TCDS),		},
     71 };
     72 int tc_3000_500_nbuiltins =
     73     sizeof(tc_3000_500_builtins) / sizeof(tc_3000_500_builtins[0]);
     74 
     75 u_int32_t tc_3000_500_intrbits[TC_3000_500_NCOOKIES] = {
     76 	TC_3000_500_IR_OPT0,
     77 	TC_3000_500_IR_OPT1,
     78 	TC_3000_500_IR_OPT2,
     79 	TC_3000_500_IR_OPT3,
     80 	TC_3000_500_IR_OPT4,
     81 	TC_3000_500_IR_OPT5,
     82 	TC_3000_500_IR_TCDS,
     83 	TC_3000_500_IR_IOASIC,
     84 	TC_3000_500_IR_CXTURBO,
     85 };
     86 
     87 struct tcintr {
     88 	int	(*tci_func) __P((void *));
     89 	void	*tci_arg;
     90 } tc_3000_500_intr[TC_3000_500_NCOOKIES];
     91 
     92 u_int32_t tc_3000_500_imask;	/* intrs we want to ignore; mirrors IMR. */
     93 
     94 void
     95 tc_3000_500_intr_setup()
     96 {
     97 	u_long i;
     98 
     99 	/*
    100 	 * Disable all slot interrupts.  Note that this cannot
    101 	 * actually disable CXTurbo, TCDS, and IOASIC interrupts.
    102 	 */
    103 	tc_3000_500_imask = *(volatile u_int32_t *)TC_3000_500_IMR_READ;
    104 	for (i = 0; i < TC_3000_500_NCOOKIES; i++)
    105 		tc_3000_500_imask |= tc_3000_500_intrbits[i];
    106 	*(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask;
    107 	tc_mb();
    108 
    109         /*
    110 	 * Set up interrupt handlers.
    111 	 */
    112         for (i = 0; i < TC_3000_500_NCOOKIES; i++) {
    113 		tc_3000_500_intr[i].tci_func = tc_3000_500_intrnull;
    114 		tc_3000_500_intr[i].tci_arg = (void *)i;
    115         }
    116 }
    117 
    118 void
    119 tc_3000_500_intr_establish(tcadev, cookie, level, func, arg)
    120 	struct device *tcadev;
    121 	void *cookie, *arg;
    122 	tc_intrlevel_t level;
    123 	int (*func) __P((void *));
    124 {
    125 	u_long dev = (u_long)cookie;
    126 
    127 #ifdef DIAGNOSTIC
    128 	/* XXX bounds-check cookie. */
    129 #endif
    130 
    131 	if (tc_3000_500_intr[dev].tci_func != tc_3000_500_intrnull)
    132 		panic("tc_3000_500_intr_establish: cookie %d twice", dev);
    133 
    134 	tc_3000_500_intr[dev].tci_func = func;
    135 	tc_3000_500_intr[dev].tci_arg = arg;
    136 
    137 	tc_3000_500_imask &= ~tc_3000_500_intrbits[dev];
    138 	*(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask;
    139 	tc_mb();
    140 }
    141 
    142 void
    143 tc_3000_500_intr_disestablish(tcadev, cookie)
    144 	struct device *tcadev;
    145 	void *cookie;
    146 {
    147 	u_long dev = (u_long)cookie;
    148 
    149 #ifdef DIAGNOSTIC
    150 	/* XXX bounds-check cookie. */
    151 #endif
    152 
    153 	if (tc_3000_500_intr[dev].tci_func == tc_3000_500_intrnull)
    154 		panic("tc_3000_500_intr_disestablish: cookie %d bad intr",
    155 		    dev);
    156 
    157 	tc_3000_500_imask |= tc_3000_500_intrbits[dev];
    158 	*(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask;
    159 	tc_mb();
    160 
    161 	tc_3000_500_intr[dev].tci_func = tc_3000_500_intrnull;
    162 	tc_3000_500_intr[dev].tci_arg = (void *)dev;
    163 }
    164 
    165 int
    166 tc_3000_500_intrnull(val)
    167 	void *val;
    168 {
    169 
    170 	panic("tc_3000_500_intrnull: uncaught TC intr for cookie %ld\n",
    171 	    (u_long)val);
    172 }
    173 
    174 void
    175 tc_3000_500_iointr(framep, vec)
    176         void *framep;
    177         int vec;
    178 {
    179         u_int32_t ir;
    180 	int ifound;
    181 
    182 #ifdef DIAGNOSTIC
    183 	int s;
    184 	if (vec != 0x800)
    185 		panic("INVALID ASSUMPTION: vec %x, not 0x800", vec);
    186 	s = splhigh();
    187 	if (s != PSL_IPL_IO)
    188 		panic("INVALID ASSUMPTION: IPL %d, not %d", s, PSL_IPL_IO);
    189 	splx(s);
    190 #endif
    191 
    192 	do {
    193 		tc_syncbus();
    194 		ir = *(volatile u_int32_t *)TC_3000_500_IR_CLEAR;
    195 
    196 		/* Ignore interrupts that we haven't enabled. */
    197 		ir &= ~(tc_3000_500_imask & 0x1ff);
    198 
    199 		ifound = 0;
    200 
    201 #ifdef EVCNT_COUNTERS
    202 	/* No interrupt counting via evcnt counters */
    203 	XXX BREAK HERE XXX
    204 #else /* !EVCNT_COUNTERS */
    205 #define	INCRINTRCNT(slot)	intrcnt[INTRCNT_KN15 + slot]++
    206 #endif /* EVCNT_COUNTERS */
    207 
    208 #define	CHECKINTR(slot)							\
    209 		if (ir & tc_3000_500_intrbits[slot]) {			\
    210 			ifound = 1;					\
    211 			INCRINTRCNT(slot);				\
    212 			(*tc_3000_500_intr[slot].tci_func)		\
    213 			    (tc_3000_500_intr[slot].tci_arg);		\
    214 		}
    215 		/* Do them in order of priority; highest slot # first. */
    216 		CHECKINTR(TC_3000_500_DEV_CXTURBO);
    217 		CHECKINTR(TC_3000_500_DEV_IOASIC);
    218 		CHECKINTR(TC_3000_500_DEV_TCDS);
    219 		CHECKINTR(TC_3000_500_DEV_OPT5);
    220 		CHECKINTR(TC_3000_500_DEV_OPT4);
    221 		CHECKINTR(TC_3000_500_DEV_OPT3);
    222 		CHECKINTR(TC_3000_500_DEV_OPT2);
    223 		CHECKINTR(TC_3000_500_DEV_OPT1);
    224 		CHECKINTR(TC_3000_500_DEV_OPT0);
    225 #undef CHECKINTR
    226 
    227 #ifdef DIAGNOSTIC
    228 #define PRINTINTR(msg, bits)						\
    229 	if (ir & bits)							\
    230 		printf(msg);
    231 		PRINTINTR("Second error occurred\n", TC_3000_500_IR_ERR2);
    232 		PRINTINTR("DMA buffer error\n", TC_3000_500_IR_DMABE);
    233 		PRINTINTR("DMA cross 2K boundary\n", TC_3000_500_IR_DMA2K);
    234 		PRINTINTR("TC reset in progress\n", TC_3000_500_IR_TCRESET);
    235 		PRINTINTR("TC parity error\n", TC_3000_500_IR_TCPAR);
    236 		PRINTINTR("DMA tag error\n", TC_3000_500_IR_DMATAG);
    237 		PRINTINTR("Single-bit error\n", TC_3000_500_IR_DMASBE);
    238 		PRINTINTR("Double-bit error\n", TC_3000_500_IR_DMADBE);
    239 		PRINTINTR("TC I/O timeout\n", TC_3000_500_IR_TCTIMEOUT);
    240 		PRINTINTR("DMA block too long\n", TC_3000_500_IR_DMABLOCK);
    241 		PRINTINTR("Invalid I/O address\n", TC_3000_500_IR_IOADDR);
    242 		PRINTINTR("DMA scatter/gather invalid\n", TC_3000_500_IR_DMASG);
    243 		PRINTINTR("Scatter/gather parity error\n",
    244 		    TC_3000_500_IR_SGPAR);
    245 #undef PRINTINTR
    246 #endif
    247 	} while (ifound);
    248 }
    249 
    250 /*
    251  * tc_3000_500_ioslot --
    252  *	Set the PBS bits for devices on the TC.
    253  */
    254 void
    255 tc_3000_500_ioslot(slot, flags, set)
    256 	u_int32_t slot, flags;
    257 	int set;
    258 {
    259 	volatile u_int32_t *iosp;
    260 	u_int32_t ios;
    261 	int s;
    262 
    263 	iosp = (volatile u_int32_t *)TC_3000_500_IOSLOT;
    264 	ios = *iosp;
    265 	flags <<= (slot * 3);
    266 	if (set)
    267 		ios |= flags;
    268 	else
    269 		ios &= ~flags;
    270 	s = splhigh();
    271 	*iosp = ios;
    272 	tc_mb();
    273 	splx(s);
    274 }
    275