tc_bus_mem.c revision 1.29 1 1.29 dsl /* $NetBSD: tc_bus_mem.c,v 1.29 2009/03/14 15:36:00 dsl Exp $ */
2 1.1 cgd
3 1.1 cgd /*
4 1.1 cgd * Copyright (c) 1996 Carnegie-Mellon University.
5 1.1 cgd * All rights reserved.
6 1.1 cgd *
7 1.1 cgd * Author: Chris G. Demetriou
8 1.1 cgd *
9 1.1 cgd * Permission to use, copy, modify and distribute this software and
10 1.1 cgd * its documentation is hereby granted, provided that both the copyright
11 1.1 cgd * notice and this permission notice appear in all copies of the
12 1.1 cgd * software, derivative works or modified versions, and any portions
13 1.1 cgd * thereof, and that both notices appear in supporting documentation.
14 1.1 cgd *
15 1.1 cgd * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 1.1 cgd * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 1.1 cgd *
19 1.1 cgd * Carnegie Mellon requests users of this software to return to
20 1.1 cgd *
21 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 1.1 cgd * School of Computer Science
23 1.1 cgd * Carnegie Mellon University
24 1.1 cgd * Pittsburgh PA 15213-3890
25 1.1 cgd *
26 1.1 cgd * any improvements or extensions that they make and grant Carnegie the
27 1.1 cgd * rights to redistribute these changes.
28 1.1 cgd */
29 1.1 cgd
30 1.1 cgd /*
31 1.1 cgd * Common TurboChannel Chipset "bus memory" functions.
32 1.1 cgd */
33 1.14 cgd
34 1.15 cgd #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
35 1.15 cgd
36 1.29 dsl __KERNEL_RCSID(0, "$NetBSD: tc_bus_mem.c,v 1.29 2009/03/14 15:36:00 dsl Exp $");
37 1.1 cgd
38 1.1 cgd #include <sys/param.h>
39 1.7 cgd #include <sys/systm.h>
40 1.1 cgd #include <sys/malloc.h>
41 1.1 cgd #include <sys/syslog.h>
42 1.1 cgd #include <sys/device.h>
43 1.24 mrg
44 1.24 mrg #include <uvm/uvm_extern.h>
45 1.1 cgd
46 1.1 cgd #include <machine/bus.h>
47 1.1 cgd #include <dev/tc/tcvar.h>
48 1.1 cgd
49 1.16 cgd #define __C(A,B) __CONCAT(A,B)
50 1.16 cgd
51 1.8 cgd /* mapping/unmapping */
52 1.28 dsl int tc_mem_map(void *, bus_addr_t, bus_size_t, int,
53 1.28 dsl bus_space_handle_t *, int);
54 1.28 dsl void tc_mem_unmap(void *, bus_space_handle_t, bus_size_t, int);
55 1.28 dsl int tc_mem_subregion(void *, bus_space_handle_t, bus_size_t,
56 1.28 dsl bus_size_t, bus_space_handle_t *);
57 1.28 dsl
58 1.28 dsl int tc_mem_translate(void *, bus_addr_t, bus_size_t,
59 1.28 dsl int, struct alpha_bus_space_translation *);
60 1.28 dsl int tc_mem_get_window(void *, int,
61 1.28 dsl struct alpha_bus_space_translation *);
62 1.20 thorpej
63 1.8 cgd /* allocation/deallocation */
64 1.28 dsl int tc_mem_alloc(void *, bus_addr_t, bus_addr_t, bus_size_t,
65 1.8 cgd bus_size_t, bus_addr_t, int, bus_addr_t *,
66 1.28 dsl bus_space_handle_t *);
67 1.28 dsl void tc_mem_free(void *, bus_space_handle_t, bus_size_t);
68 1.8 cgd
69 1.22 drochner /* get kernel virtual address */
70 1.28 dsl void * tc_mem_vaddr(void *, bus_space_handle_t);
71 1.22 drochner
72 1.25 thorpej /* mmap for user */
73 1.28 dsl paddr_t tc_mem_mmap(void *, bus_addr_t, off_t, int, int);
74 1.25 thorpej
75 1.12 cgd /* barrier */
76 1.28 dsl inline void tc_mem_barrier(void *, bus_space_handle_t,
77 1.28 dsl bus_size_t, bus_size_t, int);
78 1.12 cgd
79 1.8 cgd /* read (single) */
80 1.28 dsl inline u_int8_t tc_mem_read_1(void *, bus_space_handle_t, bus_size_t);
81 1.28 dsl inline u_int16_t tc_mem_read_2(void *, bus_space_handle_t, bus_size_t);
82 1.28 dsl inline u_int32_t tc_mem_read_4(void *, bus_space_handle_t, bus_size_t);
83 1.28 dsl inline u_int64_t tc_mem_read_8(void *, bus_space_handle_t, bus_size_t);
84 1.8 cgd
85 1.8 cgd /* read multiple */
86 1.28 dsl void tc_mem_read_multi_1(void *, bus_space_handle_t,
87 1.28 dsl bus_size_t, u_int8_t *, bus_size_t);
88 1.28 dsl void tc_mem_read_multi_2(void *, bus_space_handle_t,
89 1.28 dsl bus_size_t, u_int16_t *, bus_size_t);
90 1.28 dsl void tc_mem_read_multi_4(void *, bus_space_handle_t,
91 1.28 dsl bus_size_t, u_int32_t *, bus_size_t);
92 1.28 dsl void tc_mem_read_multi_8(void *, bus_space_handle_t,
93 1.28 dsl bus_size_t, u_int64_t *, bus_size_t);
94 1.8 cgd
95 1.8 cgd /* read region */
96 1.28 dsl void tc_mem_read_region_1(void *, bus_space_handle_t,
97 1.28 dsl bus_size_t, u_int8_t *, bus_size_t);
98 1.28 dsl void tc_mem_read_region_2(void *, bus_space_handle_t,
99 1.28 dsl bus_size_t, u_int16_t *, bus_size_t);
100 1.28 dsl void tc_mem_read_region_4(void *, bus_space_handle_t,
101 1.28 dsl bus_size_t, u_int32_t *, bus_size_t);
102 1.28 dsl void tc_mem_read_region_8(void *, bus_space_handle_t,
103 1.28 dsl bus_size_t, u_int64_t *, bus_size_t);
104 1.8 cgd
105 1.8 cgd /* write (single) */
106 1.28 dsl inline void tc_mem_write_1(void *, bus_space_handle_t, bus_size_t,
107 1.28 dsl u_int8_t);
108 1.28 dsl inline void tc_mem_write_2(void *, bus_space_handle_t, bus_size_t,
109 1.28 dsl u_int16_t);
110 1.28 dsl inline void tc_mem_write_4(void *, bus_space_handle_t, bus_size_t,
111 1.28 dsl u_int32_t);
112 1.28 dsl inline void tc_mem_write_8(void *, bus_space_handle_t, bus_size_t,
113 1.28 dsl u_int64_t);
114 1.8 cgd
115 1.8 cgd /* write multiple */
116 1.28 dsl void tc_mem_write_multi_1(void *, bus_space_handle_t,
117 1.28 dsl bus_size_t, const u_int8_t *, bus_size_t);
118 1.28 dsl void tc_mem_write_multi_2(void *, bus_space_handle_t,
119 1.28 dsl bus_size_t, const u_int16_t *, bus_size_t);
120 1.28 dsl void tc_mem_write_multi_4(void *, bus_space_handle_t,
121 1.28 dsl bus_size_t, const u_int32_t *, bus_size_t);
122 1.28 dsl void tc_mem_write_multi_8(void *, bus_space_handle_t,
123 1.28 dsl bus_size_t, const u_int64_t *, bus_size_t);
124 1.8 cgd
125 1.8 cgd /* write region */
126 1.28 dsl void tc_mem_write_region_1(void *, bus_space_handle_t,
127 1.28 dsl bus_size_t, const u_int8_t *, bus_size_t);
128 1.28 dsl void tc_mem_write_region_2(void *, bus_space_handle_t,
129 1.28 dsl bus_size_t, const u_int16_t *, bus_size_t);
130 1.28 dsl void tc_mem_write_region_4(void *, bus_space_handle_t,
131 1.28 dsl bus_size_t, const u_int32_t *, bus_size_t);
132 1.28 dsl void tc_mem_write_region_8(void *, bus_space_handle_t,
133 1.28 dsl bus_size_t, const u_int64_t *, bus_size_t);
134 1.8 cgd
135 1.11 cgd /* set multiple */
136 1.28 dsl void tc_mem_set_multi_1(void *, bus_space_handle_t,
137 1.28 dsl bus_size_t, u_int8_t, bus_size_t);
138 1.28 dsl void tc_mem_set_multi_2(void *, bus_space_handle_t,
139 1.28 dsl bus_size_t, u_int16_t, bus_size_t);
140 1.28 dsl void tc_mem_set_multi_4(void *, bus_space_handle_t,
141 1.28 dsl bus_size_t, u_int32_t, bus_size_t);
142 1.28 dsl void tc_mem_set_multi_8(void *, bus_space_handle_t,
143 1.28 dsl bus_size_t, u_int64_t, bus_size_t);
144 1.11 cgd
145 1.11 cgd /* set region */
146 1.28 dsl void tc_mem_set_region_1(void *, bus_space_handle_t,
147 1.28 dsl bus_size_t, u_int8_t, bus_size_t);
148 1.28 dsl void tc_mem_set_region_2(void *, bus_space_handle_t,
149 1.28 dsl bus_size_t, u_int16_t, bus_size_t);
150 1.28 dsl void tc_mem_set_region_4(void *, bus_space_handle_t,
151 1.28 dsl bus_size_t, u_int32_t, bus_size_t);
152 1.28 dsl void tc_mem_set_region_8(void *, bus_space_handle_t,
153 1.28 dsl bus_size_t, u_int64_t, bus_size_t);
154 1.11 cgd
155 1.13 cgd /* copy */
156 1.28 dsl void tc_mem_copy_region_1(void *, bus_space_handle_t,
157 1.28 dsl bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
158 1.28 dsl void tc_mem_copy_region_2(void *, bus_space_handle_t,
159 1.28 dsl bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
160 1.28 dsl void tc_mem_copy_region_4(void *, bus_space_handle_t,
161 1.28 dsl bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
162 1.28 dsl void tc_mem_copy_region_8(void *, bus_space_handle_t,
163 1.28 dsl bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
164 1.13 cgd
165 1.8 cgd static struct alpha_bus_space tc_mem_space = {
166 1.8 cgd /* cookie */
167 1.8 cgd NULL,
168 1.8 cgd
169 1.8 cgd /* mapping/unmapping */
170 1.8 cgd tc_mem_map,
171 1.8 cgd tc_mem_unmap,
172 1.8 cgd tc_mem_subregion,
173 1.8 cgd
174 1.20 thorpej tc_mem_translate,
175 1.21 thorpej tc_mem_get_window,
176 1.20 thorpej
177 1.8 cgd /* allocation/deallocation */
178 1.8 cgd tc_mem_alloc,
179 1.8 cgd tc_mem_free,
180 1.8 cgd
181 1.22 drochner /* get kernel virtual address */
182 1.23 tron tc_mem_vaddr,
183 1.22 drochner
184 1.25 thorpej /* mmap for user */
185 1.25 thorpej tc_mem_mmap,
186 1.25 thorpej
187 1.12 cgd /* barrier */
188 1.12 cgd tc_mem_barrier,
189 1.12 cgd
190 1.8 cgd /* read (single) */
191 1.8 cgd tc_mem_read_1,
192 1.8 cgd tc_mem_read_2,
193 1.8 cgd tc_mem_read_4,
194 1.8 cgd tc_mem_read_8,
195 1.8 cgd
196 1.11 cgd /* read multiple */
197 1.8 cgd tc_mem_read_multi_1,
198 1.8 cgd tc_mem_read_multi_2,
199 1.8 cgd tc_mem_read_multi_4,
200 1.8 cgd tc_mem_read_multi_8,
201 1.8 cgd
202 1.8 cgd /* read region */
203 1.8 cgd tc_mem_read_region_1,
204 1.8 cgd tc_mem_read_region_2,
205 1.8 cgd tc_mem_read_region_4,
206 1.8 cgd tc_mem_read_region_8,
207 1.8 cgd
208 1.8 cgd /* write (single) */
209 1.8 cgd tc_mem_write_1,
210 1.8 cgd tc_mem_write_2,
211 1.8 cgd tc_mem_write_4,
212 1.8 cgd tc_mem_write_8,
213 1.8 cgd
214 1.11 cgd /* write multiple */
215 1.8 cgd tc_mem_write_multi_1,
216 1.8 cgd tc_mem_write_multi_2,
217 1.8 cgd tc_mem_write_multi_4,
218 1.8 cgd tc_mem_write_multi_8,
219 1.8 cgd
220 1.8 cgd /* write region */
221 1.8 cgd tc_mem_write_region_1,
222 1.8 cgd tc_mem_write_region_2,
223 1.8 cgd tc_mem_write_region_4,
224 1.8 cgd tc_mem_write_region_8,
225 1.8 cgd
226 1.11 cgd /* set multiple */
227 1.11 cgd tc_mem_set_multi_1,
228 1.11 cgd tc_mem_set_multi_2,
229 1.11 cgd tc_mem_set_multi_4,
230 1.11 cgd tc_mem_set_multi_8,
231 1.8 cgd
232 1.8 cgd /* set region */
233 1.11 cgd tc_mem_set_region_1,
234 1.11 cgd tc_mem_set_region_2,
235 1.11 cgd tc_mem_set_region_4,
236 1.11 cgd tc_mem_set_region_8,
237 1.8 cgd
238 1.8 cgd /* copy */
239 1.16 cgd tc_mem_copy_region_1,
240 1.16 cgd tc_mem_copy_region_2,
241 1.16 cgd tc_mem_copy_region_4,
242 1.16 cgd tc_mem_copy_region_8,
243 1.8 cgd };
244 1.1 cgd
245 1.8 cgd bus_space_tag_t
246 1.29 dsl tc_bus_mem_init(void *memv)
247 1.1 cgd {
248 1.8 cgd bus_space_tag_t h = &tc_mem_space;
249 1.1 cgd
250 1.8 cgd h->abs_cookie = memv;
251 1.8 cgd return (h);
252 1.20 thorpej }
253 1.20 thorpej
254 1.20 thorpej /* ARGSUSED */
255 1.20 thorpej int
256 1.29 dsl tc_mem_translate(void *v, bus_addr_t memaddr, bus_size_t memlen, int flags, struct alpha_bus_space_translation *abst)
257 1.21 thorpej {
258 1.21 thorpej
259 1.21 thorpej return (EOPNOTSUPP);
260 1.21 thorpej }
261 1.21 thorpej
262 1.21 thorpej /* ARGSUSED */
263 1.21 thorpej int
264 1.29 dsl tc_mem_get_window(void *v, int window, struct alpha_bus_space_translation *abst)
265 1.20 thorpej {
266 1.20 thorpej
267 1.20 thorpej return (EOPNOTSUPP);
268 1.1 cgd }
269 1.1 cgd
270 1.18 thorpej /* ARGSUSED */
271 1.1 cgd int
272 1.29 dsl tc_mem_map(void *v, bus_addr_t memaddr, bus_size_t memsize, int flags, bus_space_handle_t *memhp, int acct)
273 1.1 cgd {
274 1.16 cgd int cacheable = flags & BUS_SPACE_MAP_CACHEABLE;
275 1.16 cgd int linear = flags & BUS_SPACE_MAP_LINEAR;
276 1.16 cgd
277 1.16 cgd /* Requests for linear uncacheable space can't be satisfied. */
278 1.16 cgd if (linear && !cacheable)
279 1.16 cgd return (EOPNOTSUPP);
280 1.1 cgd
281 1.1 cgd if (memaddr & 0x7)
282 1.1 cgd panic("tc_mem_map needs 8 byte alignment");
283 1.1 cgd if (cacheable)
284 1.7 cgd *memhp = ALPHA_PHYS_TO_K0SEG(memaddr);
285 1.1 cgd else
286 1.7 cgd *memhp = ALPHA_PHYS_TO_K0SEG(TC_DENSE_TO_SPARSE(memaddr));
287 1.1 cgd return (0);
288 1.1 cgd }
289 1.1 cgd
290 1.18 thorpej /* ARGSUSED */
291 1.1 cgd void
292 1.29 dsl tc_mem_unmap(void *v, bus_space_handle_t memh, bus_size_t memsize, int acct)
293 1.1 cgd {
294 1.1 cgd
295 1.8 cgd /* XXX XX XXX nothing to do. */
296 1.1 cgd }
297 1.1 cgd
298 1.4 cgd int
299 1.4 cgd tc_mem_subregion(v, memh, offset, size, nmemh)
300 1.4 cgd void *v;
301 1.8 cgd bus_space_handle_t memh, *nmemh;
302 1.8 cgd bus_size_t offset, size;
303 1.4 cgd {
304 1.4 cgd
305 1.5 cgd /* Disallow subregioning that would make the handle unaligned. */
306 1.5 cgd if ((offset & 0x7) != 0)
307 1.5 cgd return (1);
308 1.5 cgd
309 1.4 cgd if ((memh & TC_SPACE_SPARSE) != 0)
310 1.6 cgd *nmemh = memh + (offset << 1);
311 1.4 cgd else
312 1.6 cgd *nmemh = memh + offset;
313 1.5 cgd
314 1.4 cgd return (0);
315 1.4 cgd }
316 1.4 cgd
317 1.8 cgd int
318 1.16 cgd tc_mem_alloc(v, rstart, rend, size, align, boundary, flags, addrp, bshp)
319 1.8 cgd void *v;
320 1.8 cgd bus_addr_t rstart, rend, *addrp;
321 1.8 cgd bus_size_t size, align, boundary;
322 1.16 cgd int flags;
323 1.8 cgd bus_space_handle_t *bshp;
324 1.8 cgd {
325 1.8 cgd
326 1.8 cgd /* XXX XXX XXX XXX XXX XXX */
327 1.8 cgd panic("tc_mem_alloc unimplemented");
328 1.8 cgd }
329 1.8 cgd
330 1.8 cgd void
331 1.29 dsl tc_mem_free(void *v, bus_space_handle_t bsh, bus_size_t size)
332 1.8 cgd {
333 1.8 cgd
334 1.8 cgd /* XXX XXX XXX XXX XXX XXX */
335 1.8 cgd panic("tc_mem_free unimplemented");
336 1.22 drochner }
337 1.22 drochner
338 1.22 drochner void *
339 1.29 dsl tc_mem_vaddr(void *v, bus_space_handle_t bsh)
340 1.22 drochner {
341 1.22 drochner #ifdef DIAGNOSTIC
342 1.22 drochner if ((bsh & TC_SPACE_SPARSE) != 0) {
343 1.22 drochner /*
344 1.22 drochner * tc_mem_map() catches linear && !cacheable,
345 1.22 drochner * so we shouldn't come here
346 1.22 drochner */
347 1.22 drochner panic("tc_mem_vaddr");
348 1.22 drochner }
349 1.22 drochner #endif
350 1.22 drochner return ((void *)bsh);
351 1.25 thorpej }
352 1.25 thorpej
353 1.25 thorpej paddr_t
354 1.29 dsl tc_mem_mmap(void *v, bus_addr_t addr, off_t off, int prot, int flags)
355 1.25 thorpej {
356 1.25 thorpej int linear = flags & BUS_SPACE_MAP_LINEAR;
357 1.25 thorpej bus_addr_t rv;
358 1.25 thorpej
359 1.25 thorpej if (linear)
360 1.25 thorpej rv = addr + off;
361 1.25 thorpej else
362 1.25 thorpej rv = TC_DENSE_TO_SPARSE(addr + off);
363 1.25 thorpej
364 1.25 thorpej return (alpha_btop(rv));
365 1.8 cgd }
366 1.8 cgd
367 1.12 cgd inline void
368 1.12 cgd tc_mem_barrier(v, h, o, l, f)
369 1.12 cgd void *v;
370 1.12 cgd bus_space_handle_t h;
371 1.12 cgd bus_size_t o, l;
372 1.12 cgd int f;
373 1.12 cgd {
374 1.12 cgd
375 1.16 cgd if ((f & BUS_SPACE_BARRIER_READ) != 0)
376 1.12 cgd alpha_mb();
377 1.16 cgd else if ((f & BUS_SPACE_BARRIER_WRITE) != 0)
378 1.12 cgd alpha_wmb();
379 1.12 cgd }
380 1.12 cgd
381 1.10 cgd inline u_int8_t
382 1.29 dsl tc_mem_read_1(void *v, bus_space_handle_t memh, bus_size_t off)
383 1.1 cgd {
384 1.1 cgd volatile u_int8_t *p;
385 1.1 cgd
386 1.8 cgd alpha_mb(); /* XXX XXX XXX */
387 1.2 cgd
388 1.1 cgd if ((memh & TC_SPACE_SPARSE) != 0)
389 1.1 cgd panic("tc_mem_read_1 not implemented for sparse space");
390 1.1 cgd
391 1.1 cgd p = (u_int8_t *)(memh + off);
392 1.1 cgd return (*p);
393 1.1 cgd }
394 1.1 cgd
395 1.10 cgd inline u_int16_t
396 1.29 dsl tc_mem_read_2(void *v, bus_space_handle_t memh, bus_size_t off)
397 1.1 cgd {
398 1.1 cgd volatile u_int16_t *p;
399 1.1 cgd
400 1.8 cgd alpha_mb(); /* XXX XXX XXX */
401 1.2 cgd
402 1.1 cgd if ((memh & TC_SPACE_SPARSE) != 0)
403 1.1 cgd panic("tc_mem_read_2 not implemented for sparse space");
404 1.1 cgd
405 1.1 cgd p = (u_int16_t *)(memh + off);
406 1.1 cgd return (*p);
407 1.1 cgd }
408 1.1 cgd
409 1.10 cgd inline u_int32_t
410 1.29 dsl tc_mem_read_4(void *v, bus_space_handle_t memh, bus_size_t off)
411 1.1 cgd {
412 1.1 cgd volatile u_int32_t *p;
413 1.1 cgd
414 1.8 cgd alpha_mb(); /* XXX XXX XXX */
415 1.2 cgd
416 1.1 cgd if ((memh & TC_SPACE_SPARSE) != 0)
417 1.1 cgd /* Nothing special to do for 4-byte sparse space accesses */
418 1.1 cgd p = (u_int32_t *)(memh + (off << 1));
419 1.1 cgd else
420 1.1 cgd p = (u_int32_t *)(memh + off);
421 1.1 cgd return (*p);
422 1.1 cgd }
423 1.1 cgd
424 1.10 cgd inline u_int64_t
425 1.29 dsl tc_mem_read_8(void *v, bus_space_handle_t memh, bus_size_t off)
426 1.1 cgd {
427 1.1 cgd volatile u_int64_t *p;
428 1.1 cgd
429 1.8 cgd alpha_mb(); /* XXX XXX XXX */
430 1.2 cgd
431 1.1 cgd if ((memh & TC_SPACE_SPARSE) != 0)
432 1.1 cgd panic("tc_mem_read_8 not implemented for sparse space");
433 1.1 cgd
434 1.1 cgd p = (u_int64_t *)(memh + off);
435 1.1 cgd return (*p);
436 1.1 cgd }
437 1.1 cgd
438 1.8 cgd #define tc_mem_read_multi_N(BYTES,TYPE) \
439 1.8 cgd void \
440 1.16 cgd __C(tc_mem_read_multi_,BYTES)(v, h, o, a, c) \
441 1.8 cgd void *v; \
442 1.8 cgd bus_space_handle_t h; \
443 1.8 cgd bus_size_t o, c; \
444 1.8 cgd TYPE *a; \
445 1.8 cgd { \
446 1.8 cgd \
447 1.8 cgd while (c-- > 0) { \
448 1.16 cgd tc_mem_barrier(v, h, o, sizeof *a, BUS_SPACE_BARRIER_READ); \
449 1.16 cgd *a++ = __C(tc_mem_read_,BYTES)(v, h, o); \
450 1.8 cgd } \
451 1.8 cgd }
452 1.8 cgd tc_mem_read_multi_N(1,u_int8_t)
453 1.8 cgd tc_mem_read_multi_N(2,u_int16_t)
454 1.8 cgd tc_mem_read_multi_N(4,u_int32_t)
455 1.8 cgd tc_mem_read_multi_N(8,u_int64_t)
456 1.8 cgd
457 1.8 cgd #define tc_mem_read_region_N(BYTES,TYPE) \
458 1.8 cgd void \
459 1.16 cgd __C(tc_mem_read_region_,BYTES)(v, h, o, a, c) \
460 1.8 cgd void *v; \
461 1.8 cgd bus_space_handle_t h; \
462 1.8 cgd bus_size_t o, c; \
463 1.8 cgd TYPE *a; \
464 1.8 cgd { \
465 1.8 cgd \
466 1.8 cgd while (c-- > 0) { \
467 1.16 cgd *a++ = __C(tc_mem_read_,BYTES)(v, h, o); \
468 1.9 cgd o += sizeof *a; \
469 1.8 cgd } \
470 1.8 cgd }
471 1.8 cgd tc_mem_read_region_N(1,u_int8_t)
472 1.8 cgd tc_mem_read_region_N(2,u_int16_t)
473 1.8 cgd tc_mem_read_region_N(4,u_int32_t)
474 1.8 cgd tc_mem_read_region_N(8,u_int64_t)
475 1.8 cgd
476 1.10 cgd inline void
477 1.29 dsl tc_mem_write_1(void *v, bus_space_handle_t memh, bus_size_t off, u_int8_t val)
478 1.1 cgd {
479 1.1 cgd
480 1.1 cgd if ((memh & TC_SPACE_SPARSE) != 0) {
481 1.26 he volatile u_int64_t *p, vl;
482 1.1 cgd u_int64_t shift, msk;
483 1.1 cgd
484 1.5 cgd shift = off & 0x3;
485 1.1 cgd off &= 0x3;
486 1.1 cgd
487 1.1 cgd p = (u_int64_t *)(memh + (off << 1));
488 1.1 cgd
489 1.1 cgd msk = ~(0x1 << shift) & 0xf;
490 1.26 he vl = (msk << 32) | (((u_int64_t)val) << (shift * 8));
491 1.1 cgd
492 1.1 cgd *p = val;
493 1.1 cgd } else {
494 1.1 cgd volatile u_int8_t *p;
495 1.1 cgd
496 1.1 cgd p = (u_int8_t *)(memh + off);
497 1.1 cgd *p = val;
498 1.1 cgd }
499 1.8 cgd alpha_mb(); /* XXX XXX XXX */
500 1.1 cgd }
501 1.1 cgd
502 1.10 cgd inline void
503 1.29 dsl tc_mem_write_2(void *v, bus_space_handle_t memh, bus_size_t off, u_int16_t val)
504 1.1 cgd {
505 1.1 cgd
506 1.1 cgd if ((memh & TC_SPACE_SPARSE) != 0) {
507 1.26 he volatile u_int64_t *p, vl;
508 1.1 cgd u_int64_t shift, msk;
509 1.1 cgd
510 1.5 cgd shift = off & 0x2;
511 1.1 cgd off &= 0x3;
512 1.1 cgd
513 1.1 cgd p = (u_int64_t *)(memh + (off << 1));
514 1.1 cgd
515 1.1 cgd msk = ~(0x3 << shift) & 0xf;
516 1.26 he vl = (msk << 32) | (((u_int64_t)val) << (shift * 8));
517 1.1 cgd
518 1.1 cgd *p = val;
519 1.1 cgd } else {
520 1.1 cgd volatile u_int16_t *p;
521 1.1 cgd
522 1.1 cgd p = (u_int16_t *)(memh + off);
523 1.1 cgd *p = val;
524 1.1 cgd }
525 1.8 cgd alpha_mb(); /* XXX XXX XXX */
526 1.1 cgd }
527 1.1 cgd
528 1.10 cgd inline void
529 1.29 dsl tc_mem_write_4(void *v, bus_space_handle_t memh, bus_size_t off, u_int32_t val)
530 1.1 cgd {
531 1.1 cgd volatile u_int32_t *p;
532 1.1 cgd
533 1.1 cgd if ((memh & TC_SPACE_SPARSE) != 0)
534 1.1 cgd /* Nothing special to do for 4-byte sparse space accesses */
535 1.1 cgd p = (u_int32_t *)(memh + (off << 1));
536 1.1 cgd else
537 1.1 cgd p = (u_int32_t *)(memh + off);
538 1.1 cgd *p = val;
539 1.8 cgd alpha_mb(); /* XXX XXX XXX */
540 1.1 cgd }
541 1.1 cgd
542 1.10 cgd inline void
543 1.29 dsl tc_mem_write_8(void *v, bus_space_handle_t memh, bus_size_t off, u_int64_t val)
544 1.1 cgd {
545 1.1 cgd volatile u_int64_t *p;
546 1.1 cgd
547 1.1 cgd if ((memh & TC_SPACE_SPARSE) != 0)
548 1.1 cgd panic("tc_mem_read_8 not implemented for sparse space");
549 1.1 cgd
550 1.1 cgd p = (u_int64_t *)(memh + off);
551 1.1 cgd *p = val;
552 1.8 cgd alpha_mb(); /* XXX XXX XXX */
553 1.3 cgd }
554 1.10 cgd
555 1.8 cgd #define tc_mem_write_multi_N(BYTES,TYPE) \
556 1.8 cgd void \
557 1.16 cgd __C(tc_mem_write_multi_,BYTES)(v, h, o, a, c) \
558 1.8 cgd void *v; \
559 1.8 cgd bus_space_handle_t h; \
560 1.8 cgd bus_size_t o, c; \
561 1.8 cgd const TYPE *a; \
562 1.8 cgd { \
563 1.8 cgd \
564 1.8 cgd while (c-- > 0) { \
565 1.16 cgd __C(tc_mem_write_,BYTES)(v, h, o, *a++); \
566 1.16 cgd tc_mem_barrier(v, h, o, sizeof *a, BUS_SPACE_BARRIER_WRITE); \
567 1.8 cgd } \
568 1.8 cgd }
569 1.8 cgd tc_mem_write_multi_N(1,u_int8_t)
570 1.8 cgd tc_mem_write_multi_N(2,u_int16_t)
571 1.8 cgd tc_mem_write_multi_N(4,u_int32_t)
572 1.8 cgd tc_mem_write_multi_N(8,u_int64_t)
573 1.8 cgd
574 1.8 cgd #define tc_mem_write_region_N(BYTES,TYPE) \
575 1.8 cgd void \
576 1.16 cgd __C(tc_mem_write_region_,BYTES)(v, h, o, a, c) \
577 1.8 cgd void *v; \
578 1.8 cgd bus_space_handle_t h; \
579 1.8 cgd bus_size_t o, c; \
580 1.8 cgd const TYPE *a; \
581 1.8 cgd { \
582 1.8 cgd \
583 1.8 cgd while (c-- > 0) { \
584 1.16 cgd __C(tc_mem_write_,BYTES)(v, h, o, *a++); \
585 1.9 cgd o += sizeof *a; \
586 1.8 cgd } \
587 1.8 cgd }
588 1.8 cgd tc_mem_write_region_N(1,u_int8_t)
589 1.8 cgd tc_mem_write_region_N(2,u_int16_t)
590 1.8 cgd tc_mem_write_region_N(4,u_int32_t)
591 1.8 cgd tc_mem_write_region_N(8,u_int64_t)
592 1.11 cgd
593 1.11 cgd #define tc_mem_set_multi_N(BYTES,TYPE) \
594 1.11 cgd void \
595 1.16 cgd __C(tc_mem_set_multi_,BYTES)(v, h, o, val, c) \
596 1.11 cgd void *v; \
597 1.11 cgd bus_space_handle_t h; \
598 1.11 cgd bus_size_t o, c; \
599 1.11 cgd TYPE val; \
600 1.11 cgd { \
601 1.11 cgd \
602 1.11 cgd while (c-- > 0) { \
603 1.16 cgd __C(tc_mem_write_,BYTES)(v, h, o, val); \
604 1.16 cgd tc_mem_barrier(v, h, o, sizeof val, BUS_SPACE_BARRIER_WRITE); \
605 1.11 cgd } \
606 1.11 cgd }
607 1.11 cgd tc_mem_set_multi_N(1,u_int8_t)
608 1.11 cgd tc_mem_set_multi_N(2,u_int16_t)
609 1.11 cgd tc_mem_set_multi_N(4,u_int32_t)
610 1.11 cgd tc_mem_set_multi_N(8,u_int64_t)
611 1.11 cgd
612 1.11 cgd #define tc_mem_set_region_N(BYTES,TYPE) \
613 1.11 cgd void \
614 1.16 cgd __C(tc_mem_set_region_,BYTES)(v, h, o, val, c) \
615 1.11 cgd void *v; \
616 1.11 cgd bus_space_handle_t h; \
617 1.11 cgd bus_size_t o, c; \
618 1.11 cgd TYPE val; \
619 1.11 cgd { \
620 1.11 cgd \
621 1.11 cgd while (c-- > 0) { \
622 1.16 cgd __C(tc_mem_write_,BYTES)(v, h, o, val); \
623 1.11 cgd o += sizeof val; \
624 1.11 cgd } \
625 1.11 cgd }
626 1.11 cgd tc_mem_set_region_N(1,u_int8_t)
627 1.11 cgd tc_mem_set_region_N(2,u_int16_t)
628 1.11 cgd tc_mem_set_region_N(4,u_int32_t)
629 1.11 cgd tc_mem_set_region_N(8,u_int64_t)
630 1.13 cgd
631 1.16 cgd #define tc_mem_copy_region_N(BYTES) \
632 1.13 cgd void \
633 1.16 cgd __C(tc_mem_copy_region_,BYTES)(v, h1, o1, h2, o2, c) \
634 1.13 cgd void *v; \
635 1.13 cgd bus_space_handle_t h1, h2; \
636 1.13 cgd bus_size_t o1, o2, c; \
637 1.13 cgd { \
638 1.16 cgd bus_size_t o; \
639 1.13 cgd \
640 1.13 cgd if ((h1 & TC_SPACE_SPARSE) != 0 && \
641 1.13 cgd (h2 & TC_SPACE_SPARSE) != 0) { \
642 1.19 perry memmove((void *)(h2 + o2), (void *)(h1 + o1), c * BYTES); \
643 1.13 cgd return; \
644 1.13 cgd } \
645 1.13 cgd \
646 1.16 cgd if (h1 + o1 >= h2 + o2) \
647 1.16 cgd /* src after dest: copy forward */ \
648 1.16 cgd for (o = 0; c > 0; c--, o += BYTES) \
649 1.16 cgd __C(tc_mem_write_,BYTES)(v, h2, o2 + o, \
650 1.16 cgd __C(tc_mem_read_,BYTES)(v, h1, o1 + o)); \
651 1.16 cgd else \
652 1.16 cgd /* dest after src: copy backwards */ \
653 1.16 cgd for (o = (c - 1) * BYTES; c > 0; c--, o -= BYTES) \
654 1.16 cgd __C(tc_mem_write_,BYTES)(v, h2, o2 + o, \
655 1.16 cgd __C(tc_mem_read_,BYTES)(v, h1, o1 + o)); \
656 1.16 cgd }
657 1.16 cgd tc_mem_copy_region_N(1)
658 1.16 cgd tc_mem_copy_region_N(2)
659 1.16 cgd tc_mem_copy_region_N(4)
660 1.16 cgd tc_mem_copy_region_N(8)
661