tc_bus_mem.c revision 1.33 1 1.33 chs /* $NetBSD: tc_bus_mem.c,v 1.33 2011/09/25 13:36:53 chs Exp $ */
2 1.1 cgd
3 1.1 cgd /*
4 1.1 cgd * Copyright (c) 1996 Carnegie-Mellon University.
5 1.1 cgd * All rights reserved.
6 1.1 cgd *
7 1.1 cgd * Author: Chris G. Demetriou
8 1.1 cgd *
9 1.1 cgd * Permission to use, copy, modify and distribute this software and
10 1.1 cgd * its documentation is hereby granted, provided that both the copyright
11 1.1 cgd * notice and this permission notice appear in all copies of the
12 1.1 cgd * software, derivative works or modified versions, and any portions
13 1.1 cgd * thereof, and that both notices appear in supporting documentation.
14 1.1 cgd *
15 1.1 cgd * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 1.1 cgd * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 1.1 cgd *
19 1.1 cgd * Carnegie Mellon requests users of this software to return to
20 1.1 cgd *
21 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 1.1 cgd * School of Computer Science
23 1.1 cgd * Carnegie Mellon University
24 1.1 cgd * Pittsburgh PA 15213-3890
25 1.1 cgd *
26 1.1 cgd * any improvements or extensions that they make and grant Carnegie the
27 1.1 cgd * rights to redistribute these changes.
28 1.1 cgd */
29 1.1 cgd
30 1.1 cgd /*
31 1.1 cgd * Common TurboChannel Chipset "bus memory" functions.
32 1.1 cgd */
33 1.14 cgd
34 1.15 cgd #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
35 1.15 cgd
36 1.33 chs __KERNEL_RCSID(0, "$NetBSD: tc_bus_mem.c,v 1.33 2011/09/25 13:36:53 chs Exp $");
37 1.1 cgd
38 1.1 cgd #include <sys/param.h>
39 1.7 cgd #include <sys/systm.h>
40 1.1 cgd #include <sys/malloc.h>
41 1.1 cgd #include <sys/syslog.h>
42 1.1 cgd #include <sys/device.h>
43 1.24 mrg
44 1.32 dyoung #include <sys/bus.h>
45 1.1 cgd #include <dev/tc/tcvar.h>
46 1.1 cgd
47 1.16 cgd #define __C(A,B) __CONCAT(A,B)
48 1.16 cgd
49 1.8 cgd /* mapping/unmapping */
50 1.28 dsl int tc_mem_map(void *, bus_addr_t, bus_size_t, int,
51 1.28 dsl bus_space_handle_t *, int);
52 1.28 dsl void tc_mem_unmap(void *, bus_space_handle_t, bus_size_t, int);
53 1.28 dsl int tc_mem_subregion(void *, bus_space_handle_t, bus_size_t,
54 1.28 dsl bus_size_t, bus_space_handle_t *);
55 1.28 dsl
56 1.28 dsl int tc_mem_translate(void *, bus_addr_t, bus_size_t,
57 1.28 dsl int, struct alpha_bus_space_translation *);
58 1.28 dsl int tc_mem_get_window(void *, int,
59 1.28 dsl struct alpha_bus_space_translation *);
60 1.20 thorpej
61 1.8 cgd /* allocation/deallocation */
62 1.28 dsl int tc_mem_alloc(void *, bus_addr_t, bus_addr_t, bus_size_t,
63 1.8 cgd bus_size_t, bus_addr_t, int, bus_addr_t *,
64 1.28 dsl bus_space_handle_t *);
65 1.28 dsl void tc_mem_free(void *, bus_space_handle_t, bus_size_t);
66 1.8 cgd
67 1.22 drochner /* get kernel virtual address */
68 1.28 dsl void * tc_mem_vaddr(void *, bus_space_handle_t);
69 1.22 drochner
70 1.25 thorpej /* mmap for user */
71 1.28 dsl paddr_t tc_mem_mmap(void *, bus_addr_t, off_t, int, int);
72 1.25 thorpej
73 1.12 cgd /* barrier */
74 1.33 chs static inline void tc_mem_barrier(void *, bus_space_handle_t,
75 1.28 dsl bus_size_t, bus_size_t, int);
76 1.12 cgd
77 1.8 cgd /* read (single) */
78 1.33 chs static inline u_int8_t tc_mem_read_1(void *, bus_space_handle_t, bus_size_t);
79 1.33 chs static inline u_int16_t tc_mem_read_2(void *, bus_space_handle_t, bus_size_t);
80 1.33 chs static inline u_int32_t tc_mem_read_4(void *, bus_space_handle_t, bus_size_t);
81 1.33 chs static inline u_int64_t tc_mem_read_8(void *, bus_space_handle_t, bus_size_t);
82 1.8 cgd
83 1.8 cgd /* read multiple */
84 1.28 dsl void tc_mem_read_multi_1(void *, bus_space_handle_t,
85 1.28 dsl bus_size_t, u_int8_t *, bus_size_t);
86 1.28 dsl void tc_mem_read_multi_2(void *, bus_space_handle_t,
87 1.28 dsl bus_size_t, u_int16_t *, bus_size_t);
88 1.28 dsl void tc_mem_read_multi_4(void *, bus_space_handle_t,
89 1.28 dsl bus_size_t, u_int32_t *, bus_size_t);
90 1.28 dsl void tc_mem_read_multi_8(void *, bus_space_handle_t,
91 1.28 dsl bus_size_t, u_int64_t *, bus_size_t);
92 1.8 cgd
93 1.8 cgd /* read region */
94 1.28 dsl void tc_mem_read_region_1(void *, bus_space_handle_t,
95 1.28 dsl bus_size_t, u_int8_t *, bus_size_t);
96 1.28 dsl void tc_mem_read_region_2(void *, bus_space_handle_t,
97 1.28 dsl bus_size_t, u_int16_t *, bus_size_t);
98 1.28 dsl void tc_mem_read_region_4(void *, bus_space_handle_t,
99 1.28 dsl bus_size_t, u_int32_t *, bus_size_t);
100 1.28 dsl void tc_mem_read_region_8(void *, bus_space_handle_t,
101 1.28 dsl bus_size_t, u_int64_t *, bus_size_t);
102 1.8 cgd
103 1.8 cgd /* write (single) */
104 1.33 chs static inline void tc_mem_write_1(void *, bus_space_handle_t, bus_size_t,
105 1.28 dsl u_int8_t);
106 1.33 chs static inline void tc_mem_write_2(void *, bus_space_handle_t, bus_size_t,
107 1.28 dsl u_int16_t);
108 1.33 chs static inline void tc_mem_write_4(void *, bus_space_handle_t, bus_size_t,
109 1.28 dsl u_int32_t);
110 1.33 chs static inline void tc_mem_write_8(void *, bus_space_handle_t, bus_size_t,
111 1.28 dsl u_int64_t);
112 1.8 cgd
113 1.8 cgd /* write multiple */
114 1.28 dsl void tc_mem_write_multi_1(void *, bus_space_handle_t,
115 1.28 dsl bus_size_t, const u_int8_t *, bus_size_t);
116 1.28 dsl void tc_mem_write_multi_2(void *, bus_space_handle_t,
117 1.28 dsl bus_size_t, const u_int16_t *, bus_size_t);
118 1.28 dsl void tc_mem_write_multi_4(void *, bus_space_handle_t,
119 1.28 dsl bus_size_t, const u_int32_t *, bus_size_t);
120 1.28 dsl void tc_mem_write_multi_8(void *, bus_space_handle_t,
121 1.28 dsl bus_size_t, const u_int64_t *, bus_size_t);
122 1.8 cgd
123 1.8 cgd /* write region */
124 1.28 dsl void tc_mem_write_region_1(void *, bus_space_handle_t,
125 1.28 dsl bus_size_t, const u_int8_t *, bus_size_t);
126 1.28 dsl void tc_mem_write_region_2(void *, bus_space_handle_t,
127 1.28 dsl bus_size_t, const u_int16_t *, bus_size_t);
128 1.28 dsl void tc_mem_write_region_4(void *, bus_space_handle_t,
129 1.28 dsl bus_size_t, const u_int32_t *, bus_size_t);
130 1.28 dsl void tc_mem_write_region_8(void *, bus_space_handle_t,
131 1.28 dsl bus_size_t, const u_int64_t *, bus_size_t);
132 1.8 cgd
133 1.11 cgd /* set multiple */
134 1.28 dsl void tc_mem_set_multi_1(void *, bus_space_handle_t,
135 1.28 dsl bus_size_t, u_int8_t, bus_size_t);
136 1.28 dsl void tc_mem_set_multi_2(void *, bus_space_handle_t,
137 1.28 dsl bus_size_t, u_int16_t, bus_size_t);
138 1.28 dsl void tc_mem_set_multi_4(void *, bus_space_handle_t,
139 1.28 dsl bus_size_t, u_int32_t, bus_size_t);
140 1.28 dsl void tc_mem_set_multi_8(void *, bus_space_handle_t,
141 1.28 dsl bus_size_t, u_int64_t, bus_size_t);
142 1.11 cgd
143 1.11 cgd /* set region */
144 1.28 dsl void tc_mem_set_region_1(void *, bus_space_handle_t,
145 1.28 dsl bus_size_t, u_int8_t, bus_size_t);
146 1.28 dsl void tc_mem_set_region_2(void *, bus_space_handle_t,
147 1.28 dsl bus_size_t, u_int16_t, bus_size_t);
148 1.28 dsl void tc_mem_set_region_4(void *, bus_space_handle_t,
149 1.28 dsl bus_size_t, u_int32_t, bus_size_t);
150 1.28 dsl void tc_mem_set_region_8(void *, bus_space_handle_t,
151 1.28 dsl bus_size_t, u_int64_t, bus_size_t);
152 1.11 cgd
153 1.13 cgd /* copy */
154 1.28 dsl void tc_mem_copy_region_1(void *, bus_space_handle_t,
155 1.28 dsl bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
156 1.28 dsl void tc_mem_copy_region_2(void *, bus_space_handle_t,
157 1.28 dsl bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
158 1.28 dsl void tc_mem_copy_region_4(void *, bus_space_handle_t,
159 1.28 dsl bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
160 1.28 dsl void tc_mem_copy_region_8(void *, bus_space_handle_t,
161 1.28 dsl bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
162 1.13 cgd
163 1.8 cgd static struct alpha_bus_space tc_mem_space = {
164 1.8 cgd /* cookie */
165 1.8 cgd NULL,
166 1.8 cgd
167 1.8 cgd /* mapping/unmapping */
168 1.8 cgd tc_mem_map,
169 1.8 cgd tc_mem_unmap,
170 1.8 cgd tc_mem_subregion,
171 1.8 cgd
172 1.20 thorpej tc_mem_translate,
173 1.21 thorpej tc_mem_get_window,
174 1.20 thorpej
175 1.8 cgd /* allocation/deallocation */
176 1.8 cgd tc_mem_alloc,
177 1.8 cgd tc_mem_free,
178 1.8 cgd
179 1.22 drochner /* get kernel virtual address */
180 1.23 tron tc_mem_vaddr,
181 1.22 drochner
182 1.25 thorpej /* mmap for user */
183 1.25 thorpej tc_mem_mmap,
184 1.25 thorpej
185 1.12 cgd /* barrier */
186 1.12 cgd tc_mem_barrier,
187 1.12 cgd
188 1.8 cgd /* read (single) */
189 1.8 cgd tc_mem_read_1,
190 1.8 cgd tc_mem_read_2,
191 1.8 cgd tc_mem_read_4,
192 1.8 cgd tc_mem_read_8,
193 1.8 cgd
194 1.11 cgd /* read multiple */
195 1.8 cgd tc_mem_read_multi_1,
196 1.8 cgd tc_mem_read_multi_2,
197 1.8 cgd tc_mem_read_multi_4,
198 1.8 cgd tc_mem_read_multi_8,
199 1.8 cgd
200 1.8 cgd /* read region */
201 1.8 cgd tc_mem_read_region_1,
202 1.8 cgd tc_mem_read_region_2,
203 1.8 cgd tc_mem_read_region_4,
204 1.8 cgd tc_mem_read_region_8,
205 1.8 cgd
206 1.8 cgd /* write (single) */
207 1.8 cgd tc_mem_write_1,
208 1.8 cgd tc_mem_write_2,
209 1.8 cgd tc_mem_write_4,
210 1.8 cgd tc_mem_write_8,
211 1.8 cgd
212 1.11 cgd /* write multiple */
213 1.8 cgd tc_mem_write_multi_1,
214 1.8 cgd tc_mem_write_multi_2,
215 1.8 cgd tc_mem_write_multi_4,
216 1.8 cgd tc_mem_write_multi_8,
217 1.8 cgd
218 1.8 cgd /* write region */
219 1.8 cgd tc_mem_write_region_1,
220 1.8 cgd tc_mem_write_region_2,
221 1.8 cgd tc_mem_write_region_4,
222 1.8 cgd tc_mem_write_region_8,
223 1.8 cgd
224 1.11 cgd /* set multiple */
225 1.11 cgd tc_mem_set_multi_1,
226 1.11 cgd tc_mem_set_multi_2,
227 1.11 cgd tc_mem_set_multi_4,
228 1.11 cgd tc_mem_set_multi_8,
229 1.8 cgd
230 1.8 cgd /* set region */
231 1.11 cgd tc_mem_set_region_1,
232 1.11 cgd tc_mem_set_region_2,
233 1.11 cgd tc_mem_set_region_4,
234 1.11 cgd tc_mem_set_region_8,
235 1.8 cgd
236 1.8 cgd /* copy */
237 1.16 cgd tc_mem_copy_region_1,
238 1.16 cgd tc_mem_copy_region_2,
239 1.16 cgd tc_mem_copy_region_4,
240 1.16 cgd tc_mem_copy_region_8,
241 1.8 cgd };
242 1.1 cgd
243 1.8 cgd bus_space_tag_t
244 1.29 dsl tc_bus_mem_init(void *memv)
245 1.1 cgd {
246 1.8 cgd bus_space_tag_t h = &tc_mem_space;
247 1.1 cgd
248 1.8 cgd h->abs_cookie = memv;
249 1.8 cgd return (h);
250 1.20 thorpej }
251 1.20 thorpej
252 1.20 thorpej /* ARGSUSED */
253 1.20 thorpej int
254 1.29 dsl tc_mem_translate(void *v, bus_addr_t memaddr, bus_size_t memlen, int flags, struct alpha_bus_space_translation *abst)
255 1.21 thorpej {
256 1.21 thorpej
257 1.21 thorpej return (EOPNOTSUPP);
258 1.21 thorpej }
259 1.21 thorpej
260 1.21 thorpej /* ARGSUSED */
261 1.21 thorpej int
262 1.29 dsl tc_mem_get_window(void *v, int window, struct alpha_bus_space_translation *abst)
263 1.20 thorpej {
264 1.20 thorpej
265 1.20 thorpej return (EOPNOTSUPP);
266 1.1 cgd }
267 1.1 cgd
268 1.18 thorpej /* ARGSUSED */
269 1.1 cgd int
270 1.29 dsl tc_mem_map(void *v, bus_addr_t memaddr, bus_size_t memsize, int flags, bus_space_handle_t *memhp, int acct)
271 1.1 cgd {
272 1.16 cgd int cacheable = flags & BUS_SPACE_MAP_CACHEABLE;
273 1.16 cgd int linear = flags & BUS_SPACE_MAP_LINEAR;
274 1.16 cgd
275 1.16 cgd /* Requests for linear uncacheable space can't be satisfied. */
276 1.16 cgd if (linear && !cacheable)
277 1.16 cgd return (EOPNOTSUPP);
278 1.1 cgd
279 1.1 cgd if (memaddr & 0x7)
280 1.1 cgd panic("tc_mem_map needs 8 byte alignment");
281 1.1 cgd if (cacheable)
282 1.7 cgd *memhp = ALPHA_PHYS_TO_K0SEG(memaddr);
283 1.1 cgd else
284 1.7 cgd *memhp = ALPHA_PHYS_TO_K0SEG(TC_DENSE_TO_SPARSE(memaddr));
285 1.1 cgd return (0);
286 1.1 cgd }
287 1.1 cgd
288 1.18 thorpej /* ARGSUSED */
289 1.1 cgd void
290 1.29 dsl tc_mem_unmap(void *v, bus_space_handle_t memh, bus_size_t memsize, int acct)
291 1.1 cgd {
292 1.1 cgd
293 1.8 cgd /* XXX XX XXX nothing to do. */
294 1.1 cgd }
295 1.1 cgd
296 1.4 cgd int
297 1.30 dsl tc_mem_subregion(void *v, bus_space_handle_t memh, bus_size_t offset, bus_size_t size, bus_space_handle_t *nmemh)
298 1.4 cgd {
299 1.4 cgd
300 1.5 cgd /* Disallow subregioning that would make the handle unaligned. */
301 1.5 cgd if ((offset & 0x7) != 0)
302 1.5 cgd return (1);
303 1.5 cgd
304 1.4 cgd if ((memh & TC_SPACE_SPARSE) != 0)
305 1.6 cgd *nmemh = memh + (offset << 1);
306 1.4 cgd else
307 1.6 cgd *nmemh = memh + offset;
308 1.5 cgd
309 1.4 cgd return (0);
310 1.4 cgd }
311 1.4 cgd
312 1.8 cgd int
313 1.30 dsl tc_mem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend, bus_size_t size, bus_size_t align, bus_size_t boundary, int flags, bus_addr_t *addrp, bus_space_handle_t *bshp)
314 1.8 cgd {
315 1.8 cgd
316 1.8 cgd /* XXX XXX XXX XXX XXX XXX */
317 1.8 cgd panic("tc_mem_alloc unimplemented");
318 1.8 cgd }
319 1.8 cgd
320 1.8 cgd void
321 1.29 dsl tc_mem_free(void *v, bus_space_handle_t bsh, bus_size_t size)
322 1.8 cgd {
323 1.8 cgd
324 1.8 cgd /* XXX XXX XXX XXX XXX XXX */
325 1.8 cgd panic("tc_mem_free unimplemented");
326 1.22 drochner }
327 1.22 drochner
328 1.22 drochner void *
329 1.29 dsl tc_mem_vaddr(void *v, bus_space_handle_t bsh)
330 1.22 drochner {
331 1.22 drochner #ifdef DIAGNOSTIC
332 1.22 drochner if ((bsh & TC_SPACE_SPARSE) != 0) {
333 1.22 drochner /*
334 1.22 drochner * tc_mem_map() catches linear && !cacheable,
335 1.22 drochner * so we shouldn't come here
336 1.22 drochner */
337 1.22 drochner panic("tc_mem_vaddr");
338 1.22 drochner }
339 1.22 drochner #endif
340 1.22 drochner return ((void *)bsh);
341 1.25 thorpej }
342 1.25 thorpej
343 1.25 thorpej paddr_t
344 1.29 dsl tc_mem_mmap(void *v, bus_addr_t addr, off_t off, int prot, int flags)
345 1.25 thorpej {
346 1.25 thorpej int linear = flags & BUS_SPACE_MAP_LINEAR;
347 1.25 thorpej bus_addr_t rv;
348 1.25 thorpej
349 1.25 thorpej if (linear)
350 1.25 thorpej rv = addr + off;
351 1.25 thorpej else
352 1.25 thorpej rv = TC_DENSE_TO_SPARSE(addr + off);
353 1.25 thorpej
354 1.25 thorpej return (alpha_btop(rv));
355 1.8 cgd }
356 1.8 cgd
357 1.33 chs static inline void
358 1.30 dsl tc_mem_barrier(void *v, bus_space_handle_t h, bus_size_t o, bus_size_t l, int f)
359 1.12 cgd {
360 1.12 cgd
361 1.16 cgd if ((f & BUS_SPACE_BARRIER_READ) != 0)
362 1.12 cgd alpha_mb();
363 1.16 cgd else if ((f & BUS_SPACE_BARRIER_WRITE) != 0)
364 1.12 cgd alpha_wmb();
365 1.12 cgd }
366 1.12 cgd
367 1.33 chs static inline u_int8_t
368 1.29 dsl tc_mem_read_1(void *v, bus_space_handle_t memh, bus_size_t off)
369 1.1 cgd {
370 1.1 cgd volatile u_int8_t *p;
371 1.1 cgd
372 1.8 cgd alpha_mb(); /* XXX XXX XXX */
373 1.2 cgd
374 1.1 cgd if ((memh & TC_SPACE_SPARSE) != 0)
375 1.1 cgd panic("tc_mem_read_1 not implemented for sparse space");
376 1.1 cgd
377 1.1 cgd p = (u_int8_t *)(memh + off);
378 1.1 cgd return (*p);
379 1.1 cgd }
380 1.1 cgd
381 1.33 chs static inline u_int16_t
382 1.29 dsl tc_mem_read_2(void *v, bus_space_handle_t memh, bus_size_t off)
383 1.1 cgd {
384 1.1 cgd volatile u_int16_t *p;
385 1.1 cgd
386 1.8 cgd alpha_mb(); /* XXX XXX XXX */
387 1.2 cgd
388 1.1 cgd if ((memh & TC_SPACE_SPARSE) != 0)
389 1.1 cgd panic("tc_mem_read_2 not implemented for sparse space");
390 1.1 cgd
391 1.1 cgd p = (u_int16_t *)(memh + off);
392 1.1 cgd return (*p);
393 1.1 cgd }
394 1.1 cgd
395 1.33 chs static inline u_int32_t
396 1.29 dsl tc_mem_read_4(void *v, bus_space_handle_t memh, bus_size_t off)
397 1.1 cgd {
398 1.1 cgd volatile u_int32_t *p;
399 1.1 cgd
400 1.8 cgd alpha_mb(); /* XXX XXX XXX */
401 1.2 cgd
402 1.1 cgd if ((memh & TC_SPACE_SPARSE) != 0)
403 1.1 cgd /* Nothing special to do for 4-byte sparse space accesses */
404 1.1 cgd p = (u_int32_t *)(memh + (off << 1));
405 1.1 cgd else
406 1.1 cgd p = (u_int32_t *)(memh + off);
407 1.1 cgd return (*p);
408 1.1 cgd }
409 1.1 cgd
410 1.33 chs static inline u_int64_t
411 1.29 dsl tc_mem_read_8(void *v, bus_space_handle_t memh, bus_size_t off)
412 1.1 cgd {
413 1.1 cgd volatile u_int64_t *p;
414 1.1 cgd
415 1.8 cgd alpha_mb(); /* XXX XXX XXX */
416 1.2 cgd
417 1.1 cgd if ((memh & TC_SPACE_SPARSE) != 0)
418 1.1 cgd panic("tc_mem_read_8 not implemented for sparse space");
419 1.1 cgd
420 1.1 cgd p = (u_int64_t *)(memh + off);
421 1.1 cgd return (*p);
422 1.1 cgd }
423 1.1 cgd
424 1.8 cgd #define tc_mem_read_multi_N(BYTES,TYPE) \
425 1.8 cgd void \
426 1.16 cgd __C(tc_mem_read_multi_,BYTES)(v, h, o, a, c) \
427 1.8 cgd void *v; \
428 1.8 cgd bus_space_handle_t h; \
429 1.8 cgd bus_size_t o, c; \
430 1.8 cgd TYPE *a; \
431 1.8 cgd { \
432 1.8 cgd \
433 1.8 cgd while (c-- > 0) { \
434 1.16 cgd tc_mem_barrier(v, h, o, sizeof *a, BUS_SPACE_BARRIER_READ); \
435 1.16 cgd *a++ = __C(tc_mem_read_,BYTES)(v, h, o); \
436 1.8 cgd } \
437 1.8 cgd }
438 1.8 cgd tc_mem_read_multi_N(1,u_int8_t)
439 1.8 cgd tc_mem_read_multi_N(2,u_int16_t)
440 1.8 cgd tc_mem_read_multi_N(4,u_int32_t)
441 1.8 cgd tc_mem_read_multi_N(8,u_int64_t)
442 1.8 cgd
443 1.8 cgd #define tc_mem_read_region_N(BYTES,TYPE) \
444 1.8 cgd void \
445 1.16 cgd __C(tc_mem_read_region_,BYTES)(v, h, o, a, c) \
446 1.8 cgd void *v; \
447 1.8 cgd bus_space_handle_t h; \
448 1.8 cgd bus_size_t o, c; \
449 1.8 cgd TYPE *a; \
450 1.8 cgd { \
451 1.8 cgd \
452 1.8 cgd while (c-- > 0) { \
453 1.16 cgd *a++ = __C(tc_mem_read_,BYTES)(v, h, o); \
454 1.9 cgd o += sizeof *a; \
455 1.8 cgd } \
456 1.8 cgd }
457 1.8 cgd tc_mem_read_region_N(1,u_int8_t)
458 1.8 cgd tc_mem_read_region_N(2,u_int16_t)
459 1.8 cgd tc_mem_read_region_N(4,u_int32_t)
460 1.8 cgd tc_mem_read_region_N(8,u_int64_t)
461 1.8 cgd
462 1.33 chs static inline void
463 1.29 dsl tc_mem_write_1(void *v, bus_space_handle_t memh, bus_size_t off, u_int8_t val)
464 1.1 cgd {
465 1.1 cgd
466 1.1 cgd if ((memh & TC_SPACE_SPARSE) != 0) {
467 1.26 he volatile u_int64_t *p, vl;
468 1.1 cgd u_int64_t shift, msk;
469 1.1 cgd
470 1.5 cgd shift = off & 0x3;
471 1.1 cgd off &= 0x3;
472 1.1 cgd
473 1.1 cgd p = (u_int64_t *)(memh + (off << 1));
474 1.1 cgd
475 1.1 cgd msk = ~(0x1 << shift) & 0xf;
476 1.26 he vl = (msk << 32) | (((u_int64_t)val) << (shift * 8));
477 1.1 cgd
478 1.1 cgd *p = val;
479 1.1 cgd } else {
480 1.1 cgd volatile u_int8_t *p;
481 1.1 cgd
482 1.1 cgd p = (u_int8_t *)(memh + off);
483 1.1 cgd *p = val;
484 1.1 cgd }
485 1.8 cgd alpha_mb(); /* XXX XXX XXX */
486 1.1 cgd }
487 1.1 cgd
488 1.33 chs static inline void
489 1.29 dsl tc_mem_write_2(void *v, bus_space_handle_t memh, bus_size_t off, u_int16_t val)
490 1.1 cgd {
491 1.1 cgd
492 1.1 cgd if ((memh & TC_SPACE_SPARSE) != 0) {
493 1.26 he volatile u_int64_t *p, vl;
494 1.1 cgd u_int64_t shift, msk;
495 1.1 cgd
496 1.5 cgd shift = off & 0x2;
497 1.1 cgd off &= 0x3;
498 1.1 cgd
499 1.1 cgd p = (u_int64_t *)(memh + (off << 1));
500 1.1 cgd
501 1.1 cgd msk = ~(0x3 << shift) & 0xf;
502 1.26 he vl = (msk << 32) | (((u_int64_t)val) << (shift * 8));
503 1.1 cgd
504 1.1 cgd *p = val;
505 1.1 cgd } else {
506 1.1 cgd volatile u_int16_t *p;
507 1.1 cgd
508 1.1 cgd p = (u_int16_t *)(memh + off);
509 1.1 cgd *p = val;
510 1.1 cgd }
511 1.8 cgd alpha_mb(); /* XXX XXX XXX */
512 1.1 cgd }
513 1.1 cgd
514 1.33 chs static inline void
515 1.29 dsl tc_mem_write_4(void *v, bus_space_handle_t memh, bus_size_t off, u_int32_t val)
516 1.1 cgd {
517 1.1 cgd volatile u_int32_t *p;
518 1.1 cgd
519 1.1 cgd if ((memh & TC_SPACE_SPARSE) != 0)
520 1.1 cgd /* Nothing special to do for 4-byte sparse space accesses */
521 1.1 cgd p = (u_int32_t *)(memh + (off << 1));
522 1.1 cgd else
523 1.1 cgd p = (u_int32_t *)(memh + off);
524 1.1 cgd *p = val;
525 1.8 cgd alpha_mb(); /* XXX XXX XXX */
526 1.1 cgd }
527 1.1 cgd
528 1.33 chs static inline void
529 1.29 dsl tc_mem_write_8(void *v, bus_space_handle_t memh, bus_size_t off, u_int64_t val)
530 1.1 cgd {
531 1.1 cgd volatile u_int64_t *p;
532 1.1 cgd
533 1.1 cgd if ((memh & TC_SPACE_SPARSE) != 0)
534 1.1 cgd panic("tc_mem_read_8 not implemented for sparse space");
535 1.1 cgd
536 1.1 cgd p = (u_int64_t *)(memh + off);
537 1.1 cgd *p = val;
538 1.8 cgd alpha_mb(); /* XXX XXX XXX */
539 1.3 cgd }
540 1.10 cgd
541 1.8 cgd #define tc_mem_write_multi_N(BYTES,TYPE) \
542 1.8 cgd void \
543 1.16 cgd __C(tc_mem_write_multi_,BYTES)(v, h, o, a, c) \
544 1.8 cgd void *v; \
545 1.8 cgd bus_space_handle_t h; \
546 1.8 cgd bus_size_t o, c; \
547 1.8 cgd const TYPE *a; \
548 1.8 cgd { \
549 1.8 cgd \
550 1.8 cgd while (c-- > 0) { \
551 1.16 cgd __C(tc_mem_write_,BYTES)(v, h, o, *a++); \
552 1.16 cgd tc_mem_barrier(v, h, o, sizeof *a, BUS_SPACE_BARRIER_WRITE); \
553 1.8 cgd } \
554 1.8 cgd }
555 1.8 cgd tc_mem_write_multi_N(1,u_int8_t)
556 1.8 cgd tc_mem_write_multi_N(2,u_int16_t)
557 1.8 cgd tc_mem_write_multi_N(4,u_int32_t)
558 1.8 cgd tc_mem_write_multi_N(8,u_int64_t)
559 1.8 cgd
560 1.8 cgd #define tc_mem_write_region_N(BYTES,TYPE) \
561 1.8 cgd void \
562 1.16 cgd __C(tc_mem_write_region_,BYTES)(v, h, o, a, c) \
563 1.8 cgd void *v; \
564 1.8 cgd bus_space_handle_t h; \
565 1.8 cgd bus_size_t o, c; \
566 1.8 cgd const TYPE *a; \
567 1.8 cgd { \
568 1.8 cgd \
569 1.8 cgd while (c-- > 0) { \
570 1.16 cgd __C(tc_mem_write_,BYTES)(v, h, o, *a++); \
571 1.9 cgd o += sizeof *a; \
572 1.8 cgd } \
573 1.8 cgd }
574 1.8 cgd tc_mem_write_region_N(1,u_int8_t)
575 1.8 cgd tc_mem_write_region_N(2,u_int16_t)
576 1.8 cgd tc_mem_write_region_N(4,u_int32_t)
577 1.8 cgd tc_mem_write_region_N(8,u_int64_t)
578 1.11 cgd
579 1.11 cgd #define tc_mem_set_multi_N(BYTES,TYPE) \
580 1.11 cgd void \
581 1.16 cgd __C(tc_mem_set_multi_,BYTES)(v, h, o, val, c) \
582 1.11 cgd void *v; \
583 1.11 cgd bus_space_handle_t h; \
584 1.11 cgd bus_size_t o, c; \
585 1.11 cgd TYPE val; \
586 1.11 cgd { \
587 1.11 cgd \
588 1.11 cgd while (c-- > 0) { \
589 1.16 cgd __C(tc_mem_write_,BYTES)(v, h, o, val); \
590 1.16 cgd tc_mem_barrier(v, h, o, sizeof val, BUS_SPACE_BARRIER_WRITE); \
591 1.11 cgd } \
592 1.11 cgd }
593 1.11 cgd tc_mem_set_multi_N(1,u_int8_t)
594 1.11 cgd tc_mem_set_multi_N(2,u_int16_t)
595 1.11 cgd tc_mem_set_multi_N(4,u_int32_t)
596 1.11 cgd tc_mem_set_multi_N(8,u_int64_t)
597 1.11 cgd
598 1.11 cgd #define tc_mem_set_region_N(BYTES,TYPE) \
599 1.11 cgd void \
600 1.16 cgd __C(tc_mem_set_region_,BYTES)(v, h, o, val, c) \
601 1.11 cgd void *v; \
602 1.11 cgd bus_space_handle_t h; \
603 1.11 cgd bus_size_t o, c; \
604 1.11 cgd TYPE val; \
605 1.11 cgd { \
606 1.11 cgd \
607 1.11 cgd while (c-- > 0) { \
608 1.16 cgd __C(tc_mem_write_,BYTES)(v, h, o, val); \
609 1.11 cgd o += sizeof val; \
610 1.11 cgd } \
611 1.11 cgd }
612 1.11 cgd tc_mem_set_region_N(1,u_int8_t)
613 1.11 cgd tc_mem_set_region_N(2,u_int16_t)
614 1.11 cgd tc_mem_set_region_N(4,u_int32_t)
615 1.11 cgd tc_mem_set_region_N(8,u_int64_t)
616 1.13 cgd
617 1.16 cgd #define tc_mem_copy_region_N(BYTES) \
618 1.13 cgd void \
619 1.16 cgd __C(tc_mem_copy_region_,BYTES)(v, h1, o1, h2, o2, c) \
620 1.13 cgd void *v; \
621 1.13 cgd bus_space_handle_t h1, h2; \
622 1.13 cgd bus_size_t o1, o2, c; \
623 1.13 cgd { \
624 1.16 cgd bus_size_t o; \
625 1.13 cgd \
626 1.13 cgd if ((h1 & TC_SPACE_SPARSE) != 0 && \
627 1.13 cgd (h2 & TC_SPACE_SPARSE) != 0) { \
628 1.19 perry memmove((void *)(h2 + o2), (void *)(h1 + o1), c * BYTES); \
629 1.13 cgd return; \
630 1.13 cgd } \
631 1.13 cgd \
632 1.16 cgd if (h1 + o1 >= h2 + o2) \
633 1.16 cgd /* src after dest: copy forward */ \
634 1.16 cgd for (o = 0; c > 0; c--, o += BYTES) \
635 1.16 cgd __C(tc_mem_write_,BYTES)(v, h2, o2 + o, \
636 1.16 cgd __C(tc_mem_read_,BYTES)(v, h1, o1 + o)); \
637 1.16 cgd else \
638 1.16 cgd /* dest after src: copy backwards */ \
639 1.16 cgd for (o = (c - 1) * BYTES; c > 0; c--, o -= BYTES) \
640 1.16 cgd __C(tc_mem_write_,BYTES)(v, h2, o2 + o, \
641 1.16 cgd __C(tc_mem_read_,BYTES)(v, h1, o1 + o)); \
642 1.16 cgd }
643 1.16 cgd tc_mem_copy_region_N(1)
644 1.16 cgd tc_mem_copy_region_N(2)
645 1.16 cgd tc_mem_copy_region_N(4)
646 1.16 cgd tc_mem_copy_region_N(8)
647