kftxxreg.h revision 1.2 1 /* $NetBSD: kftxxreg.h,v 1.2 1997/03/12 21:10:46 cgd Exp $ */
2
3 /*
4 * Copyright (c) 1997 by Matthew Jacob
5 * NASA AMES Research Center.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice immediately at the beginning of the file, without modification,
13 * this list of conditions, and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32
33 /*
34 * Registers and values specific to KFTIA or KFTHA nodes.
35 */
36
37 /*
38 * Taken from combinations of:
39 *
40 * ``DWLPA and DWLPB PCI Adapter Technical Manual,
41 * Order Number: EK-DWLPX-TM.A01''
42 *
43 * and
44 *
45 * ``AlphaServer 8200/8400 System Technical Manual,
46 * Order Number EK-T8030-TM. A01''
47 */
48
49 #define REGVAL(r) (*(int32_t *)ALPHA_PHYS_TO_K0SEG(r))
50
51 /*
52 * There are (potentially) 4 I/O hoses per I/O node.
53 *
54 * A CPU to Hose Address Mapping looks (roughly) like this:
55 *
56 * 39 38........36 35.34 33.................0
57 * -------------------------------------------
58 * |1|TLSB NodeID |Hose#|Hose Module Specific|
59 * -------------------------------------------
60 *
61 */
62
63 #define HOSE_SIZE 0x400000000L
64
65 #define MAXHOSE 4
66 /*
67 * Hose Specific I/O registers (offsets from base of I/O Board)
68 */
69
70 #define KFT_IDPNSEX(hose) ((hose)? (0x2040 + (0x100 * (hose))) : 0x2A40)
71
72 #define KFT_ICCNSE 0x2040
73 #define KFT_ICCWTR 0x2100
74 #define KFT_IDPMSR 0x2B80
75