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tlsb.c revision 1.22.2.2
      1  1.22.2.2  nathanw /* $NetBSD: tlsb.c,v 1.22.2.2 2002/10/18 02:34:34 nathanw Exp $ */
      2  1.22.2.2  nathanw /*
      3  1.22.2.2  nathanw  * Copyright (c) 1997 by Matthew Jacob
      4  1.22.2.2  nathanw  * NASA AMES Research Center.
      5  1.22.2.2  nathanw  * All rights reserved.
      6  1.22.2.2  nathanw  *
      7  1.22.2.2  nathanw  * Based in part upon a prototype version by Jason Thorpe
      8  1.22.2.2  nathanw  * Copyright (c) 1996, 1998 by Jason Thorpe.
      9  1.22.2.2  nathanw  *
     10  1.22.2.2  nathanw  * Redistribution and use in source and binary forms, with or without
     11  1.22.2.2  nathanw  * modification, are permitted provided that the following conditions
     12  1.22.2.2  nathanw  * are met:
     13  1.22.2.2  nathanw  * 1. Redistributions of source code must retain the above copyright
     14  1.22.2.2  nathanw  *    notice immediately at the beginning of the file, without modification,
     15  1.22.2.2  nathanw  *    this list of conditions, and the following disclaimer.
     16  1.22.2.2  nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     17  1.22.2.2  nathanw  *    notice, this list of conditions and the following disclaimer in the
     18  1.22.2.2  nathanw  *    documentation and/or other materials provided with the distribution.
     19  1.22.2.2  nathanw  * 3. The name of the author may not be used to endorse or promote products
     20  1.22.2.2  nathanw  *    derived from this software without specific prior written permission.
     21  1.22.2.2  nathanw  *
     22  1.22.2.2  nathanw  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     23  1.22.2.2  nathanw  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24  1.22.2.2  nathanw  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25  1.22.2.2  nathanw  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
     26  1.22.2.2  nathanw  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27  1.22.2.2  nathanw  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28  1.22.2.2  nathanw  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29  1.22.2.2  nathanw  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30  1.22.2.2  nathanw  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31  1.22.2.2  nathanw  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32  1.22.2.2  nathanw  * SUCH DAMAGE.
     33  1.22.2.2  nathanw  */
     34  1.22.2.2  nathanw 
     35  1.22.2.2  nathanw /*
     36  1.22.2.2  nathanw  * Autoconfiguration and support routines for the TurboLaser System Bus
     37  1.22.2.2  nathanw  * found on AlphaServer 8200 and 8400 systems.
     38  1.22.2.2  nathanw  */
     39  1.22.2.2  nathanw 
     40  1.22.2.2  nathanw #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     41  1.22.2.2  nathanw 
     42  1.22.2.2  nathanw __KERNEL_RCSID(0, "$NetBSD: tlsb.c,v 1.22.2.2 2002/10/18 02:34:34 nathanw Exp $");
     43  1.22.2.2  nathanw 
     44  1.22.2.2  nathanw #include "opt_multiprocessor.h"
     45  1.22.2.2  nathanw 
     46  1.22.2.2  nathanw #include <sys/param.h>
     47  1.22.2.2  nathanw #include <sys/systm.h>
     48  1.22.2.2  nathanw #include <sys/device.h>
     49  1.22.2.2  nathanw #include <sys/malloc.h>
     50  1.22.2.2  nathanw 
     51  1.22.2.2  nathanw #include <machine/autoconf.h>
     52  1.22.2.2  nathanw #include <machine/cpu.h>
     53  1.22.2.2  nathanw #include <machine/cpuvar.h>
     54  1.22.2.2  nathanw #include <machine/rpb.h>
     55  1.22.2.2  nathanw #include <machine/pte.h>
     56  1.22.2.2  nathanw #include <machine/alpha.h>
     57  1.22.2.2  nathanw 
     58  1.22.2.2  nathanw #include <alpha/tlsb/tlsbreg.h>
     59  1.22.2.2  nathanw #include <alpha/tlsb/tlsbvar.h>
     60  1.22.2.2  nathanw 
     61  1.22.2.2  nathanw #include "locators.h"
     62  1.22.2.2  nathanw 
     63  1.22.2.2  nathanw #define KV(_addr)	((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr)))
     64  1.22.2.2  nathanw 
     65  1.22.2.2  nathanw static int	tlsbmatch __P((struct device *, struct cfdata *, void *));
     66  1.22.2.2  nathanw static void	tlsbattach __P((struct device *, struct device *, void *));
     67  1.22.2.2  nathanw 
     68  1.22.2.2  nathanw CFATTACH_DECL(tlsb, sizeof (struct device),
     69  1.22.2.2  nathanw     tlsbmatch, tlsbattach, NULL, NULL);
     70  1.22.2.2  nathanw 
     71  1.22.2.2  nathanw extern struct cfdriver tlsb_cd;
     72  1.22.2.2  nathanw 
     73  1.22.2.2  nathanw static int	tlsbprint __P((void *, const char *));
     74  1.22.2.2  nathanw static int	tlsbsubmatch __P((struct device *, struct cfdata *, void *));
     75  1.22.2.2  nathanw static char	*tlsb_node_type_str __P((u_int32_t));
     76  1.22.2.2  nathanw 
     77  1.22.2.2  nathanw /*
     78  1.22.2.2  nathanw  * There can be only one TurboLaser, and we'll overload it
     79  1.22.2.2  nathanw  * with a bitmap of found turbo laser nodes. Note that
     80  1.22.2.2  nathanw  * these are just the actual hard TL node IDS that we
     81  1.22.2.2  nathanw  * discover here, not the virtual IDs that get assigned
     82  1.22.2.2  nathanw  * to CPUs. During TLSB specific error handling we
     83  1.22.2.2  nathanw  * only need to know which actual TLSB slots have boards
     84  1.22.2.2  nathanw  * in them (irrespective of how many CPUs they have).
     85  1.22.2.2  nathanw  */
     86  1.22.2.2  nathanw int	tlsb_found;
     87  1.22.2.2  nathanw 
     88  1.22.2.2  nathanw static int
     89  1.22.2.2  nathanw tlsbprint(aux, pnp)
     90  1.22.2.2  nathanw 	void *aux;
     91  1.22.2.2  nathanw 	const char *pnp;
     92  1.22.2.2  nathanw {
     93  1.22.2.2  nathanw 	struct tlsb_dev_attach_args *tap = aux;
     94  1.22.2.2  nathanw 
     95  1.22.2.2  nathanw 	if (pnp)
     96  1.22.2.2  nathanw 		printf("%s at %s node %d", tlsb_node_type_str(tap->ta_dtype),
     97  1.22.2.2  nathanw 		    pnp, tap->ta_node);
     98  1.22.2.2  nathanw 	else
     99  1.22.2.2  nathanw 		printf(" node %d: %s", tap->ta_node,
    100  1.22.2.2  nathanw 		    tlsb_node_type_str(tap->ta_dtype));
    101  1.22.2.2  nathanw 
    102  1.22.2.2  nathanw 	return (UNCONF);
    103  1.22.2.2  nathanw }
    104  1.22.2.2  nathanw 
    105  1.22.2.2  nathanw static int
    106  1.22.2.2  nathanw tlsbsubmatch(parent, cf, aux)
    107  1.22.2.2  nathanw 	struct device *parent;
    108  1.22.2.2  nathanw 	struct cfdata *cf;
    109  1.22.2.2  nathanw 	void *aux;
    110  1.22.2.2  nathanw {
    111  1.22.2.2  nathanw 	struct tlsb_dev_attach_args *tap = aux;
    112  1.22.2.2  nathanw 
    113  1.22.2.2  nathanw 	if (cf->cf_loc[TLSBCF_NODE] != TLSBCF_NODE_DEFAULT &&
    114  1.22.2.2  nathanw 	    cf->cf_loc[TLSBCF_NODE] != tap->ta_node)
    115  1.22.2.2  nathanw 		return (0);
    116  1.22.2.2  nathanw 
    117  1.22.2.2  nathanw 	return (config_match(parent, cf, aux));
    118  1.22.2.2  nathanw }
    119  1.22.2.2  nathanw 
    120  1.22.2.2  nathanw static int
    121  1.22.2.2  nathanw tlsbmatch(parent, cf, aux)
    122  1.22.2.2  nathanw 	struct device *parent;
    123  1.22.2.2  nathanw 	struct cfdata *cf;
    124  1.22.2.2  nathanw 	void *aux;
    125  1.22.2.2  nathanw {
    126  1.22.2.2  nathanw 	struct mainbus_attach_args *ma = aux;
    127  1.22.2.2  nathanw 
    128  1.22.2.2  nathanw 	/* Make sure we're looking for a TurboLaser. */
    129  1.22.2.2  nathanw 	if (strcmp(ma->ma_name, tlsb_cd.cd_name) != 0)
    130  1.22.2.2  nathanw 		return (0);
    131  1.22.2.2  nathanw 
    132  1.22.2.2  nathanw 	/*
    133  1.22.2.2  nathanw 	 * Only one instance of TurboLaser allowed,
    134  1.22.2.2  nathanw 	 * and only available on 21000 processor type
    135  1.22.2.2  nathanw 	 * platforms.
    136  1.22.2.2  nathanw 	 */
    137  1.22.2.2  nathanw 	if ((cputype != ST_DEC_21000) || tlsb_found)
    138  1.22.2.2  nathanw 		return (0);
    139  1.22.2.2  nathanw 
    140  1.22.2.2  nathanw 	return (1);
    141  1.22.2.2  nathanw }
    142  1.22.2.2  nathanw 
    143  1.22.2.2  nathanw static void
    144  1.22.2.2  nathanw tlsbattach(parent, self, aux)
    145  1.22.2.2  nathanw 	struct device *parent;
    146  1.22.2.2  nathanw 	struct device *self;
    147  1.22.2.2  nathanw 	void *aux;
    148  1.22.2.2  nathanw {
    149  1.22.2.2  nathanw 	struct tlsb_dev_attach_args ta;
    150  1.22.2.2  nathanw 	u_int32_t tldev;
    151  1.22.2.2  nathanw 	int node;
    152  1.22.2.2  nathanw 
    153  1.22.2.2  nathanw 	printf("\n");
    154  1.22.2.2  nathanw 
    155  1.22.2.2  nathanw 	/*
    156  1.22.2.2  nathanw 	 * Attempt to find all devices on the bus, including
    157  1.22.2.2  nathanw 	 * CPUs, memory modules, and I/O modules.
    158  1.22.2.2  nathanw 	 */
    159  1.22.2.2  nathanw 
    160  1.22.2.2  nathanw 	/*
    161  1.22.2.2  nathanw 	 * Sigh. I would like to just start off nicely,
    162  1.22.2.2  nathanw 	 * but I need to treat I/O modules differently-
    163  1.22.2.2  nathanw 	 * The highest priority I/O node has to be in
    164  1.22.2.2  nathanw 	 * node #8, and I want to find it *first*, since
    165  1.22.2.2  nathanw 	 * it will have the primary disks (most likely)
    166  1.22.2.2  nathanw 	 * on it.
    167  1.22.2.2  nathanw 	 */
    168  1.22.2.2  nathanw 	for (node = 0; node <= TLSB_NODE_MAX; ++node) {
    169  1.22.2.2  nathanw 		/*
    170  1.22.2.2  nathanw 		 * Check for invalid address.  This may not really
    171  1.22.2.2  nathanw 		 * be necessary, but what the heck...
    172  1.22.2.2  nathanw 		 */
    173  1.22.2.2  nathanw 		if (badaddr(TLSB_NODE_REG_ADDR(node, TLDEV), sizeof(u_int32_t)))
    174  1.22.2.2  nathanw 			continue;
    175  1.22.2.2  nathanw 		tldev = TLSB_GET_NODEREG(node, TLDEV);
    176  1.22.2.2  nathanw 		if (tldev == 0) {
    177  1.22.2.2  nathanw 			/* Nothing at this node. */
    178  1.22.2.2  nathanw 			continue;
    179  1.22.2.2  nathanw 		}
    180  1.22.2.2  nathanw 		/*
    181  1.22.2.2  nathanw 		 * Store up that we found something at this node.
    182  1.22.2.2  nathanw 		 * We do this so that we don't have to do something
    183  1.22.2.2  nathanw 		 * silly at fault time like try a 'baddadr'...
    184  1.22.2.2  nathanw 		 */
    185  1.22.2.2  nathanw 		tlsb_found |= (1 << node);
    186  1.22.2.2  nathanw 		if (TLDEV_ISIOPORT(tldev))
    187  1.22.2.2  nathanw 			continue;	/* not interested right now */
    188  1.22.2.2  nathanw 		ta.ta_node = node;
    189  1.22.2.2  nathanw 		ta.ta_dtype = TLDEV_DTYPE(tldev);
    190  1.22.2.2  nathanw 		ta.ta_swrev = TLDEV_SWREV(tldev);
    191  1.22.2.2  nathanw 		ta.ta_hwrev = TLDEV_HWREV(tldev);
    192  1.22.2.2  nathanw 
    193  1.22.2.2  nathanw 		/*
    194  1.22.2.2  nathanw 		 * Deal with hooking CPU instances to TurboLaser nodes.
    195  1.22.2.2  nathanw 		 */
    196  1.22.2.2  nathanw 		if (TLDEV_ISCPU(tldev)) {
    197  1.22.2.2  nathanw 			printf("%s node %d: %s\n", self->dv_xname,
    198  1.22.2.2  nathanw 			    node, tlsb_node_type_str(tldev));
    199  1.22.2.2  nathanw 		}
    200  1.22.2.2  nathanw 		/*
    201  1.22.2.2  nathanw 		 * Attach any children nodes, including a CPU's GBus
    202  1.22.2.2  nathanw 		 */
    203  1.22.2.2  nathanw 		config_found_sm(self, &ta, tlsbprint, tlsbsubmatch);
    204  1.22.2.2  nathanw 	}
    205  1.22.2.2  nathanw 	/*
    206  1.22.2.2  nathanw 	 * *Now* search for I/O nodes (in descending order)
    207  1.22.2.2  nathanw 	 */
    208  1.22.2.2  nathanw 	while (--node > 0) {
    209  1.22.2.2  nathanw 		if (badaddr(TLSB_NODE_REG_ADDR(node, TLDEV), sizeof(u_int32_t)))
    210  1.22.2.2  nathanw 			continue;
    211  1.22.2.2  nathanw 		tldev = TLSB_GET_NODEREG(node, TLDEV);
    212  1.22.2.2  nathanw 		if (tldev == 0) {
    213  1.22.2.2  nathanw 			continue;
    214  1.22.2.2  nathanw 		}
    215  1.22.2.2  nathanw 		if (TLDEV_ISIOPORT(tldev)) {
    216  1.22.2.2  nathanw #if defined(MULTIPROCESSOR)
    217  1.22.2.2  nathanw 			/*
    218  1.22.2.2  nathanw 			 * XXX Eventually, we want to select a secondary
    219  1.22.2.2  nathanw 			 * XXX processor on which to field interrupts for
    220  1.22.2.2  nathanw 			 * XXX this node.  However, we just send them to
    221  1.22.2.2  nathanw 			 * XXX the primary CPU for now.
    222  1.22.2.2  nathanw 			 *
    223  1.22.2.2  nathanw 			 * XXX Maybe multiple CPUs?  Does the hardware
    224  1.22.2.2  nathanw 			 * XXX round-robin, or check the length of the
    225  1.22.2.2  nathanw 			 * XXX per-CPU interrupt queue?
    226  1.22.2.2  nathanw 			 */
    227  1.22.2.2  nathanw 			printf("%s node %d: routing interrupts to %s\n",
    228  1.22.2.2  nathanw 			  self->dv_xname, node,
    229  1.22.2.2  nathanw 			  cpu_info[hwrpb->rpb_primary_cpu_id]->ci_softc->sc_dev.dv_xname);
    230  1.22.2.2  nathanw 			TLSB_PUT_NODEREG(node, TLCPUMASK,
    231  1.22.2.2  nathanw 			    (1UL << hwrpb->rpb_primary_cpu_id));
    232  1.22.2.2  nathanw #else
    233  1.22.2.2  nathanw 			/*
    234  1.22.2.2  nathanw 			 * Make sure interrupts are sent to the primary CPU.
    235  1.22.2.2  nathanw 			 */
    236  1.22.2.2  nathanw 			TLSB_PUT_NODEREG(node, TLCPUMASK,
    237  1.22.2.2  nathanw 			    (1UL << hwrpb->rpb_primary_cpu_id));
    238  1.22.2.2  nathanw #endif /* MULTIPROCESSOR */
    239  1.22.2.2  nathanw 
    240  1.22.2.2  nathanw 			ta.ta_node = node;
    241  1.22.2.2  nathanw 			ta.ta_dtype = TLDEV_DTYPE(tldev);
    242  1.22.2.2  nathanw 			ta.ta_swrev = TLDEV_SWREV(tldev);
    243  1.22.2.2  nathanw 			ta.ta_hwrev = TLDEV_HWREV(tldev);
    244  1.22.2.2  nathanw 			config_found_sm(self, &ta, tlsbprint, tlsbsubmatch);
    245  1.22.2.2  nathanw 		}
    246  1.22.2.2  nathanw 	}
    247  1.22.2.2  nathanw }
    248  1.22.2.2  nathanw 
    249  1.22.2.2  nathanw static char *
    250  1.22.2.2  nathanw tlsb_node_type_str(dtype)
    251  1.22.2.2  nathanw 	u_int32_t dtype;
    252  1.22.2.2  nathanw {
    253  1.22.2.2  nathanw 	static char	tlsb_line[64];
    254  1.22.2.2  nathanw 
    255  1.22.2.2  nathanw 	switch (dtype & TLDEV_DTYPE_MASK) {
    256  1.22.2.2  nathanw 	case TLDEV_DTYPE_KFTHA:
    257  1.22.2.2  nathanw 		return ("KFTHA I/O interface");
    258  1.22.2.2  nathanw 
    259  1.22.2.2  nathanw 	case TLDEV_DTYPE_KFTIA:
    260  1.22.2.2  nathanw 		return ("KFTIA I/O interface");
    261  1.22.2.2  nathanw 
    262  1.22.2.2  nathanw 	case TLDEV_DTYPE_MS7CC:
    263  1.22.2.2  nathanw 		return ("MS7CC Memory Module");
    264  1.22.2.2  nathanw 
    265  1.22.2.2  nathanw 	case TLDEV_DTYPE_SCPU4:
    266  1.22.2.2  nathanw 		return ("Single CPU, 4MB cache");
    267  1.22.2.2  nathanw 
    268  1.22.2.2  nathanw 	case TLDEV_DTYPE_SCPU16:
    269  1.22.2.2  nathanw 		return ("Single CPU, 16MB cache");
    270  1.22.2.2  nathanw 
    271  1.22.2.2  nathanw 	case TLDEV_DTYPE_DCPU4:
    272  1.22.2.2  nathanw 		return ("Dual CPU, 4MB cache");
    273  1.22.2.2  nathanw 
    274  1.22.2.2  nathanw 	case TLDEV_DTYPE_DCPU16:
    275  1.22.2.2  nathanw 		return ("Dual CPU, 16MB cache");
    276  1.22.2.2  nathanw 
    277  1.22.2.2  nathanw 	default:
    278  1.22.2.2  nathanw 		memset(tlsb_line, 0, sizeof(tlsb_line));
    279  1.22.2.2  nathanw 		sprintf(tlsb_line, "unknown, dtype 0x%x", dtype);
    280  1.22.2.2  nathanw 		return (tlsb_line);
    281  1.22.2.2  nathanw 	}
    282  1.22.2.2  nathanw 	/* NOTREACHED */
    283  1.22.2.2  nathanw }
    284