tlsb.c revision 1.13 1 /* $NetBSD: tlsb.c,v 1.13 1998/09/29 04:22:36 thorpej Exp $ */
2 /*
3 * Copyright (c) 1997 by Matthew Jacob
4 * NASA AMES Research Center.
5 * All rights reserved.
6 *
7 * Based in part upon a prototype version by Jason Thorpe
8 * Copyright (c) 1996, 1998 by Jason Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice immediately at the beginning of the file, without modification,
15 * this list of conditions, and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. The name of the author may not be used to endorse or promote products
20 * derived from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35 /*
36 * Autoconfiguration and support routines for the TurboLaser System Bus
37 * found on AlphaServer 8200 and 8400 systems.
38 */
39
40 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
41
42 __KERNEL_RCSID(0, "$NetBSD: tlsb.c,v 1.13 1998/09/29 04:22:36 thorpej Exp $");
43
44 #include "opt_multiprocessor.h"
45
46 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/device.h>
49 #include <sys/malloc.h>
50
51 #include <machine/autoconf.h>
52 #include <machine/rpb.h>
53 #include <machine/pte.h>
54
55 #include <alpha/alpha/cpuvar.h>
56
57 #include <alpha/tlsb/tlsbreg.h>
58 #include <alpha/tlsb/tlsbvar.h>
59
60 #include "locators.h"
61
62 extern int cputype;
63
64 #define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr)))
65
66 static int tlsbmatch __P((struct device *, struct cfdata *, void *));
67 static void tlsbattach __P((struct device *, struct device *, void *));
68
69 struct cfattach tlsb_ca = {
70 sizeof (struct device), tlsbmatch, tlsbattach
71 };
72
73 extern struct cfdriver tlsb_cd;
74
75 static int tlsbprint __P((void *, const char *));
76 static int tlsbsubmatch __P((struct device *, struct cfdata *, void *));
77 static char *tlsb_node_type_str __P((u_int32_t));
78
79 /*
80 * There can be only one TurboLaser, and we'll overload it
81 * with a bitmap of found turbo laser nodes. Note that
82 * these are just the actual hard TL node IDS that we
83 * discover here, not the virtual IDs that get assigned
84 * to CPUs. During TLSB specific error handling we
85 * only need to know which actual TLSB slots have boards
86 * in them (irrespective of how many CPUs they have).
87 */
88 int tlsb_found;
89
90 static int
91 tlsbprint(aux, pnp)
92 void *aux;
93 const char *pnp;
94 {
95 struct tlsb_dev_attach_args *tap = aux;
96
97 if (pnp)
98 printf("%s at %s node %d", tlsb_node_type_str(tap->ta_dtype),
99 pnp, tap->ta_node);
100 else
101 printf(" node %d: %s", tap->ta_node,
102 tlsb_node_type_str(tap->ta_dtype));
103
104 return (UNCONF);
105 }
106
107 static int
108 tlsbsubmatch(parent, cf, aux)
109 struct device *parent;
110 struct cfdata *cf;
111 void *aux;
112 {
113 struct tlsb_dev_attach_args *tap = aux;
114
115 if (cf->cf_loc[TLSBCF_NODE] != TLSBCF_NODE_DEFAULT &&
116 cf->cf_loc[TLSBCF_NODE] != tap->ta_node)
117 return (0);
118
119 return ((*cf->cf_attach->ca_match)(parent, cf, aux));
120 }
121
122 static int
123 tlsbmatch(parent, cf, aux)
124 struct device *parent;
125 struct cfdata *cf;
126 void *aux;
127 {
128 struct mainbus_attach_args *ma = aux;
129
130 /* Make sure we're looking for a TurboLaser. */
131 if (strcmp(ma->ma_name, tlsb_cd.cd_name) != 0)
132 return (0);
133
134 /*
135 * Only one instance of TurboLaser allowed,
136 * and only available on 21000 processor type
137 * platforms.
138 */
139 if ((cputype != ST_DEC_21000) || tlsb_found)
140 return (0);
141
142 return (1);
143 }
144
145 static void
146 tlsbattach(parent, self, aux)
147 struct device *parent;
148 struct device *self;
149 void *aux;
150 {
151 struct tlsb_dev_attach_args ta;
152 u_int32_t tldev;
153 int node;
154
155 printf("\n");
156
157 /*
158 * Attempt to find all devices on the bus, including
159 * CPUs, memory modules, and I/O modules.
160 */
161
162 /*
163 * Sigh. I would like to just start off nicely,
164 * but I need to treat I/O modules differently-
165 * The highest priority I/O node has to be in
166 * node #8, and I want to find it *first*, since
167 * it will have the primary disks (most likely)
168 * on it.
169 */
170 for (node = 0; node <= TLSB_NODE_MAX; ++node) {
171 /*
172 * Check for invalid address. This may not really
173 * be necessary, but what the heck...
174 */
175 if (badaddr(TLSB_NODE_REG_ADDR(node, TLDEV), sizeof(u_int32_t)))
176 continue;
177 tldev = TLSB_GET_NODEREG(node, TLDEV);
178 if (tldev == 0) {
179 /* Nothing at this node. */
180 continue;
181 }
182 /*
183 * Store up that we found something at this node.
184 * We do this so that we don't have to do something
185 * silly at fault time like try a 'baddadr'...
186 */
187 tlsb_found |= (1 << node);
188 if (TLDEV_ISIOPORT(tldev))
189 continue; /* not interested right now */
190 ta.ta_node = node;
191 ta.ta_dtype = TLDEV_DTYPE(tldev);
192 ta.ta_swrev = TLDEV_SWREV(tldev);
193 ta.ta_hwrev = TLDEV_HWREV(tldev);
194
195 /*
196 * Deal with hooking CPU instances to TurboLaser nodes.
197 */
198 if (TLDEV_ISCPU(tldev)) {
199 printf("%s node %d: %s\n", self->dv_xname,
200 node, tlsb_node_type_str(tldev));
201 }
202 /*
203 * Attach any children nodes, including a CPU's GBus
204 */
205 config_found_sm(self, &ta, tlsbprint, tlsbsubmatch);
206 }
207 /*
208 * *Now* search for I/O nodes (in descending order)
209 */
210 while (--node > 0) {
211 if (badaddr(TLSB_NODE_REG_ADDR(node, TLDEV), sizeof(u_int32_t)))
212 continue;
213 tldev = TLSB_GET_NODEREG(node, TLDEV);
214 if (tldev == 0) {
215 continue;
216 }
217 if (TLDEV_ISIOPORT(tldev)) {
218 #if defined(MULTIPROCESSOR)
219 /*
220 * XXX Eventually, we want to select a secondary
221 * XXX processor on which to field interrupts for
222 * XXX this node. However, we just send them to
223 * XXX the primary CPU for now.
224 *
225 * XXX Maybe multiple CPUs? Does the hardware
226 * XXX round-robin, or check the length of the
227 * XXX per-CPU interrupt queue?
228 */
229 printf("%s node %d: routing interrupts to %s\n",
230 self->dv_xname, node,
231 cpus[hwrpb->rpb_primary_cpu_id]->sc_dev.dv_xname);
232 TLSB_PUT_NODEREG(node, TLCPUMASK,
233 (1UL << hwrpb->rpb_primary_cpu_id));
234 #else
235 /*
236 * Make sure interrupts are sent to the primary
237 * CPU.
238 */
239 printf("%s node %d: routing interrupts to %s\n",
240 self->dv_xname, node,
241 cpus[hwrpb->rpb_primary_cpu_id]->sc_dev.dv_xname);
242 TLSB_PUT_NODEREG(node, TLCPUMASK,
243 (1UL << hwrpb->rpb_primary_cpu_id));
244 #endif /* MULTIPROCESSOR */
245
246 ta.ta_node = node;
247 ta.ta_dtype = TLDEV_DTYPE(tldev);
248 ta.ta_swrev = TLDEV_SWREV(tldev);
249 ta.ta_hwrev = TLDEV_HWREV(tldev);
250 config_found_sm(self, &ta, tlsbprint, tlsbsubmatch);
251 }
252 }
253 }
254
255 static char *
256 tlsb_node_type_str(dtype)
257 u_int32_t dtype;
258 {
259 static char tlsb_line[64];
260
261 switch (dtype & TLDEV_DTYPE_MASK) {
262 case TLDEV_DTYPE_KFTHA:
263 return ("KFTHA I/O interface");
264
265 case TLDEV_DTYPE_KFTIA:
266 return ("KFTIA I/O interface");
267
268 case TLDEV_DTYPE_MS7CC:
269 return ("MS7CC Memory Module");
270
271 case TLDEV_DTYPE_SCPU4:
272 return ("Single CPU, 4MB cache");
273
274 case TLDEV_DTYPE_SCPU16:
275 return ("Single CPU, 16MB cache");
276
277 case TLDEV_DTYPE_DCPU4:
278 return ("Dual CPU, 4MB cache");
279
280 case TLDEV_DTYPE_DCPU16:
281 return ("Dual CPU, 16MB cache");
282
283 default:
284 bzero(tlsb_line, sizeof(tlsb_line));
285 sprintf(tlsb_line, "unknown, dtype 0x%x", dtype);
286 return (tlsb_line);
287 }
288 /* NOTREACHED */
289 }
290