tlsb.c revision 1.17 1 /* $NetBSD: tlsb.c,v 1.17 1999/02/23 03:20:04 thorpej Exp $ */
2 /*
3 * Copyright (c) 1997 by Matthew Jacob
4 * NASA AMES Research Center.
5 * All rights reserved.
6 *
7 * Based in part upon a prototype version by Jason Thorpe
8 * Copyright (c) 1996, 1998 by Jason Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice immediately at the beginning of the file, without modification,
15 * this list of conditions, and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. The name of the author may not be used to endorse or promote products
20 * derived from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35 /*
36 * Autoconfiguration and support routines for the TurboLaser System Bus
37 * found on AlphaServer 8200 and 8400 systems.
38 */
39
40 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
41
42 __KERNEL_RCSID(0, "$NetBSD: tlsb.c,v 1.17 1999/02/23 03:20:04 thorpej Exp $");
43
44 #include "opt_multiprocessor.h"
45
46 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/device.h>
49 #include <sys/malloc.h>
50
51 #include <machine/autoconf.h>
52 #include <machine/rpb.h>
53 #include <machine/pte.h>
54 #include <machine/alpha.h>
55
56 #include <alpha/alpha/cpuvar.h>
57
58 #include <alpha/tlsb/tlsbreg.h>
59 #include <alpha/tlsb/tlsbvar.h>
60
61 #include "locators.h"
62
63 extern int cputype;
64
65 #define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr)))
66
67 static int tlsbmatch __P((struct device *, struct cfdata *, void *));
68 static void tlsbattach __P((struct device *, struct device *, void *));
69
70 struct cfattach tlsb_ca = {
71 sizeof (struct device), tlsbmatch, tlsbattach
72 };
73
74 extern struct cfdriver tlsb_cd;
75
76 static int tlsbprint __P((void *, const char *));
77 static int tlsbsubmatch __P((struct device *, struct cfdata *, void *));
78 static char *tlsb_node_type_str __P((u_int32_t));
79
80 /*
81 * There can be only one TurboLaser, and we'll overload it
82 * with a bitmap of found turbo laser nodes. Note that
83 * these are just the actual hard TL node IDS that we
84 * discover here, not the virtual IDs that get assigned
85 * to CPUs. During TLSB specific error handling we
86 * only need to know which actual TLSB slots have boards
87 * in them (irrespective of how many CPUs they have).
88 */
89 int tlsb_found;
90
91 static int
92 tlsbprint(aux, pnp)
93 void *aux;
94 const char *pnp;
95 {
96 struct tlsb_dev_attach_args *tap = aux;
97
98 if (pnp)
99 printf("%s at %s node %d", tlsb_node_type_str(tap->ta_dtype),
100 pnp, tap->ta_node);
101 else
102 printf(" node %d: %s", tap->ta_node,
103 tlsb_node_type_str(tap->ta_dtype));
104
105 return (UNCONF);
106 }
107
108 static int
109 tlsbsubmatch(parent, cf, aux)
110 struct device *parent;
111 struct cfdata *cf;
112 void *aux;
113 {
114 struct tlsb_dev_attach_args *tap = aux;
115
116 if (cf->cf_loc[TLSBCF_NODE] != TLSBCF_NODE_DEFAULT &&
117 cf->cf_loc[TLSBCF_NODE] != tap->ta_node)
118 return (0);
119
120 return ((*cf->cf_attach->ca_match)(parent, cf, aux));
121 }
122
123 static int
124 tlsbmatch(parent, cf, aux)
125 struct device *parent;
126 struct cfdata *cf;
127 void *aux;
128 {
129 struct mainbus_attach_args *ma = aux;
130
131 /* Make sure we're looking for a TurboLaser. */
132 if (strcmp(ma->ma_name, tlsb_cd.cd_name) != 0)
133 return (0);
134
135 /*
136 * Only one instance of TurboLaser allowed,
137 * and only available on 21000 processor type
138 * platforms.
139 */
140 if ((cputype != ST_DEC_21000) || tlsb_found)
141 return (0);
142
143 return (1);
144 }
145
146 static void
147 tlsbattach(parent, self, aux)
148 struct device *parent;
149 struct device *self;
150 void *aux;
151 {
152 struct tlsb_dev_attach_args ta;
153 u_int32_t tldev;
154 int node;
155
156 printf("\n");
157
158 /*
159 * Attempt to find all devices on the bus, including
160 * CPUs, memory modules, and I/O modules.
161 */
162
163 /*
164 * Sigh. I would like to just start off nicely,
165 * but I need to treat I/O modules differently-
166 * The highest priority I/O node has to be in
167 * node #8, and I want to find it *first*, since
168 * it will have the primary disks (most likely)
169 * on it.
170 */
171 for (node = 0; node <= TLSB_NODE_MAX; ++node) {
172 /*
173 * Check for invalid address. This may not really
174 * be necessary, but what the heck...
175 */
176 if (badaddr(TLSB_NODE_REG_ADDR(node, TLDEV), sizeof(u_int32_t)))
177 continue;
178 tldev = TLSB_GET_NODEREG(node, TLDEV);
179 if (tldev == 0) {
180 /* Nothing at this node. */
181 continue;
182 }
183 /*
184 * Store up that we found something at this node.
185 * We do this so that we don't have to do something
186 * silly at fault time like try a 'baddadr'...
187 */
188 tlsb_found |= (1 << node);
189 if (TLDEV_ISIOPORT(tldev))
190 continue; /* not interested right now */
191 ta.ta_node = node;
192 ta.ta_dtype = TLDEV_DTYPE(tldev);
193 ta.ta_swrev = TLDEV_SWREV(tldev);
194 ta.ta_hwrev = TLDEV_HWREV(tldev);
195
196 /*
197 * Deal with hooking CPU instances to TurboLaser nodes.
198 */
199 if (TLDEV_ISCPU(tldev)) {
200 printf("%s node %d: %s\n", self->dv_xname,
201 node, tlsb_node_type_str(tldev));
202 }
203 /*
204 * Attach any children nodes, including a CPU's GBus
205 */
206 config_found_sm(self, &ta, tlsbprint, tlsbsubmatch);
207 }
208 /*
209 * *Now* search for I/O nodes (in descending order)
210 */
211 while (--node > 0) {
212 if (badaddr(TLSB_NODE_REG_ADDR(node, TLDEV), sizeof(u_int32_t)))
213 continue;
214 tldev = TLSB_GET_NODEREG(node, TLDEV);
215 if (tldev == 0) {
216 continue;
217 }
218 if (TLDEV_ISIOPORT(tldev)) {
219 #if defined(MULTIPROCESSOR)
220 /*
221 * XXX Eventually, we want to select a secondary
222 * XXX processor on which to field interrupts for
223 * XXX this node. However, we just send them to
224 * XXX the primary CPU for now.
225 *
226 * XXX Maybe multiple CPUs? Does the hardware
227 * XXX round-robin, or check the length of the
228 * XXX per-CPU interrupt queue?
229 */
230 printf("%s node %d: routing interrupts to %s\n",
231 self->dv_xname, node,
232 cpu_info[hwrpb->rpb_primary_cpu_id].ci_dev->dv_xname);
233 TLSB_PUT_NODEREG(node, TLCPUMASK,
234 (1UL << hwrpb->rpb_primary_cpu_id));
235 #else
236 /*
237 * Make sure interrupts are sent to the primary CPU.
238 */
239 TLSB_PUT_NODEREG(node, TLCPUMASK,
240 (1UL << hwrpb->rpb_primary_cpu_id));
241 #endif /* MULTIPROCESSOR */
242
243 ta.ta_node = node;
244 ta.ta_dtype = TLDEV_DTYPE(tldev);
245 ta.ta_swrev = TLDEV_SWREV(tldev);
246 ta.ta_hwrev = TLDEV_HWREV(tldev);
247 config_found_sm(self, &ta, tlsbprint, tlsbsubmatch);
248 }
249 }
250 }
251
252 static char *
253 tlsb_node_type_str(dtype)
254 u_int32_t dtype;
255 {
256 static char tlsb_line[64];
257
258 switch (dtype & TLDEV_DTYPE_MASK) {
259 case TLDEV_DTYPE_KFTHA:
260 return ("KFTHA I/O interface");
261
262 case TLDEV_DTYPE_KFTIA:
263 return ("KFTIA I/O interface");
264
265 case TLDEV_DTYPE_MS7CC:
266 return ("MS7CC Memory Module");
267
268 case TLDEV_DTYPE_SCPU4:
269 return ("Single CPU, 4MB cache");
270
271 case TLDEV_DTYPE_SCPU16:
272 return ("Single CPU, 16MB cache");
273
274 case TLDEV_DTYPE_DCPU4:
275 return ("Dual CPU, 4MB cache");
276
277 case TLDEV_DTYPE_DCPU16:
278 return ("Dual CPU, 16MB cache");
279
280 default:
281 bzero(tlsb_line, sizeof(tlsb_line));
282 sprintf(tlsb_line, "unknown, dtype 0x%x", dtype);
283 return (tlsb_line);
284 }
285 /* NOTREACHED */
286 }
287