tlsb.c revision 1.22 1 /* $NetBSD: tlsb.c,v 1.22 2001/07/12 23:25:41 thorpej Exp $ */
2 /*
3 * Copyright (c) 1997 by Matthew Jacob
4 * NASA AMES Research Center.
5 * All rights reserved.
6 *
7 * Based in part upon a prototype version by Jason Thorpe
8 * Copyright (c) 1996, 1998 by Jason Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice immediately at the beginning of the file, without modification,
15 * this list of conditions, and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. The name of the author may not be used to endorse or promote products
20 * derived from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35 /*
36 * Autoconfiguration and support routines for the TurboLaser System Bus
37 * found on AlphaServer 8200 and 8400 systems.
38 */
39
40 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
41
42 __KERNEL_RCSID(0, "$NetBSD: tlsb.c,v 1.22 2001/07/12 23:25:41 thorpej Exp $");
43
44 #include "opt_multiprocessor.h"
45
46 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/device.h>
49 #include <sys/malloc.h>
50
51 #include <machine/autoconf.h>
52 #include <machine/cpu.h>
53 #include <machine/cpuvar.h>
54 #include <machine/rpb.h>
55 #include <machine/pte.h>
56 #include <machine/alpha.h>
57
58 #include <alpha/tlsb/tlsbreg.h>
59 #include <alpha/tlsb/tlsbvar.h>
60
61 #include "locators.h"
62
63 #define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr)))
64
65 static int tlsbmatch __P((struct device *, struct cfdata *, void *));
66 static void tlsbattach __P((struct device *, struct device *, void *));
67
68 struct cfattach tlsb_ca = {
69 sizeof (struct device), tlsbmatch, tlsbattach
70 };
71
72 extern struct cfdriver tlsb_cd;
73
74 static int tlsbprint __P((void *, const char *));
75 static int tlsbsubmatch __P((struct device *, struct cfdata *, void *));
76 static char *tlsb_node_type_str __P((u_int32_t));
77
78 /*
79 * There can be only one TurboLaser, and we'll overload it
80 * with a bitmap of found turbo laser nodes. Note that
81 * these are just the actual hard TL node IDS that we
82 * discover here, not the virtual IDs that get assigned
83 * to CPUs. During TLSB specific error handling we
84 * only need to know which actual TLSB slots have boards
85 * in them (irrespective of how many CPUs they have).
86 */
87 int tlsb_found;
88
89 static int
90 tlsbprint(aux, pnp)
91 void *aux;
92 const char *pnp;
93 {
94 struct tlsb_dev_attach_args *tap = aux;
95
96 if (pnp)
97 printf("%s at %s node %d", tlsb_node_type_str(tap->ta_dtype),
98 pnp, tap->ta_node);
99 else
100 printf(" node %d: %s", tap->ta_node,
101 tlsb_node_type_str(tap->ta_dtype));
102
103 return (UNCONF);
104 }
105
106 static int
107 tlsbsubmatch(parent, cf, aux)
108 struct device *parent;
109 struct cfdata *cf;
110 void *aux;
111 {
112 struct tlsb_dev_attach_args *tap = aux;
113
114 if (cf->cf_loc[TLSBCF_NODE] != TLSBCF_NODE_DEFAULT &&
115 cf->cf_loc[TLSBCF_NODE] != tap->ta_node)
116 return (0);
117
118 return ((*cf->cf_attach->ca_match)(parent, cf, aux));
119 }
120
121 static int
122 tlsbmatch(parent, cf, aux)
123 struct device *parent;
124 struct cfdata *cf;
125 void *aux;
126 {
127 struct mainbus_attach_args *ma = aux;
128
129 /* Make sure we're looking for a TurboLaser. */
130 if (strcmp(ma->ma_name, tlsb_cd.cd_name) != 0)
131 return (0);
132
133 /*
134 * Only one instance of TurboLaser allowed,
135 * and only available on 21000 processor type
136 * platforms.
137 */
138 if ((cputype != ST_DEC_21000) || tlsb_found)
139 return (0);
140
141 return (1);
142 }
143
144 static void
145 tlsbattach(parent, self, aux)
146 struct device *parent;
147 struct device *self;
148 void *aux;
149 {
150 struct tlsb_dev_attach_args ta;
151 u_int32_t tldev;
152 int node;
153
154 printf("\n");
155
156 /*
157 * Attempt to find all devices on the bus, including
158 * CPUs, memory modules, and I/O modules.
159 */
160
161 /*
162 * Sigh. I would like to just start off nicely,
163 * but I need to treat I/O modules differently-
164 * The highest priority I/O node has to be in
165 * node #8, and I want to find it *first*, since
166 * it will have the primary disks (most likely)
167 * on it.
168 */
169 for (node = 0; node <= TLSB_NODE_MAX; ++node) {
170 /*
171 * Check for invalid address. This may not really
172 * be necessary, but what the heck...
173 */
174 if (badaddr(TLSB_NODE_REG_ADDR(node, TLDEV), sizeof(u_int32_t)))
175 continue;
176 tldev = TLSB_GET_NODEREG(node, TLDEV);
177 if (tldev == 0) {
178 /* Nothing at this node. */
179 continue;
180 }
181 /*
182 * Store up that we found something at this node.
183 * We do this so that we don't have to do something
184 * silly at fault time like try a 'baddadr'...
185 */
186 tlsb_found |= (1 << node);
187 if (TLDEV_ISIOPORT(tldev))
188 continue; /* not interested right now */
189 ta.ta_node = node;
190 ta.ta_dtype = TLDEV_DTYPE(tldev);
191 ta.ta_swrev = TLDEV_SWREV(tldev);
192 ta.ta_hwrev = TLDEV_HWREV(tldev);
193
194 /*
195 * Deal with hooking CPU instances to TurboLaser nodes.
196 */
197 if (TLDEV_ISCPU(tldev)) {
198 printf("%s node %d: %s\n", self->dv_xname,
199 node, tlsb_node_type_str(tldev));
200 }
201 /*
202 * Attach any children nodes, including a CPU's GBus
203 */
204 config_found_sm(self, &ta, tlsbprint, tlsbsubmatch);
205 }
206 /*
207 * *Now* search for I/O nodes (in descending order)
208 */
209 while (--node > 0) {
210 if (badaddr(TLSB_NODE_REG_ADDR(node, TLDEV), sizeof(u_int32_t)))
211 continue;
212 tldev = TLSB_GET_NODEREG(node, TLDEV);
213 if (tldev == 0) {
214 continue;
215 }
216 if (TLDEV_ISIOPORT(tldev)) {
217 #if defined(MULTIPROCESSOR)
218 /*
219 * XXX Eventually, we want to select a secondary
220 * XXX processor on which to field interrupts for
221 * XXX this node. However, we just send them to
222 * XXX the primary CPU for now.
223 *
224 * XXX Maybe multiple CPUs? Does the hardware
225 * XXX round-robin, or check the length of the
226 * XXX per-CPU interrupt queue?
227 */
228 printf("%s node %d: routing interrupts to %s\n",
229 self->dv_xname, node,
230 cpu_info[hwrpb->rpb_primary_cpu_id]->ci_softc->sc_dev.dv_xname);
231 TLSB_PUT_NODEREG(node, TLCPUMASK,
232 (1UL << hwrpb->rpb_primary_cpu_id));
233 #else
234 /*
235 * Make sure interrupts are sent to the primary CPU.
236 */
237 TLSB_PUT_NODEREG(node, TLCPUMASK,
238 (1UL << hwrpb->rpb_primary_cpu_id));
239 #endif /* MULTIPROCESSOR */
240
241 ta.ta_node = node;
242 ta.ta_dtype = TLDEV_DTYPE(tldev);
243 ta.ta_swrev = TLDEV_SWREV(tldev);
244 ta.ta_hwrev = TLDEV_HWREV(tldev);
245 config_found_sm(self, &ta, tlsbprint, tlsbsubmatch);
246 }
247 }
248 }
249
250 static char *
251 tlsb_node_type_str(dtype)
252 u_int32_t dtype;
253 {
254 static char tlsb_line[64];
255
256 switch (dtype & TLDEV_DTYPE_MASK) {
257 case TLDEV_DTYPE_KFTHA:
258 return ("KFTHA I/O interface");
259
260 case TLDEV_DTYPE_KFTIA:
261 return ("KFTIA I/O interface");
262
263 case TLDEV_DTYPE_MS7CC:
264 return ("MS7CC Memory Module");
265
266 case TLDEV_DTYPE_SCPU4:
267 return ("Single CPU, 4MB cache");
268
269 case TLDEV_DTYPE_SCPU16:
270 return ("Single CPU, 16MB cache");
271
272 case TLDEV_DTYPE_DCPU4:
273 return ("Dual CPU, 4MB cache");
274
275 case TLDEV_DTYPE_DCPU16:
276 return ("Dual CPU, 16MB cache");
277
278 default:
279 memset(tlsb_line, 0, sizeof(tlsb_line));
280 sprintf(tlsb_line, "unknown, dtype 0x%x", dtype);
281 return (tlsb_line);
282 }
283 /* NOTREACHED */
284 }
285