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tlsb.c revision 1.40
      1 /* $NetBSD: tlsb.c,v 1.40 2021/07/04 22:42:36 thorpej Exp $ */
      2 /*
      3  * Copyright (c) 1997 by Matthew Jacob
      4  * NASA AMES Research Center.
      5  * All rights reserved.
      6  *
      7  * Based in part upon a prototype version by Jason Thorpe
      8  * Copyright (c) 1996, 1998 by Jason Thorpe.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice immediately at the beginning of the file, without modification,
     15  *    this list of conditions, and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. The name of the author may not be used to endorse or promote products
     20  *    derived from this software without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
     26  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32  * SUCH DAMAGE.
     33  */
     34 
     35 /*
     36  * Autoconfiguration and support routines for the TurboLaser System Bus
     37  * found on AlphaServer 8200 and 8400 systems.
     38  */
     39 
     40 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     41 
     42 __KERNEL_RCSID(0, "$NetBSD: tlsb.c,v 1.40 2021/07/04 22:42:36 thorpej Exp $");
     43 
     44 #include "opt_multiprocessor.h"
     45 
     46 #include <sys/param.h>
     47 #include <sys/systm.h>
     48 #include <sys/device.h>
     49 
     50 #include <machine/autoconf.h>
     51 #include <machine/cpu.h>
     52 #include <machine/cpuvar.h>
     53 #include <machine/rpb.h>
     54 #include <machine/pte.h>
     55 #include <machine/alpha.h>
     56 
     57 #include <alpha/tlsb/tlsbreg.h>
     58 #include <alpha/tlsb/tlsbvar.h>
     59 
     60 #include "locators.h"
     61 
     62 #define KV(_addr)	((void *)ALPHA_PHYS_TO_K0SEG((_addr)))
     63 
     64 static int	tlsbmatch(device_t, cfdata_t, void *);
     65 static void	tlsbattach(device_t, device_t, void *);
     66 
     67 CFATTACH_DECL_NEW(tlsb, 0,
     68     tlsbmatch, tlsbattach, NULL, NULL);
     69 
     70 extern struct cfdriver tlsb_cd;
     71 
     72 static int	tlsbprint(void *, const char *);
     73 static const char *tlsb_node_type_str(uint32_t);
     74 
     75 /*
     76  * There can be only one TurboLaser, and we'll overload it
     77  * with a bitmap of found turbo laser nodes. Note that
     78  * these are just the actual hard TL node IDS that we
     79  * discover here, not the virtual IDs that get assigned
     80  * to CPUs. During TLSB specific error handling we
     81  * only need to know which actual TLSB slots have boards
     82  * in them (irrespective of how many CPUs they have).
     83  */
     84 int	tlsb_found;
     85 
     86 static int
     87 tlsbprint(void *aux, const char *pnp)
     88 {
     89 	struct tlsb_dev_attach_args *tap = aux;
     90 
     91 	if (pnp)
     92 		aprint_normal("%s at %s node %d",
     93 		    tlsb_node_type_str(tap->ta_dtype), pnp, tap->ta_node);
     94 	else
     95 		aprint_normal(" node %d: %s", tap->ta_node,
     96 		    tlsb_node_type_str(tap->ta_dtype));
     97 
     98 	return (UNCONF);
     99 }
    100 
    101 static int
    102 tlsbmatch(device_t parent, cfdata_t cf, void *aux)
    103 {
    104 	struct mainbus_attach_args *ma = aux;
    105 
    106 	/* Make sure we're looking for a TurboLaser. */
    107 	if (strcmp(ma->ma_name, tlsb_cd.cd_name) != 0)
    108 		return (0);
    109 
    110 	/*
    111 	 * Only one instance of TurboLaser allowed,
    112 	 * and only available on 21000 processor type
    113 	 * platforms.
    114 	 */
    115 	if ((cputype != ST_DEC_21000) || tlsb_found)
    116 		return (0);
    117 
    118 	return (1);
    119 }
    120 
    121 static void
    122 tlsbattach(device_t parent, device_t self, void *aux)
    123 {
    124 	struct tlsb_dev_attach_args ta;
    125 	uint32_t tldev;
    126 	int node;
    127 	int locs[TLSBCF_NLOCS];
    128 
    129 	printf("\n");
    130 
    131 	/*
    132 	 * Attempt to find all devices on the bus, including
    133 	 * CPUs, memory modules, and I/O modules.
    134 	 */
    135 
    136 	/*
    137 	 * Sigh. I would like to just start off nicely,
    138 	 * but I need to treat I/O modules differently-
    139 	 * The highest priority I/O node has to be in
    140 	 * node #8, and I want to find it *first*, since
    141 	 * it will have the primary disks (most likely)
    142 	 * on it.
    143 	 */
    144 	for (node = 0; node <= TLSB_NODE_MAX; ++node) {
    145 		/*
    146 		 * Check for invalid address.  This may not really
    147 		 * be necessary, but what the heck...
    148 		 */
    149 		if (badaddr(TLSB_NODE_REG_ADDR(node, TLDEV), sizeof(uint32_t)))
    150 			continue;
    151 		tldev = TLSB_GET_NODEREG(node, TLDEV);
    152 		if (tldev == 0) {
    153 			/* Nothing at this node. */
    154 			continue;
    155 		}
    156 		/*
    157 		 * Store up that we found something at this node.
    158 		 * We do this so that we don't have to do something
    159 		 * silly at fault time like try a 'baddadr'...
    160 		 */
    161 		tlsb_found |= (1 << node);
    162 		if (TLDEV_ISIOPORT(tldev))
    163 			continue;	/* not interested right now */
    164 		ta.ta_node = node;
    165 		ta.ta_dtype = TLDEV_DTYPE(tldev);
    166 		ta.ta_swrev = TLDEV_SWREV(tldev);
    167 		ta.ta_hwrev = TLDEV_HWREV(tldev);
    168 
    169 		/*
    170 		 * Deal with hooking CPU instances to TurboLaser nodes.
    171 		 */
    172 		if (TLDEV_ISCPU(tldev)) {
    173 			aprint_normal("%s node %d: %s\n", device_xname(self),
    174 			    node, tlsb_node_type_str(tldev));
    175 		}
    176 		/*
    177 		 * Attach any children nodes, including a CPU's GBus
    178 		 */
    179 		locs[TLSBCF_NODE] = node;
    180 		locs[TLSBCF_OFFSET] = 0; /* XXX unused? */
    181 
    182 		config_found(self, &ta, tlsbprint,
    183 		    CFARG_SUBMATCH, config_stdsubmatch,
    184 		    CFARG_LOCATORS, locs,
    185 		    CFARG_EOL);
    186 	}
    187 	/*
    188 	 * *Now* search for I/O nodes (in descending order)
    189 	 */
    190 	while (--node > 0) {
    191 		if (badaddr(TLSB_NODE_REG_ADDR(node, TLDEV), sizeof(uint32_t)))
    192 			continue;
    193 		tldev = TLSB_GET_NODEREG(node, TLDEV);
    194 		if (tldev == 0) {
    195 			continue;
    196 		}
    197 		if (TLDEV_ISIOPORT(tldev)) {
    198 #if defined(MULTIPROCESSOR)
    199 			/*
    200 			 * XXX Eventually, we want to select a secondary
    201 			 * XXX processor on which to field interrupts for
    202 			 * XXX this node.  However, we just send them to
    203 			 * XXX the primary CPU for now.
    204 			 *
    205 			 * XXX Maybe multiple CPUs?  Does the hardware
    206 			 * XXX round-robin, or check the length of the
    207 			 * XXX per-CPU interrupt queue?
    208 			 */
    209 			printf("%s node %d: routing interrupts to %s\n",
    210 			  device_xname(self), node,
    211 			  device_xname(cpu_info[hwrpb->rpb_primary_cpu_id]->ci_softc->sc_dev));
    212 			TLSB_PUT_NODEREG(node, TLCPUMASK,
    213 			    (1UL << hwrpb->rpb_primary_cpu_id));
    214 #else
    215 			/*
    216 			 * Make sure interrupts are sent to the primary CPU.
    217 			 */
    218 			TLSB_PUT_NODEREG(node, TLCPUMASK,
    219 			    (1UL << hwrpb->rpb_primary_cpu_id));
    220 #endif /* MULTIPROCESSOR */
    221 
    222 			ta.ta_node = node;
    223 			ta.ta_dtype = TLDEV_DTYPE(tldev);
    224 			ta.ta_swrev = TLDEV_SWREV(tldev);
    225 			ta.ta_hwrev = TLDEV_HWREV(tldev);
    226 
    227 			locs[TLSBCF_NODE] = node;
    228 			locs[TLSBCF_OFFSET] = 0; /* XXX unused? */
    229 
    230 			config_found(self, &ta, tlsbprint,
    231 			    CFARG_SUBMATCH, config_stdsubmatch,
    232 			    CFARG_LOCATORS, locs,
    233 			    CFARG_EOL);
    234 		}
    235 	}
    236 }
    237 
    238 static const char *
    239 tlsb_node_type_str(uint32_t dtype)
    240 {
    241 	static char	tlsb_line[64];
    242 
    243 	switch (dtype & TLDEV_DTYPE_MASK) {
    244 	case TLDEV_DTYPE_KFTHA:
    245 		return ("KFTHA I/O interface");
    246 
    247 	case TLDEV_DTYPE_KFTIA:
    248 		return ("KFTIA I/O interface");
    249 
    250 	case TLDEV_DTYPE_MS7CC:
    251 		return ("MS7CC Memory Module");
    252 
    253 	case TLDEV_DTYPE_SCPU4:
    254 		return ("Single CPU, 4MB cache");
    255 
    256 	case TLDEV_DTYPE_SCPU16:
    257 		return ("Single CPU, 16MB cache");
    258 
    259 	case TLDEV_DTYPE_DCPU4:
    260 		return ("Dual CPU, 4MB cache");
    261 
    262 	case TLDEV_DTYPE_DCPU16:
    263 		return ("Dual CPU, 16MB cache");
    264 
    265 	default:
    266 		snprintf(tlsb_line, sizeof(tlsb_line), "unknown, dtype 0x%x",
    267 		    dtype);
    268 		return (tlsb_line);
    269 	}
    270 	/* NOTREACHED */
    271 }
    272