acpi_wakecode.S revision 1.1.2.8
1 /* $NetBSD: acpi_wakecode.S,v 1.1.2.8 2007/09/26 00:42:20 joerg Exp $ */ 2 3 /*- 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Takuya SHIOZAKI. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 40 /* 41 * This code is derived from FreeBSD. Original copyrights: 42 * 43 * Copyright (c) 2001 Takanori Watanabe <takawata (at) jp.freebsd.org> 44 * Copyright (c) 2001 Mitsuru IWASAKI <iwasaki (at) jp.freebsd.org> 45 * All rights reserved. 46 * 47 * Redistribution and use in source and binary forms, with or without 48 * modification, are permitted provided that the following conditions 49 * are met: 50 * 1. Redistributions of source code must retain the above copyright 51 * notice, this list of conditions and the following disclaimer. 52 * 2. Redistributions in binary form must reproduce the above copyright 53 * notice, this list of conditions and the following disclaimer in the 54 * documentation and/or other materials provided with the distribution. 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 59 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 66 * SUCH DAMAGE. 67 * 68 * FreeBSD: src/sys/i386/acpica/acpi_wakecode.S,v 1.1 2001/07/20 06:07:31 takawata Exp 69 */ 70 71 #define _LOCORE 72 73 #include <machine/psl.h> 74 #include <machine/specialreg.h> 75 #include <machine/segments.h> 76 77 #define ACPI_WAKEUP_ADDR 0x3000 78 79 .text 80 .code16 81 .org 0 /* ACPI spec says: cs==(phys>>8), ip==(phys&0x000F) */ 82 .globl wakeup_16 83 wakeup_16: 84 nop 85 cli 86 cld 87 88 /* Set up segment registers for real mode */ 89 movw %cs,%ax 90 movw %ax,%ds 91 movw %ax,%ss 92 93 /* Small call stack */ 94 mov $0x1000,%sp 95 96 /* Clear flags */ 97 pushl $0 98 popfl 99 100 /* Only beep on reset if machdep.acpi_beep_on_reset=1 */ 101 cmpb $1,WAKEUP_beep_on_reset 102 jne 1f 103 movb $0xc0,%al 104 outb %al,$0x42 105 movb $0x04,%al 106 outb %al,$0x42 107 inb $0x61,%al 108 orb $0x3,%al 109 outb %al,$0x61 110 1: 111 112 /* Only reset the VBIOS if machdep.acpi_vbios_reset=1 */ 113 cmpb $1,WAKEUP_vbios_reset 114 jne 1f 115 116 /* Kick the VBIOS. */ 117 lcall $0xc000,$3 118 119 /* Reset registers in case the VBIOS changed them. */ 120 movw %cs,%ax 121 movw %ax,%ds 122 movw %ax,%ss 123 1: 124 125 /* Disable beep again if machdep.acpi_beep_on_reset=1 */ 126 cmpb $1,WAKEUP_beep_on_reset 127 jne 1f 128 inb $0x61,%al 129 andb $0xfc,%al 130 outb %al,$0x61 131 1: 132 133 /* Load temporary 32bit GDT */ 134 data32 addr32 lgdt tmp_gdt 135 136 /* Enable protected mode w/o paging */ 137 mov %cr0,%eax 138 orl $(CR0_PE),%eax 139 mov %eax,%cr0 140 141 wakeup_sw32: 142 /* 143 * Switch to protected mode by intersegmental jump. 144 * Target and everything else has to compensate for the new origin 145 * as this is using the flat memory model now. 146 */ 147 148 ljmpl $0x8,$wakeup_32 + ACPI_WAKEUP_ADDR 149 150 .code32 151 .align 16 152 wakeup_32: 153 /* 154 * Switched to protected mode w/o paging 155 */ 156 157 nop 158 /* Set up segment registers and initial stack for protected mode */ 159 movw $0x10, %ax 160 movw %ax,%ds 161 movw %ax,%ss 162 163 movl ACPI_WAKEUP_ADDR + 4096,%esp 164 165 /* First, reset the PSL. */ 166 pushl $PSL_MBO 167 popfl 168 169 /* Enable PAE */ 170 movl %cr4,%eax 171 orl $(CR4_PAE|CR4_OSFXSR|CR4_OSXMMEXCPT),%eax 172 movl %eax,%cr4 173 174 /* Enable SYSCALL extension and Long Mode */ 175 movl $MSR_EFER,%ecx 176 rdmsr 177 xorl %eax,%eax 178 orl $(EFER_LME|EFER_SCE),%eax 179 wrmsr 180 181 /* Load temporary PML4, code will switch to full PML4 later */ 182 movl WAKEUP_r_cr3 + ACPI_WAKEUP_ADDR,%eax 183 movl %eax,%cr3 184 185 /* Reload cr0 with normal values, activating paging effectively */ 186 movl WAKEUP_r_cr0 + ACPI_WAKEUP_ADDR,%eax 187 movl %eax,%cr0 188 /* Flush prefetch queue */ 189 jmp 1f 190 1: 191 /* Switch to temporary 64bit GDT */ 192 lgdt tmp_gdt64 + ACPI_WAKEUP_ADDR 193 194 /* Switch to long mode using intersegmental jump. */ 195 ljmp $0x8, $wakeup_64 + ACPI_WAKEUP_ADDR 196 197 .code64 198 wakeup_64: 199 200 /* Reload normal segment registers with correct values */ 201 movw $GSEL(GDATA_SEL, SEL_KPL),%ax 202 movw %ax,%ds 203 movw %ax,%es 204 movw %ax,%ss 205 206 movq WAKEUP_restorecpu + ACPI_WAKEUP_ADDR,%rbx 207 208 /* Switch to the normal kernel GDT */ 209 lgdt WAKEUP_r_gdt + ACPI_WAKEUP_ADDR 210 211 /* Continue with wakeup in the high-level wakeup code */ 212 jmp *%rbx 213 214 .align 8 215 tmp_gdt: 216 .word 0xffff 217 .long tmp_gdtable + ACPI_WAKEUP_ADDR 218 219 .align 8, 0 220 tmp_gdtable: 221 /* null */ 222 .word 0, 0 223 .byte 0, 0, 0, 0 224 /* code */ 225 .word 0xffff, 0 226 .byte 0, 0x9f, 0xcf, 0 227 /* data */ 228 .word 0xffff, 0 229 .byte 0, 0x93, 0xcf, 0 230 231 tmp_gdt64: 232 .word 0xffff 233 .long tmp_gdtable64 + ACPI_WAKEUP_ADDR 234 235 tmp_gdtable64: 236 .quad 0x0000000000000000 237 .quad 0x00af9a000000ffff 238 .quad 0x00cf92000000ffff 239 240 .align 16, 0 241 .global WAKEUP_r_cr0 242 WAKEUP_r_cr0: .quad 0 243 .global WAKEUP_r_cr3 244 WAKEUP_r_cr3: .quad 0 245 246 .global WAKEUP_r_gdt 247 WAKEUP_r_gdt: .word 0 248 .quad 0 249 .global WAKEUP_restorecpu 250 WAKEUP_restorecpu: .quad 0 251 252 .global WAKEUP_vbios_reset 253 WAKEUP_vbios_reset: .byte 0 254 .global WAKEUP_beep_on_reset 255 WAKEUP_beep_on_reset: .byte 0 256
Indexes created Thu Oct 02 14:10:14 GMT 2025