acpi_wakecode.S revision 1.7
1 /* $NetBSD: acpi_wakecode.S,v 1.7 2008/05/25 17:20:29 joerg Exp $ */ 2 3 /*- 4 * Copyright (c) 2007 Joerg Sonnenberger <joerg (at) netbsd.org> 5 * 6 * Copyright (c) 2002 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Takuya SHIOZAKI. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 35 /* 36 * This code is derived from FreeBSD. Original copyrights: 37 * 38 * Copyright (c) 2001 Takanori Watanabe <takawata (at) jp.freebsd.org> 39 * Copyright (c) 2001 Mitsuru IWASAKI <iwasaki (at) jp.freebsd.org> 40 * All rights reserved. 41 * 42 * Redistribution and use in source and binary forms, with or without 43 * modification, are permitted provided that the following conditions 44 * are met: 45 * 1. Redistributions of source code must retain the above copyright 46 * notice, this list of conditions and the following disclaimer. 47 * 2. Redistributions in binary form must reproduce the above copyright 48 * notice, this list of conditions and the following disclaimer in the 49 * documentation and/or other materials provided with the distribution. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 52 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 53 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 54 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 55 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 56 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 57 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 58 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 59 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 60 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 61 * SUCH DAMAGE. 62 * 63 * FreeBSD: src/sys/i386/acpica/acpi_wakecode.S,v 1.1 2001/07/20 06:07:31 takawata Exp 64 */ 65 66 #define _LOCORE 67 68 #include <machine/psl.h> 69 #include <machine/segments.h> 70 #include <machine/specialreg.h> 71 72 #define ACPI_WAKEUP_ADDR 0x3000 73 74 .text 75 .code16 76 .org 0 /* ACPI spec says: cs==(phys>>8), ip==(phys&0x000F) */ 77 .globl wakeup_16 78 wakeup_16: 79 nop 80 cli 81 cld 82 83 /* Set up segment registers for real mode */ 84 movw %cs,%ax 85 movw %ax,%ds 86 movw %ax,%ss 87 88 /* Small call stack */ 89 mov $0x1000,%sp 90 91 /* Clear flags */ 92 pushl $0 93 popfl 94 95 /* Only beep on reset if machdep.acpi_beep_on_reset=1 */ 96 cmpb $1,WAKEUP_beep_on_reset 97 jne 1f 98 movb $0xc0,%al 99 outb %al,$0x42 100 movb $0x04,%al 101 outb %al,$0x42 102 inb $0x61,%al 103 orb $0x3,%al 104 outb %al,$0x61 105 1: 106 107 /* Only reset the VBIOS if machdep.acpi_vbios_reset=1 */ 108 cmpb $1,WAKEUP_vbios_reset 109 jne 1f 110 111 /* Kick the VBIOS. */ 112 lcall $0xc000,$3 113 114 /* Reset registers in case the VBIOS changed them. */ 115 movw %cs,%ax 116 movw %ax,%ds 117 movw %ax,%ss 118 1: 119 120 /* Disable beep again if machdep.acpi_beep_on_reset=1 */ 121 cmpb $1,WAKEUP_beep_on_reset 122 jne 1f 123 inb $0x61,%al 124 andb $0xfc,%al 125 outb %al,$0x61 126 1: 127 128 /* Load temporary 32bit GDT */ 129 data32 addr32 lgdt tmp_gdt 130 131 /* Enable protected mode w/o paging */ 132 mov %cr0,%eax 133 orl $(CR0_PE),%eax 134 mov %eax,%cr0 135 136 wakeup_sw32: 137 /* 138 * Switch to protected mode by intersegmental jump. 139 * Target and everything else has to compensate for the new origin 140 * as this is using the flat memory model now. 141 */ 142 143 ljmpl $0x8,$wakeup_32 + ACPI_WAKEUP_ADDR 144 145 .code32 146 .align 16 147 wakeup_32: 148 /* 149 * Switched to protected mode w/o paging 150 */ 151 152 nop 153 /* Set up segment registers and initial stack for protected mode */ 154 movw $0x10, %ax 155 movw %ax,%ds 156 movw %ax,%ss 157 158 movl $(ACPI_WAKEUP_ADDR + 4096),%esp 159 160 /* First, reset the PSL. */ 161 pushl $PSL_MBO 162 popfl 163 164 /* Enable PAE and potentially PSE */ 165 movl $(CR4_PAE|CR4_OSFXSR|CR4_OSXMMEXCPT|CR4_PSE),%eax 166 movl %eax,%cr4 167 168 /* 169 * First switch to Long Mode. Do not restore the original 170 * MSR EFER value directly, as enabling the NX bit without 171 * paging will result in a GPF on AMD CPUs. 172 * 173 * Load the correct MSR EFER value now to not depend on the 174 * data segment register directly after switching to Long Mode. 175 * After this point, no instruction is allowed to clobber %ebx. 176 */ 177 movl WAKEUP_efer + ACPI_WAKEUP_ADDR,%ebx 178 movl $MSR_EFER,%ecx 179 rdmsr 180 orl $EFER_LME, %eax 181 wrmsr 182 183 /* Load temporary PML4, code will switch to full PML4 later */ 184 movl WAKEUP_r_cr3 + ACPI_WAKEUP_ADDR,%eax 185 movl %eax,%cr3 186 187 /* Enable paging */ 188 movl %cr0,%eax 189 orl $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_MP|CR0_WP),%eax 190 movl %eax,%cr0 191 /* Flush prefetch queue */ 192 jmp 1f 193 1: 194 /* Switch to temporary 64bit GDT */ 195 lgdt tmp_gdt64 + ACPI_WAKEUP_ADDR 196 197 /* Switch to long mode using intersegmental jump. */ 198 ljmp $0x8, $wakeup_64 + ACPI_WAKEUP_ADDR 199 200 .code64 201 wakeup_64: 202 203 /* 204 * Load the normal system value of MSR EFER. This includes 205 * enabling the SYSCALL extension and NXE (if supported). 206 */ 207 movl %ebx, %eax 208 movl $MSR_EFER,%ecx 209 wrmsr 210 211 /* Reload data segment with default value */ 212 movw $GSEL(GDATA_SEL, SEL_KPL),%ax 213 movw %ax,%ds 214 215 movq WAKEUP_curcpu + ACPI_WAKEUP_ADDR,%r8 216 movq WAKEUP_restorecpu + ACPI_WAKEUP_ADDR,%rbx 217 218 /* Continue with wakeup in the high-level wakeup code */ 219 jmp *%rbx 220 221 .align 8 222 tmp_gdt: 223 .word 0xffff 224 .long tmp_gdtable + ACPI_WAKEUP_ADDR 225 226 .align 8, 0 227 tmp_gdtable: 228 /* null */ 229 .word 0, 0 230 .byte 0, 0, 0, 0 231 /* code */ 232 .word 0xffff, 0 233 .byte 0, 0x9f, 0xcf, 0 234 /* data */ 235 .word 0xffff, 0 236 .byte 0, 0x93, 0xcf, 0 237 238 tmp_gdt64: 239 .word 0xffff 240 .long tmp_gdtable64 + ACPI_WAKEUP_ADDR 241 242 tmp_gdtable64: 243 .quad 0x0000000000000000 244 .quad 0x00af9a000000ffff 245 .quad 0x00cf92000000ffff 246 247 .align 16, 0 248 .global WAKEUP_r_cr3 249 WAKEUP_r_cr3: .quad 0 250 251 .global WAKEUP_restorecpu 252 WAKEUP_restorecpu: .quad 0 253 254 .global WAKEUP_vbios_reset 255 WAKEUP_vbios_reset: .byte 0 256 .global WAKEUP_beep_on_reset 257 WAKEUP_beep_on_reset: .byte 0 258 259 .global WAKEUP_curcpu 260 WAKEUP_curcpu: .quad 0 261 .global WAKEUP_efer 262 WAKEUP_efer: .long 0 263
Indexes created Thu Sep 25 16:09:42 GMT 2025