lock_stubs.S revision 1.20
11.20Sad/*	$NetBSD: lock_stubs.S,v 1.20 2008/06/27 18:16:02 ad Exp $	*/
21.2Sad
31.2Sad/*-
41.13Sad * Copyright (c) 2006, 2007, 2008 The NetBSD Foundation, Inc.
51.2Sad * All rights reserved.
61.2Sad *
71.2Sad * This code is derived from software contributed to The NetBSD Foundation
81.2Sad * by Andrew Doran.
91.2Sad *
101.2Sad * Redistribution and use in source and binary forms, with or without
111.2Sad * modification, are permitted provided that the following conditions
121.2Sad * are met:
131.2Sad * 1. Redistributions of source code must retain the above copyright
141.2Sad *    notice, this list of conditions and the following disclaimer.
151.2Sad * 2. Redistributions in binary form must reproduce the above copyright
161.2Sad *    notice, this list of conditions and the following disclaimer in the
171.2Sad *    documentation and/or other materials provided with the distribution.
181.2Sad *
191.2Sad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
201.2Sad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
211.2Sad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
221.2Sad * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
231.2Sad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
241.2Sad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
251.2Sad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
261.2Sad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
271.2Sad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
281.2Sad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
291.2Sad * POSSIBILITY OF SUCH DAMAGE.
301.2Sad */
311.2Sad
321.2Sad/*
331.2Sad * AMD64 lock stubs.  Calling convention:
341.2Sad *
351.2Sad * %rdi		arg 1
361.2Sad * %rsi		arg 2
371.2Sad * %rdx		arg 3
381.2Sad * %rax		return value
391.2Sad */
401.2Sad
411.2Sad#include "opt_multiprocessor.h"
421.2Sad#include "opt_lockdebug.h"
431.2Sad
441.2Sad#include <machine/asm.h>
451.8Sbouyer#include <machine/frameasm.h>
461.2Sad
471.2Sad#include "assym.h"
481.2Sad
491.2Sad#if defined(DIAGNOSTIC) || defined(MULTIPROCESSOR) || defined(LOCKDEBUG)
501.2Sad#define	FULL
511.2Sad#endif
521.2Sad
531.16Syamt#define	ENDLABEL(name,a) .align	a; LABEL(name)
541.11Sad#define	LOCK(num)	.Lpatch/**/num: lock
551.2Sad
561.2Sad#ifndef LOCKDEBUG
571.2Sad
581.2Sad/*
591.2Sad * void mutex_enter(kmutex_t *mtx);
601.2Sad *
611.2Sad * Acquire a mutex and post a load fence.
621.2Sad */
631.2Sad	.align	64
641.2Sad
651.19SchsENTRY(mutex_enter)
661.2Sad	movq	CPUVAR(CURLWP), %rcx
671.2Sad	xorq	%rax, %rax
681.11Sad	LOCK(1)
691.2Sad	cmpxchgq %rcx, MTX_OWNER(%rdi)
701.14Sad	jnz	1f
711.2Sad	ret
721.14Sad1:
731.14Sad	jmp	_C_LABEL(mutex_vector_enter)
741.2Sad
751.2Sad/*
761.2Sad * void mutex_exit(kmutex_t *mtx);
771.2Sad *
781.2Sad * Release a mutex and post a load fence.
791.2Sad *
801.2Sad * See comments in mutex_vector_enter() about doing this operation unlocked
811.2Sad * on multiprocessor systems, and comments in arch/x86/include/lock.h about
821.2Sad * memory ordering on Intel x86 systems.
831.2Sad */
841.19SchsENTRY(mutex_exit)
851.2Sad	movq	CPUVAR(CURLWP), %rax
861.2Sad	xorq	%rdx, %rdx
871.2Sad	cmpxchgq %rdx, MTX_OWNER(%rdi)
881.14Sad	jnz	1f
891.2Sad	ret
901.14Sad1:
911.14Sad	jmp	_C_LABEL(mutex_vector_exit)
921.2Sad
931.2Sad/*
941.2Sad * void mutex_spin_enter(kmutex_t *mtx);
951.2Sad *
961.2Sad * Acquire a spin mutex and post a load fence.
971.2Sad */
981.19SchsENTRY(mutex_spin_enter)
991.20Sad	movl	$1, %eax
1001.14Sad	movl	CPUVAR(ILEVEL), %esi
1011.2Sad	movzbl	MTX_IPL(%rdi), %ecx		/* new SPL */
1021.2Sad	cmpl	%ecx, %esi			/* higher? */
1031.2Sad	cmovgl	%esi, %ecx
1041.14Sad	movl	%ecx, CPUVAR(ILEVEL)		/* splraiseipl() */
1051.20Sad	subl	%eax, CPUVAR(MTX_COUNT)		/* decl doesnt set CF */
1061.14Sad	cmovncl	CPUVAR(MTX_OLDSPL), %esi
1071.14Sad	movl	%esi, CPUVAR(MTX_OLDSPL)
1081.2Sad#if defined(FULL)
1091.20Sad	xchgb	%al, MTX_LOCK(%rdi)		/* lock */
1101.20Sad	testb	%al, %al
1111.14Sad	jnz	1f
1121.2Sad#endif
1131.2Sad	ret
1141.14Sad1:
1151.14Sad	jmp	_C_LABEL(mutex_spin_retry)	/* failed; hard case */
1161.2Sad
1171.2Sad/*
1181.2Sad * void mutex_spin_exit(kmutex_t *mtx);
1191.2Sad *
1201.2Sad * Release a spin mutex and post a load fence.
1211.2Sad */
1221.19SchsENTRY(mutex_spin_exit)
1231.2Sad#ifdef DIAGNOSTIC
1241.2Sad
1251.2Sad	movl	$0x0001, %eax			/* new + expected value */
1261.4Sad	movq	CPUVAR(SELF), %r8
1271.2Sad	cmpxchgb %ah, MTX_LOCK(%rdi)		/* unlock */
1281.2Sad	jnz,pn	_C_LABEL(mutex_vector_exit)	/* hard case if problems */
1291.4Sad	movl	CPU_INFO_MTX_OLDSPL(%r8), %edi
1301.4Sad	incl	CPU_INFO_MTX_COUNT(%r8)
1311.2Sad	jnz	1f
1321.4Sad	cmpl	CPU_INFO_ILEVEL(%r8), %edi
1331.2Sad	jae	1f
1341.4Sad	movl	CPU_INFO_IUNMASK(%r8,%rdi,4), %esi
1351.12Sdsl	CLI(ax)
1361.4Sad	testl	CPU_INFO_IPENDING(%r8), %esi
1371.2Sad	jnz	_C_LABEL(Xspllower)
1381.4Sad	movl	%edi, CPU_INFO_ILEVEL(%r8)
1391.12Sdsl	STI(ax)
1401.2Sad1:	rep					/* double byte ret as branch */
1411.2Sad	ret					/* target: see AMD docs */
1421.2Sad
1431.2Sad#else	/* DIAGNOSTIC */
1441.2Sad
1451.4Sad	movq	CPUVAR(SELF), %rsi
1461.2Sad#ifdef MULTIPROCESSOR
1471.2Sad	movb	$0x00, MTX_LOCK(%rdi)
1481.2Sad#endif
1491.4Sad	movl	CPU_INFO_MTX_OLDSPL(%rsi), %ecx
1501.4Sad	incl	CPU_INFO_MTX_COUNT(%rsi)
1511.4Sad	movl	CPU_INFO_ILEVEL(%rsi),%edx
1521.2Sad	cmovnzl	%edx,%ecx
1531.2Sad	cmpl	%edx,%ecx			/* new level is lower? */
1541.2Sad	pushq	%rbx
1551.2Sad	jae,pn	2f
1561.2Sad1:
1571.4Sad	movl	CPU_INFO_IPENDING(%rsi),%eax
1581.4Sad	testl	%eax,CPU_INFO_IUNMASK(%rsi,%rcx,4)/* deferred interrupts? */
1591.2Sad	movl	%eax,%ebx
1601.2Sad	jnz,pn	3f
1611.4Sad	cmpxchg8b CPU_INFO_ISTATE(%rsi)		/* swap in new ilevel */
1621.3Syamt	jnz,pn	1b
1631.2Sad2:
1641.2Sad	popq	%rbx
1651.2Sad	ret
1661.2Sad3:
1671.2Sad	popq	%rbx
1681.2Sad	movl	%ecx, %edi
1691.2Sad	jmp	_C_LABEL(Xspllower)
1701.2Sad
1711.2Sad#endif	/* DIAGNOSTIC */
1721.2Sad
1731.2Sad/*
1741.2Sad * void	rw_enter(krwlock_t *rwl, krw_t op);
1751.2Sad *
1761.2Sad * Acquire one hold on a RW lock.
1771.2Sad */
1781.19SchsENTRY(rw_enter)
1791.2Sad	cmpl	$RW_READER, %esi
1801.2Sad	jne	2f
1811.2Sad
1821.2Sad	/*
1831.2Sad	 * Reader: this is the most common case.
1841.2Sad	 */
1851.2Sad1:	movq	RW_OWNER(%rdi), %rax
1861.2Sad	testb	$(RW_WRITE_LOCKED|RW_WRITE_WANTED), %al
1871.2Sad	leaq	RW_READ_INCR(%rax), %rdx
1881.14Sad	jnz	3f
1891.11Sad	LOCK(2)
1901.2Sad	cmpxchgq %rdx, RW_OWNER(%rdi)
1911.2Sad	jnz,pn	1b
1921.2Sad	ret
1931.2Sad
1941.2Sad	/*
1951.2Sad	 * Writer: if the compare-and-set fails, don't bother retrying.
1961.2Sad	 */
1971.2Sad2:	movq	CPUVAR(CURLWP), %rcx
1981.2Sad	xorq	%rax, %rax
1991.2Sad	orq	$RW_WRITE_LOCKED, %rcx
2001.11Sad	LOCK(3)
2011.2Sad	cmpxchgq %rcx, RW_OWNER(%rdi)
2021.14Sad	jnz	3f
2031.2Sad	ret
2041.14Sad3:
2051.14Sad	jmp	_C_LABEL(rw_vector_enter)
2061.2Sad
2071.2Sad/*
2081.2Sad * void	rw_exit(krwlock_t *rwl);
2091.2Sad *
2101.2Sad * Release one hold on a RW lock.
2111.2Sad */
2121.19SchsENTRY(rw_exit)
2131.2Sad	movq	RW_OWNER(%rdi), %rax
2141.2Sad	testb	$RW_WRITE_LOCKED, %al
2151.2Sad	jnz	2f
2161.2Sad
2171.2Sad	/*
2181.2Sad	 * Reader
2191.2Sad	 */
2201.2Sad1:	testb	$RW_HAS_WAITERS, %al
2211.14Sad	jnz	3f
2221.2Sad	cmpq	$RW_READ_INCR, %rax
2231.2Sad	leaq	-RW_READ_INCR(%rax), %rdx
2241.14Sad	jb	3f
2251.11Sad	LOCK(4)
2261.2Sad	cmpxchgq %rdx, RW_OWNER(%rdi)
2271.2Sad	jnz,pn	1b
2281.2Sad	ret
2291.2Sad
2301.2Sad	/*
2311.2Sad	 * Writer
2321.2Sad	 */
2331.2Sad2:	leaq	-RW_WRITE_LOCKED(%rax), %rdx
2341.2Sad	subq	CPUVAR(CURLWP), %rdx
2351.14Sad	jnz	3f
2361.11Sad	LOCK(5)
2371.2Sad	cmpxchgq %rdx, RW_OWNER(%rdi)
2381.2Sad	jnz	3f
2391.2Sad	ret
2401.2Sad
2411.2Sad3:	jmp	_C_LABEL(rw_vector_exit)
2421.2Sad
2431.13Sad/*
2441.13Sad * int	rw_tryenter(krwlock_t *rwl, krw_t op);
2451.13Sad *
2461.13Sad * Try to acquire one hold on a RW lock.
2471.13Sad */
2481.19SchsENTRY(rw_tryenter)
2491.13Sad	cmpl	$RW_READER, %esi
2501.13Sad	jne	2f
2511.13Sad
2521.13Sad	/*
2531.13Sad	 * Reader: this is the most common case.
2541.13Sad	 */
2551.17Sad	movq	RW_OWNER(%rdi), %rax
2561.17Sad1:
2571.13Sad	testb	$(RW_WRITE_LOCKED|RW_WRITE_WANTED), %al
2581.13Sad	leaq	RW_READ_INCR(%rax), %rdx
2591.13Sad	jnz	3f
2601.13Sad	LOCK(8)
2611.13Sad	cmpxchgq %rdx, RW_OWNER(%rdi)
2621.17Sad	jnz	1b
2631.17Sad	movl	%edi, %eax			/* nonzero */
2641.13Sad	ret
2651.13Sad
2661.13Sad	/*
2671.13Sad	 * Writer: if the compare-and-set fails, don't bother retrying.
2681.13Sad	 */
2691.13Sad2:	movq	CPUVAR(CURLWP), %rcx
2701.13Sad	xorq	%rax, %rax
2711.13Sad	orq	$RW_WRITE_LOCKED, %rcx
2721.13Sad	LOCK(9)
2731.13Sad	cmpxchgq %rcx, RW_OWNER(%rdi)
2741.18Sad	movl	$0, %eax
2751.13Sad	setz	%al
2761.13Sad	ret
2771.13Sad
2781.13Sad3:	xorl	%eax, %eax
2791.13Sad	ret
2801.13Sad
2811.2Sad#endif	/* LOCKDEBUG */
2821.2Sad
2831.2Sad/*
2841.11Sad * Spinlocks.
2851.2Sad */
2861.19SchsENTRY(__cpu_simple_lock_init)
2871.11Sad	movb	$0, (%rdi)
2881.2Sad	ret
2891.2Sad
2901.11SadNENTRY(__cpu_simple_lock)
2911.11Sad	movl	$0x0100, %eax
2921.11Sad1:
2931.11Sad	LOCK(6)
2941.11Sad	cmpxchgb %ah, (%rdi)
2951.11Sad	jnz	2f
2961.2Sad	ret
2971.11Sad2:
2981.11Sad	movl	$0x0100, %eax
2991.11Sad	pause
3001.11Sad	nop
3011.7Sad	nop
3021.11Sad	cmpb	$0, (%rdi)
3031.11Sad	je	1b
3041.11Sad	jmp	2b
3051.11Sad
3061.19SchsENTRY(__cpu_simple_unlock)
3071.11Sad	movb	$0, (%rdi)
3081.2Sad	ret
3091.7Sad
3101.19SchsENTRY(__cpu_simple_lock_try)
3111.11Sad	movl	$0x0100, %eax
3121.11Sad	LOCK(7)
3131.11Sad	cmpxchgb %ah, (%rdi)
3141.11Sad	movl	$0, %eax
3151.11Sad	setz	%al
3161.2Sad	ret
3171.2Sad
3181.2Sad/*
3191.7Sad * Patchpoints to replace with NOP when ncpu == 1.
3201.7Sad */
3211.7Sad#ifndef LOCKDEBUG
3221.7SadLABEL(x86_lockpatch)
3231.11Sad	.quad	.Lpatch1, .Lpatch2, .Lpatch3, .Lpatch4
3241.13Sad	.quad	.Lpatch5, .Lpatch6, .Lpatch7, .Lpatch8
3251.13Sad	.quad	.Lpatch9
3261.7Sad	.quad	0
3271.7Sad#endif
328