lock_stubs.S revision 1.21
11.21Sad/* $NetBSD: lock_stubs.S,v 1.21 2008/12/05 13:08:11 ad Exp $ */ 21.2Sad 31.2Sad/*- 41.13Sad * Copyright (c) 2006, 2007, 2008 The NetBSD Foundation, Inc. 51.2Sad * All rights reserved. 61.2Sad * 71.2Sad * This code is derived from software contributed to The NetBSD Foundation 81.2Sad * by Andrew Doran. 91.2Sad * 101.2Sad * Redistribution and use in source and binary forms, with or without 111.2Sad * modification, are permitted provided that the following conditions 121.2Sad * are met: 131.2Sad * 1. Redistributions of source code must retain the above copyright 141.2Sad * notice, this list of conditions and the following disclaimer. 151.2Sad * 2. Redistributions in binary form must reproduce the above copyright 161.2Sad * notice, this list of conditions and the following disclaimer in the 171.2Sad * documentation and/or other materials provided with the distribution. 181.2Sad * 191.2Sad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 201.2Sad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 211.2Sad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 221.2Sad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 231.2Sad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 241.2Sad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 251.2Sad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 261.2Sad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 271.2Sad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 281.2Sad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 291.2Sad * POSSIBILITY OF SUCH DAMAGE. 301.2Sad */ 311.2Sad 321.2Sad/* 331.2Sad * AMD64 lock stubs. Calling convention: 341.2Sad * 351.2Sad * %rdi arg 1 361.2Sad * %rsi arg 2 371.2Sad * %rdx arg 3 381.2Sad * %rax return value 391.2Sad */ 401.2Sad 411.2Sad#include "opt_multiprocessor.h" 421.2Sad#include "opt_lockdebug.h" 431.2Sad 441.2Sad#include <machine/asm.h> 451.8Sbouyer#include <machine/frameasm.h> 461.2Sad 471.2Sad#include "assym.h" 481.2Sad 491.16Syamt#define ENDLABEL(name,a) .align a; LABEL(name) 501.11Sad#define LOCK(num) .Lpatch/**/num: lock 511.2Sad 521.2Sad#ifndef LOCKDEBUG 531.2Sad 541.2Sad/* 551.2Sad * void mutex_enter(kmutex_t *mtx); 561.2Sad * 571.2Sad * Acquire a mutex and post a load fence. 581.2Sad */ 591.2Sad .align 64 601.2Sad 611.19SchsENTRY(mutex_enter) 621.2Sad movq CPUVAR(CURLWP), %rcx 631.2Sad xorq %rax, %rax 641.11Sad LOCK(1) 651.21Sad cmpxchgq %rcx, (%rdi) 661.14Sad jnz 1f 671.2Sad ret 681.14Sad1: 691.14Sad jmp _C_LABEL(mutex_vector_enter) 701.2Sad 711.2Sad/* 721.2Sad * void mutex_exit(kmutex_t *mtx); 731.2Sad * 741.2Sad * Release a mutex and post a load fence. 751.2Sad * 761.2Sad * See comments in mutex_vector_enter() about doing this operation unlocked 771.2Sad * on multiprocessor systems, and comments in arch/x86/include/lock.h about 781.2Sad * memory ordering on Intel x86 systems. 791.2Sad */ 801.19SchsENTRY(mutex_exit) 811.2Sad movq CPUVAR(CURLWP), %rax 821.2Sad xorq %rdx, %rdx 831.21Sad cmpxchgq %rdx, (%rdi) 841.14Sad jnz 1f 851.2Sad ret 861.14Sad1: 871.14Sad jmp _C_LABEL(mutex_vector_exit) 881.2Sad 891.2Sad/* 901.2Sad * void mutex_spin_enter(kmutex_t *mtx); 911.2Sad * 921.2Sad * Acquire a spin mutex and post a load fence. 931.2Sad */ 941.19SchsENTRY(mutex_spin_enter) 951.20Sad movl $1, %eax 961.14Sad movl CPUVAR(ILEVEL), %esi 971.2Sad movzbl MTX_IPL(%rdi), %ecx /* new SPL */ 981.2Sad cmpl %ecx, %esi /* higher? */ 991.2Sad cmovgl %esi, %ecx 1001.14Sad movl %ecx, CPUVAR(ILEVEL) /* splraiseipl() */ 1011.20Sad subl %eax, CPUVAR(MTX_COUNT) /* decl doesnt set CF */ 1021.14Sad cmovncl CPUVAR(MTX_OLDSPL), %esi 1031.14Sad movl %esi, CPUVAR(MTX_OLDSPL) 1041.20Sad xchgb %al, MTX_LOCK(%rdi) /* lock */ 1051.21Sad#ifdef MULTIPROCESSOR /* XXX for xen */ 1061.20Sad testb %al, %al 1071.14Sad jnz 1f 1081.2Sad#endif 1091.2Sad ret 1101.14Sad1: 1111.14Sad jmp _C_LABEL(mutex_spin_retry) /* failed; hard case */ 1121.2Sad 1131.2Sad/* 1141.2Sad * void mutex_spin_exit(kmutex_t *mtx); 1151.2Sad * 1161.2Sad * Release a spin mutex and post a load fence. 1171.2Sad */ 1181.19SchsENTRY(mutex_spin_exit) 1191.2Sad#ifdef DIAGNOSTIC 1201.2Sad 1211.2Sad movl $0x0001, %eax /* new + expected value */ 1221.4Sad movq CPUVAR(SELF), %r8 1231.2Sad cmpxchgb %ah, MTX_LOCK(%rdi) /* unlock */ 1241.21Sad jnz _C_LABEL(mutex_vector_exit) /* hard case if problems */ 1251.4Sad movl CPU_INFO_MTX_OLDSPL(%r8), %edi 1261.4Sad incl CPU_INFO_MTX_COUNT(%r8) 1271.2Sad jnz 1f 1281.4Sad cmpl CPU_INFO_ILEVEL(%r8), %edi 1291.2Sad jae 1f 1301.4Sad movl CPU_INFO_IUNMASK(%r8,%rdi,4), %esi 1311.12Sdsl CLI(ax) 1321.4Sad testl CPU_INFO_IPENDING(%r8), %esi 1331.2Sad jnz _C_LABEL(Xspllower) 1341.4Sad movl %edi, CPU_INFO_ILEVEL(%r8) 1351.12Sdsl STI(ax) 1361.2Sad1: rep /* double byte ret as branch */ 1371.2Sad ret /* target: see AMD docs */ 1381.2Sad 1391.2Sad#else /* DIAGNOSTIC */ 1401.2Sad 1411.4Sad movq CPUVAR(SELF), %rsi 1421.2Sad movb $0x00, MTX_LOCK(%rdi) 1431.4Sad movl CPU_INFO_MTX_OLDSPL(%rsi), %ecx 1441.4Sad incl CPU_INFO_MTX_COUNT(%rsi) 1451.4Sad movl CPU_INFO_ILEVEL(%rsi),%edx 1461.2Sad cmovnzl %edx,%ecx 1471.21Sad pushq %rbx 1481.2Sad cmpl %edx,%ecx /* new level is lower? */ 1491.21Sad jae 2f 1501.2Sad1: 1511.4Sad movl CPU_INFO_IPENDING(%rsi),%eax 1521.4Sad testl %eax,CPU_INFO_IUNMASK(%rsi,%rcx,4)/* deferred interrupts? */ 1531.21Sad jnz 3f 1541.2Sad movl %eax,%ebx 1551.4Sad cmpxchg8b CPU_INFO_ISTATE(%rsi) /* swap in new ilevel */ 1561.21Sad jnz 4f 1571.2Sad2: 1581.2Sad popq %rbx 1591.2Sad ret 1601.2Sad3: 1611.2Sad popq %rbx 1621.2Sad movl %ecx, %edi 1631.2Sad jmp _C_LABEL(Xspllower) 1641.21Sad4: 1651.21Sad jmp 1b 1661.2Sad 1671.2Sad#endif /* DIAGNOSTIC */ 1681.2Sad 1691.2Sad/* 1701.2Sad * void rw_enter(krwlock_t *rwl, krw_t op); 1711.2Sad * 1721.2Sad * Acquire one hold on a RW lock. 1731.2Sad */ 1741.19SchsENTRY(rw_enter) 1751.2Sad cmpl $RW_READER, %esi 1761.2Sad jne 2f 1771.2Sad 1781.2Sad /* 1791.2Sad * Reader: this is the most common case. 1801.2Sad */ 1811.21Sad movq (%rdi), %rax 1821.21Sad0: 1831.2Sad testb $(RW_WRITE_LOCKED|RW_WRITE_WANTED), %al 1841.21Sad jnz 3f 1851.2Sad leaq RW_READ_INCR(%rax), %rdx 1861.11Sad LOCK(2) 1871.21Sad cmpxchgq %rdx, (%rdi) 1881.21Sad jnz 1f 1891.2Sad ret 1901.21Sad1: 1911.21Sad jmp 0b 1921.2Sad 1931.2Sad /* 1941.2Sad * Writer: if the compare-and-set fails, don't bother retrying. 1951.2Sad */ 1961.2Sad2: movq CPUVAR(CURLWP), %rcx 1971.2Sad xorq %rax, %rax 1981.2Sad orq $RW_WRITE_LOCKED, %rcx 1991.11Sad LOCK(3) 2001.21Sad cmpxchgq %rcx, (%rdi) 2011.14Sad jnz 3f 2021.2Sad ret 2031.14Sad3: 2041.14Sad jmp _C_LABEL(rw_vector_enter) 2051.2Sad 2061.2Sad/* 2071.2Sad * void rw_exit(krwlock_t *rwl); 2081.2Sad * 2091.2Sad * Release one hold on a RW lock. 2101.2Sad */ 2111.19SchsENTRY(rw_exit) 2121.21Sad movq (%rdi), %rax 2131.2Sad testb $RW_WRITE_LOCKED, %al 2141.2Sad jnz 2f 2151.2Sad 2161.2Sad /* 2171.2Sad * Reader 2181.2Sad */ 2191.21Sad0: testb $RW_HAS_WAITERS, %al 2201.14Sad jnz 3f 2211.2Sad cmpq $RW_READ_INCR, %rax 2221.21Sad jb 3f 2231.2Sad leaq -RW_READ_INCR(%rax), %rdx 2241.11Sad LOCK(4) 2251.21Sad cmpxchgq %rdx, (%rdi) 2261.21Sad jnz 1f 2271.2Sad ret 2281.21Sad1: 2291.21Sad jmp 0b 2301.2Sad 2311.2Sad /* 2321.2Sad * Writer 2331.2Sad */ 2341.2Sad2: leaq -RW_WRITE_LOCKED(%rax), %rdx 2351.2Sad subq CPUVAR(CURLWP), %rdx 2361.14Sad jnz 3f 2371.11Sad LOCK(5) 2381.21Sad cmpxchgq %rdx, (%rdi) 2391.2Sad jnz 3f 2401.2Sad ret 2411.2Sad 2421.2Sad3: jmp _C_LABEL(rw_vector_exit) 2431.2Sad 2441.13Sad/* 2451.13Sad * int rw_tryenter(krwlock_t *rwl, krw_t op); 2461.13Sad * 2471.13Sad * Try to acquire one hold on a RW lock. 2481.13Sad */ 2491.19SchsENTRY(rw_tryenter) 2501.13Sad cmpl $RW_READER, %esi 2511.13Sad jne 2f 2521.13Sad 2531.13Sad /* 2541.13Sad * Reader: this is the most common case. 2551.13Sad */ 2561.21Sad movq (%rdi), %rax 2571.21Sad0: 2581.13Sad testb $(RW_WRITE_LOCKED|RW_WRITE_WANTED), %al 2591.21Sad jnz 3f 2601.13Sad leaq RW_READ_INCR(%rax), %rdx 2611.13Sad LOCK(8) 2621.21Sad cmpxchgq %rdx, (%rdi) 2631.21Sad jnz 1f 2641.21Sad movl %edx, %eax /* nonzero */ 2651.13Sad ret 2661.21Sad1: 2671.21Sad jmp 0b 2681.13Sad 2691.13Sad /* 2701.13Sad * Writer: if the compare-and-set fails, don't bother retrying. 2711.13Sad */ 2721.13Sad2: movq CPUVAR(CURLWP), %rcx 2731.13Sad xorq %rax, %rax 2741.13Sad orq $RW_WRITE_LOCKED, %rcx 2751.13Sad LOCK(9) 2761.21Sad cmpxchgq %rcx, (%rdi) 2771.18Sad movl $0, %eax 2781.13Sad setz %al 2791.13Sad ret 2801.13Sad 2811.13Sad3: xorl %eax, %eax 2821.13Sad ret 2831.13Sad 2841.2Sad#endif /* LOCKDEBUG */ 2851.2Sad 2861.2Sad/* 2871.11Sad * Spinlocks. 2881.2Sad */ 2891.19SchsENTRY(__cpu_simple_lock_init) 2901.11Sad movb $0, (%rdi) 2911.2Sad ret 2921.2Sad 2931.11SadNENTRY(__cpu_simple_lock) 2941.11Sad movl $0x0100, %eax 2951.11Sad1: 2961.11Sad LOCK(6) 2971.11Sad cmpxchgb %ah, (%rdi) 2981.11Sad jnz 2f 2991.2Sad ret 3001.11Sad2: 3011.11Sad movl $0x0100, %eax 3021.11Sad pause 3031.11Sad nop 3041.7Sad nop 3051.11Sad cmpb $0, (%rdi) 3061.11Sad je 1b 3071.11Sad jmp 2b 3081.11Sad 3091.19SchsENTRY(__cpu_simple_unlock) 3101.11Sad movb $0, (%rdi) 3111.2Sad ret 3121.7Sad 3131.19SchsENTRY(__cpu_simple_lock_try) 3141.11Sad movl $0x0100, %eax 3151.11Sad LOCK(7) 3161.11Sad cmpxchgb %ah, (%rdi) 3171.11Sad movl $0, %eax 3181.11Sad setz %al 3191.2Sad ret 3201.2Sad 3211.2Sad/* 3221.7Sad * Patchpoints to replace with NOP when ncpu == 1. 3231.7Sad */ 3241.7Sad#ifndef LOCKDEBUG 3251.7SadLABEL(x86_lockpatch) 3261.11Sad .quad .Lpatch1, .Lpatch2, .Lpatch3, .Lpatch4 3271.13Sad .quad .Lpatch5, .Lpatch6, .Lpatch7, .Lpatch8 3281.13Sad .quad .Lpatch9 3291.7Sad .quad 0 3301.7Sad#endif 331