lock_stubs.S revision 1.22
11.22Sad/* $NetBSD: lock_stubs.S,v 1.22 2009/04/24 17:45:40 ad Exp $ */ 21.2Sad 31.2Sad/*- 41.22Sad * Copyright (c) 2006, 2007, 2008, 2009 The NetBSD Foundation, Inc. 51.2Sad * All rights reserved. 61.2Sad * 71.2Sad * This code is derived from software contributed to The NetBSD Foundation 81.2Sad * by Andrew Doran. 91.2Sad * 101.2Sad * Redistribution and use in source and binary forms, with or without 111.2Sad * modification, are permitted provided that the following conditions 121.2Sad * are met: 131.2Sad * 1. Redistributions of source code must retain the above copyright 141.2Sad * notice, this list of conditions and the following disclaimer. 151.2Sad * 2. Redistributions in binary form must reproduce the above copyright 161.2Sad * notice, this list of conditions and the following disclaimer in the 171.2Sad * documentation and/or other materials provided with the distribution. 181.2Sad * 191.2Sad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 201.2Sad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 211.2Sad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 221.2Sad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 231.2Sad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 241.2Sad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 251.2Sad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 261.2Sad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 271.2Sad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 281.2Sad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 291.2Sad * POSSIBILITY OF SUCH DAMAGE. 301.2Sad */ 311.2Sad 321.2Sad/* 331.2Sad * AMD64 lock stubs. Calling convention: 341.2Sad * 351.2Sad * %rdi arg 1 361.2Sad * %rsi arg 2 371.2Sad * %rdx arg 3 381.2Sad * %rax return value 391.2Sad */ 401.2Sad 411.2Sad#include "opt_multiprocessor.h" 421.2Sad#include "opt_lockdebug.h" 431.2Sad 441.2Sad#include <machine/asm.h> 451.8Sbouyer#include <machine/frameasm.h> 461.2Sad 471.2Sad#include "assym.h" 481.2Sad 491.16Syamt#define ENDLABEL(name,a) .align a; LABEL(name) 501.11Sad#define LOCK(num) .Lpatch/**/num: lock 511.22Sad#define RET(num) .Lret/**/num: ret; nop; nop; ret 521.2Sad 531.2Sad#ifndef LOCKDEBUG 541.2Sad 551.2Sad/* 561.2Sad * void mutex_enter(kmutex_t *mtx); 571.2Sad * 581.2Sad * Acquire a mutex and post a load fence. 591.2Sad */ 601.2Sad .align 64 611.2Sad 621.19SchsENTRY(mutex_enter) 631.2Sad movq CPUVAR(CURLWP), %rcx 641.2Sad xorq %rax, %rax 651.11Sad LOCK(1) 661.21Sad cmpxchgq %rcx, (%rdi) 671.14Sad jnz 1f 681.22Sad RET(1) 691.14Sad1: 701.14Sad jmp _C_LABEL(mutex_vector_enter) 711.2Sad 721.2Sad/* 731.2Sad * void mutex_exit(kmutex_t *mtx); 741.2Sad * 751.2Sad * Release a mutex and post a load fence. 761.2Sad * 771.2Sad * See comments in mutex_vector_enter() about doing this operation unlocked 781.2Sad * on multiprocessor systems, and comments in arch/x86/include/lock.h about 791.2Sad * memory ordering on Intel x86 systems. 801.2Sad */ 811.19SchsENTRY(mutex_exit) 821.2Sad movq CPUVAR(CURLWP), %rax 831.2Sad xorq %rdx, %rdx 841.21Sad cmpxchgq %rdx, (%rdi) 851.14Sad jnz 1f 861.2Sad ret 871.14Sad1: 881.14Sad jmp _C_LABEL(mutex_vector_exit) 891.2Sad 901.2Sad/* 911.2Sad * void mutex_spin_enter(kmutex_t *mtx); 921.2Sad * 931.2Sad * Acquire a spin mutex and post a load fence. 941.2Sad */ 951.19SchsENTRY(mutex_spin_enter) 961.20Sad movl $1, %eax 971.14Sad movl CPUVAR(ILEVEL), %esi 981.2Sad movzbl MTX_IPL(%rdi), %ecx /* new SPL */ 991.2Sad cmpl %ecx, %esi /* higher? */ 1001.2Sad cmovgl %esi, %ecx 1011.14Sad movl %ecx, CPUVAR(ILEVEL) /* splraiseipl() */ 1021.20Sad subl %eax, CPUVAR(MTX_COUNT) /* decl doesnt set CF */ 1031.14Sad cmovncl CPUVAR(MTX_OLDSPL), %esi 1041.14Sad movl %esi, CPUVAR(MTX_OLDSPL) 1051.20Sad xchgb %al, MTX_LOCK(%rdi) /* lock */ 1061.21Sad#ifdef MULTIPROCESSOR /* XXX for xen */ 1071.20Sad testb %al, %al 1081.14Sad jnz 1f 1091.2Sad#endif 1101.22Sad RET(2) 1111.14Sad1: 1121.14Sad jmp _C_LABEL(mutex_spin_retry) /* failed; hard case */ 1131.2Sad 1141.2Sad/* 1151.2Sad * void mutex_spin_exit(kmutex_t *mtx); 1161.2Sad * 1171.2Sad * Release a spin mutex and post a load fence. 1181.2Sad */ 1191.19SchsENTRY(mutex_spin_exit) 1201.2Sad#ifdef DIAGNOSTIC 1211.2Sad 1221.2Sad movl $0x0001, %eax /* new + expected value */ 1231.4Sad movq CPUVAR(SELF), %r8 1241.2Sad cmpxchgb %ah, MTX_LOCK(%rdi) /* unlock */ 1251.21Sad jnz _C_LABEL(mutex_vector_exit) /* hard case if problems */ 1261.4Sad movl CPU_INFO_MTX_OLDSPL(%r8), %edi 1271.4Sad incl CPU_INFO_MTX_COUNT(%r8) 1281.2Sad jnz 1f 1291.4Sad cmpl CPU_INFO_ILEVEL(%r8), %edi 1301.2Sad jae 1f 1311.4Sad movl CPU_INFO_IUNMASK(%r8,%rdi,4), %esi 1321.12Sdsl CLI(ax) 1331.4Sad testl CPU_INFO_IPENDING(%r8), %esi 1341.2Sad jnz _C_LABEL(Xspllower) 1351.4Sad movl %edi, CPU_INFO_ILEVEL(%r8) 1361.12Sdsl STI(ax) 1371.2Sad1: rep /* double byte ret as branch */ 1381.2Sad ret /* target: see AMD docs */ 1391.2Sad 1401.2Sad#else /* DIAGNOSTIC */ 1411.2Sad 1421.4Sad movq CPUVAR(SELF), %rsi 1431.2Sad movb $0x00, MTX_LOCK(%rdi) 1441.4Sad movl CPU_INFO_MTX_OLDSPL(%rsi), %ecx 1451.4Sad incl CPU_INFO_MTX_COUNT(%rsi) 1461.4Sad movl CPU_INFO_ILEVEL(%rsi),%edx 1471.2Sad cmovnzl %edx,%ecx 1481.21Sad pushq %rbx 1491.2Sad cmpl %edx,%ecx /* new level is lower? */ 1501.21Sad jae 2f 1511.2Sad1: 1521.4Sad movl CPU_INFO_IPENDING(%rsi),%eax 1531.4Sad testl %eax,CPU_INFO_IUNMASK(%rsi,%rcx,4)/* deferred interrupts? */ 1541.21Sad jnz 3f 1551.2Sad movl %eax,%ebx 1561.4Sad cmpxchg8b CPU_INFO_ISTATE(%rsi) /* swap in new ilevel */ 1571.21Sad jnz 4f 1581.2Sad2: 1591.2Sad popq %rbx 1601.2Sad ret 1611.2Sad3: 1621.2Sad popq %rbx 1631.2Sad movl %ecx, %edi 1641.2Sad jmp _C_LABEL(Xspllower) 1651.21Sad4: 1661.21Sad jmp 1b 1671.2Sad 1681.2Sad#endif /* DIAGNOSTIC */ 1691.2Sad 1701.2Sad/* 1711.2Sad * void rw_enter(krwlock_t *rwl, krw_t op); 1721.2Sad * 1731.2Sad * Acquire one hold on a RW lock. 1741.2Sad */ 1751.19SchsENTRY(rw_enter) 1761.2Sad cmpl $RW_READER, %esi 1771.2Sad jne 2f 1781.2Sad 1791.2Sad /* 1801.2Sad * Reader: this is the most common case. 1811.2Sad */ 1821.21Sad movq (%rdi), %rax 1831.21Sad0: 1841.2Sad testb $(RW_WRITE_LOCKED|RW_WRITE_WANTED), %al 1851.21Sad jnz 3f 1861.2Sad leaq RW_READ_INCR(%rax), %rdx 1871.11Sad LOCK(2) 1881.21Sad cmpxchgq %rdx, (%rdi) 1891.21Sad jnz 1f 1901.22Sad RET(3) 1911.21Sad1: 1921.21Sad jmp 0b 1931.2Sad 1941.2Sad /* 1951.2Sad * Writer: if the compare-and-set fails, don't bother retrying. 1961.2Sad */ 1971.2Sad2: movq CPUVAR(CURLWP), %rcx 1981.2Sad xorq %rax, %rax 1991.2Sad orq $RW_WRITE_LOCKED, %rcx 2001.11Sad LOCK(3) 2011.21Sad cmpxchgq %rcx, (%rdi) 2021.14Sad jnz 3f 2031.22Sad RET(4) 2041.14Sad3: 2051.14Sad jmp _C_LABEL(rw_vector_enter) 2061.2Sad 2071.2Sad/* 2081.2Sad * void rw_exit(krwlock_t *rwl); 2091.2Sad * 2101.2Sad * Release one hold on a RW lock. 2111.2Sad */ 2121.19SchsENTRY(rw_exit) 2131.21Sad movq (%rdi), %rax 2141.2Sad testb $RW_WRITE_LOCKED, %al 2151.2Sad jnz 2f 2161.2Sad 2171.2Sad /* 2181.2Sad * Reader 2191.2Sad */ 2201.21Sad0: testb $RW_HAS_WAITERS, %al 2211.14Sad jnz 3f 2221.2Sad cmpq $RW_READ_INCR, %rax 2231.21Sad jb 3f 2241.2Sad leaq -RW_READ_INCR(%rax), %rdx 2251.11Sad LOCK(4) 2261.21Sad cmpxchgq %rdx, (%rdi) 2271.21Sad jnz 1f 2281.2Sad ret 2291.21Sad1: 2301.21Sad jmp 0b 2311.2Sad 2321.2Sad /* 2331.2Sad * Writer 2341.2Sad */ 2351.2Sad2: leaq -RW_WRITE_LOCKED(%rax), %rdx 2361.2Sad subq CPUVAR(CURLWP), %rdx 2371.14Sad jnz 3f 2381.11Sad LOCK(5) 2391.21Sad cmpxchgq %rdx, (%rdi) 2401.2Sad jnz 3f 2411.2Sad ret 2421.2Sad 2431.2Sad3: jmp _C_LABEL(rw_vector_exit) 2441.2Sad 2451.13Sad/* 2461.13Sad * int rw_tryenter(krwlock_t *rwl, krw_t op); 2471.13Sad * 2481.13Sad * Try to acquire one hold on a RW lock. 2491.13Sad */ 2501.19SchsENTRY(rw_tryenter) 2511.13Sad cmpl $RW_READER, %esi 2521.13Sad jne 2f 2531.13Sad 2541.13Sad /* 2551.13Sad * Reader: this is the most common case. 2561.13Sad */ 2571.21Sad movq (%rdi), %rax 2581.21Sad0: 2591.13Sad testb $(RW_WRITE_LOCKED|RW_WRITE_WANTED), %al 2601.22Sad jnz 4f 2611.13Sad leaq RW_READ_INCR(%rax), %rdx 2621.13Sad LOCK(8) 2631.21Sad cmpxchgq %rdx, (%rdi) 2641.21Sad jnz 1f 2651.21Sad movl %edx, %eax /* nonzero */ 2661.22Sad RET(5) 2671.21Sad1: 2681.21Sad jmp 0b 2691.13Sad 2701.13Sad /* 2711.13Sad * Writer: if the compare-and-set fails, don't bother retrying. 2721.13Sad */ 2731.13Sad2: movq CPUVAR(CURLWP), %rcx 2741.13Sad xorq %rax, %rax 2751.13Sad orq $RW_WRITE_LOCKED, %rcx 2761.13Sad LOCK(9) 2771.21Sad cmpxchgq %rcx, (%rdi) 2781.18Sad movl $0, %eax 2791.13Sad setz %al 2801.22Sad3: 2811.22Sad RET(6) 2821.13Sad ret 2831.22Sad4: 2841.22Sad xorl %eax, %eax 2851.22Sad jmp 3b 2861.13Sad 2871.2Sad#endif /* LOCKDEBUG */ 2881.2Sad 2891.2Sad/* 2901.11Sad * Spinlocks. 2911.2Sad */ 2921.19SchsENTRY(__cpu_simple_lock_init) 2931.11Sad movb $0, (%rdi) 2941.2Sad ret 2951.2Sad 2961.11SadNENTRY(__cpu_simple_lock) 2971.11Sad movl $0x0100, %eax 2981.11Sad1: 2991.11Sad LOCK(6) 3001.11Sad cmpxchgb %ah, (%rdi) 3011.11Sad jnz 2f 3021.22Sad RET(7) 3031.11Sad2: 3041.11Sad movl $0x0100, %eax 3051.11Sad pause 3061.11Sad nop 3071.7Sad nop 3081.11Sad cmpb $0, (%rdi) 3091.11Sad je 1b 3101.11Sad jmp 2b 3111.11Sad 3121.19SchsENTRY(__cpu_simple_unlock) 3131.11Sad movb $0, (%rdi) 3141.2Sad ret 3151.7Sad 3161.19SchsENTRY(__cpu_simple_lock_try) 3171.11Sad movl $0x0100, %eax 3181.11Sad LOCK(7) 3191.11Sad cmpxchgb %ah, (%rdi) 3201.11Sad movl $0, %eax 3211.22Sad setz %al 3221.22Sad RET(8) 3231.2Sad 3241.2Sad/* 3251.7Sad * Patchpoints to replace with NOP when ncpu == 1. 3261.7Sad */ 3271.7Sad#ifndef LOCKDEBUG 3281.7SadLABEL(x86_lockpatch) 3291.11Sad .quad .Lpatch1, .Lpatch2, .Lpatch3, .Lpatch4 3301.13Sad .quad .Lpatch5, .Lpatch6, .Lpatch7, .Lpatch8 3311.13Sad .quad .Lpatch9 3321.7Sad .quad 0 3331.7Sad#endif 3341.22Sad 3351.22SadLABEL(x86_retpatch) 3361.22Sad#ifndef LOCKDEBUG 3371.22Sad .long .Lret1, .Lret2, .Lret3, .Lret4, .Lret5, .Lret6 3381.22Sad#endif 3391.22Sad .long .Lret7, .Lret8 3401.22Sad .long 0 341